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authorZhiqiang Tu <ztu@codeaurora.org>2017-07-27 16:18:48 +0800
committerZhiqiang Tu <ztu@codeaurora.org>2017-08-08 09:55:40 +0800
commite7ab41f40cd5d39f8290ea4373876623d18a3342 (patch)
tree13e9380fdb1405a52b213f465e1ce73d47b8edb9
parent3ae2aaab7f93ccb172093c81e10b704360f50c02 (diff)
ARM: dts: msm: Add SMMU on virtual platform
Add SMMU on virtual platform. Change-Id: I39b40e6260590aab59d440ad7063959bc8f16f52 Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dts15
-rw-r--r--arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi75
2 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dts b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dts
index b546c89f53d8..8a910717e23f 100644
--- a/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dts
+++ b/arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dts
@@ -69,6 +69,7 @@
};
#include "vplatform-lfv-ion.dtsi"
+#include "vplatform-lfv-smmu.dtsi"
&soc {
#address-cells = <1>;
@@ -844,6 +845,20 @@
regulator-name = "hl7509_en_vreg";
};
+ gdsc_mmagic_camss: qcom,gdsc@8c3c4c {
+ compatible = "qcom,stub-regulator";
+ regulator-name = "gdsc_mmagic_camss";
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <7>;
+ };
+
+ gdsc_hlos1_vote_lpass_adsp: qcom,gdsc@37d034 {
+ compatible = "qcom,stub-regulator";
+ regulator-name = "gdsc_hlos1_vote_lpass_adsp";
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <7>;
+ };
+
spi_9: spi@75B7000 { /* BLSP2 QUP3 */
compatible = "qcom,spi-qup-v2";
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi b/arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi
new file mode 100644
index 000000000000..65eaa0c5aef9
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi
@@ -0,0 +1,75 @@
+/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm-arm-smmu.dtsi"
+#include <dt-bindings/msm/msm-bus-ids.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&lpass_q6_smmu {
+ status = "ok";
+ qcom,register-save;
+ qcom,skip-init;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
+ vdd-supply = <&gdsc_hlos1_vote_lpass_adsp>;
+ clocks = <&clock_gcc clk_hlos1_vote_lpass_adsp_smmu_clk>;
+ clock-names = "lpass_q6_smmu_clocks";
+ #clock-cells = <1>;
+};
+
+&cpp_fd_smmu {
+ status = "ok";
+ qcom,register-save;
+ qcom,skip-init;
+ qcom,fatal-asf;
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ vdd-supply = <&gdsc_mmagic_camss>;
+ clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
+ <&clock_mmss clk_mmss_mmagic_cfg_ahb_clk>,
+ <&clock_mmss clk_smmu_cpp_ahb_clk>,
+ <&clock_mmss clk_smmu_cpp_axi_clk>,
+ <&clock_mmss clk_mmagic_camss_axi_clk>;
+ clock-names = "mmagic_ahb_clk", "mmagic_cfg_ahb_clk",
+ "cpp_ahb_clk", "cpp_axi_clk",
+ "mmagic_camss_axi_clk";
+ #clock-cells = <1>;
+ qcom,bus-master-id = <MSM_BUS_MASTER_CPP>;
+};
+
+&soc {
+ iommu_test_device {
+ compatible = "iommu-debug-test";
+ /*
+ * 42 shouldn't be used by anyone on the cpp_fd_smmu. We just
+ * need _something_ here to get this node recognized by the
+ * SMMU driver. Our test uses ATOS, which doesn't use SIDs
+ * anyways, so using a dummy value is ok.
+ */
+ iommus = <&cpp_fd_smmu 42>;
+ };
+};