diff options
| author | Komal Seelam <kseelam@qti.qualcomm.com> | 2014-02-04 14:58:40 -0800 |
|---|---|---|
| committer | Prakash Dhavali <pdhavali@qca.qualcomm.com> | 2014-02-05 21:06:51 -0800 |
| commit | e3043f1d10df20ea519040003b4dace0f89027a9 (patch) | |
| tree | 7628dc0c695e01dc6368627bf698819510c4cfed | |
| parent | 2273d6584ca4d1e54621685240e4b1bc32fc1d68 (diff) | |
cld: wlan: Process pcie interrupts only if hif_state is initalized.
During wlan Driver load, FW raises an interrupt before the
driver load completes, results in host crash because of the
uniniatized structes in hif_state.
Don't process pcie interrupts till driver load completes.
Change-Id: Ieb460c65c82fa1ba23cf240b22cf59d50c33ee21
CRs-Fixed: 611411
| -rw-r--r-- | CORE/SERVICES/HIF/PCIe/if_pci.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/CORE/SERVICES/HIF/PCIe/if_pci.c b/CORE/SERVICES/HIF/PCIe/if_pci.c index 37cbb090dbaf..0c0edf43cfd5 100644 --- a/CORE/SERVICES/HIF/PCIe/if_pci.c +++ b/CORE/SERVICES/HIF/PCIe/if_pci.c @@ -104,7 +104,9 @@ hif_pci_interrupt_handler(int irq, void *arg) volatile int tmp; if (LEGACY_INTERRUPTS(sc)) { - A_TARGET_ACCESS_BEGIN(targid); + + if (sc->hif_init_done == TRUE) + A_TARGET_ACCESS_BEGIN(targid); /* Clear Legacy PCI line interrupts */ /* IMPORTANT: INTR_CLR regiser has to be set after INTR_ENABLE is set to 0, */ @@ -118,8 +120,8 @@ hif_pci_interrupt_handler(int irq, void *arg) printk(KERN_ERR "BUG(%s): SoC returns 0xdeadbeef!!\n", __func__); VOS_BUG(0); } - - A_TARGET_ACCESS_END(targid); + if (sc->hif_init_done == TRUE) + A_TARGET_ACCESS_END(targid); } /* TBDXXX: Add support for WMAC */ @@ -427,7 +429,9 @@ wlan_tasklet(unsigned long data) } irq_handled: if (LEGACY_INTERRUPTS(sc)) { - A_TARGET_ACCESS_BEGIN(targid); + + if (sc->hif_init_done == TRUE) + A_TARGET_ACCESS_BEGIN(targid); /* Enable Legacy PCI line interrupts */ A_PCI_WRITE32(sc->mem+(SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS), @@ -435,7 +439,8 @@ irq_handled: /* IMPORTANT: this extra read transaction is required to flush the posted write buffer */ tmp = A_PCI_READ32(sc->mem+(SOC_CORE_BASE_ADDRESS | PCIE_INTR_ENABLE_ADDRESS)); - A_TARGET_ACCESS_END(targid); + if (sc->hif_init_done == TRUE) + A_TARGET_ACCESS_END(targid); } } |