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authorLinux Build Service Account <lnxbuild@localhost>2016-07-29 11:24:30 -0700
committerGerrit - the friendly Code Review server <code-review@localhost>2016-07-29 11:24:30 -0700
commite21b49baaf3a5a60f23c97e65a2484cca595af2f (patch)
tree09ab48c1fac6a773501149607bbd9e174461fc81
parent29e6a3b9239df8aa7096b46356db3f474e4ec9ef (diff)
parent1aeba1b25ee0a9597347a04e1c71834557317da5 (diff)
Merge "msm: ipa3: add mapping for IPA SMEM to SMMU"
-rw-r--r--drivers/platform/msm/ipa/ipa_v3/ipa.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa.c b/drivers/platform/msm/ipa/ipa_v3/ipa.c
index ef54d88024a9..3dd9738f67c7 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa.c
@@ -37,6 +37,7 @@
#include <linux/hashtable.h>
#include <linux/hash.h>
#include <soc/qcom/subsystem_restart.h>
+#include <soc/qcom/smem.h>
#define IPA_SUBSYSTEM_NAME "ipa_fws"
#include "ipa_i.h"
#include "../ipa_rm_i.h"
@@ -75,6 +76,8 @@
#define IPA3_ACTIVE_CLIENT_LOG_TYPE_RESOURCE 2
#define IPA3_ACTIVE_CLIENT_LOG_TYPE_SPECIAL 3
+#define IPA_SMEM_SIZE (8 * 1024)
+
/* round addresses for closes page per SMMU requirements */
#define IPA_SMMU_ROUND_TO_PAGE(iova, pa, size, iova_p, pa_p, size_p) \
do { \
@@ -4824,6 +4827,7 @@ static int ipa_smmu_ap_cb_probe(struct device *dev)
u32 iova_ap_mapping[2];
u32 add_map_size;
const u32 *add_map;
+ void *smem_addr;
int i;
IPADBG("AP CB probe: sub pdev=%p\n", dev);
@@ -4943,6 +4947,26 @@ static int ipa_smmu_ap_cb_probe(struct device *dev)
}
}
+ /* map SMEM memory for IPA table accesses */
+ smem_addr = smem_alloc(SMEM_IPA_FILTER_TABLE, IPA_SMEM_SIZE,
+ SMEM_MODEM, 0);
+ if (smem_addr) {
+ phys_addr_t iova = smem_virt_to_phys(smem_addr);
+ phys_addr_t pa = iova;
+ unsigned long iova_p;
+ phys_addr_t pa_p;
+ u32 size_p;
+
+ IPA_SMMU_ROUND_TO_PAGE(iova, pa, IPA_SMEM_SIZE,
+ iova_p, pa_p, size_p);
+ IPADBG("mapping 0x%lx to 0x%pa size %d\n",
+ iova_p, &pa_p, size_p);
+ ipa3_iommu_map(cb->mapping->domain,
+ iova_p, pa_p, size_p,
+ IOMMU_READ | IOMMU_WRITE | IOMMU_DEVICE);
+ }
+
+
smmu_info.present = true;
if (!ipa3_bus_scale_table)