diff options
| author | Kai Liu <kaliu@codeaurora.org> | 2017-03-15 16:46:16 +0800 |
|---|---|---|
| committer | Sandeep Puligilla <spuligil@codeaurora.org> | 2017-03-20 21:15:29 -0700 |
| commit | e183d78a042a93e06312015511ed7402874c8d98 (patch) | |
| tree | d12284986b46ab50bd9ffbc47e0c7f28d72719b6 | |
| parent | b10c832d4659fe5506e0ecd3cee8c3db04c37be8 (diff) | |
qcacld-3.0: override default uart tx pin to aviod conflict with sdio pin
In sdio interface chip, both sdio_data2 and uart_tx pin will use GPIO6.
It is set by fw rom code, which will cause sdio CRC error when there is
sdio transaction. Override uart tx pin to avoid side effect to sdio pin.
Change-Id: Icd268e607c51238dcea7e8e3a55dceb96d5b1c1a
CRs-Fixed: 2019742
| -rw-r--r-- | core/bmi/src/ol_fw.c | 55 |
1 files changed, 31 insertions, 24 deletions
diff --git a/core/bmi/src/ol_fw.c b/core/bmi/src/ol_fw.c index 4d21f8f994a8..70321ab8024d 100644 --- a/core/bmi/src/ol_fw.c +++ b/core/bmi/src/ol_fw.c @@ -1325,32 +1325,39 @@ QDF_STATUS ol_download_firmware(struct ol_context *ol_ctx) (uint8_t *) &address, 4, ol_ctx); } - if (ini_cfg->enable_uart_print) { - switch (target_version) { - case AR6004_VERSION_REV1_3: - param = 11; - break; - case AR6320_REV1_VERSION: - case AR6320_REV2_VERSION: - case AR6320_REV3_VERSION: - case AR6320_REV3_2_VERSION: - case QCA9379_REV1_VERSION: - case AR6320_REV4_VERSION: - case AR6320_DEV_VERSION: - if (hif_get_bus_type(scn) == QDF_BUS_TYPE_SDIO) - param = 19; - else - param = 6; + switch (target_version) { + case AR6004_VERSION_REV1_3: + param = 11; + break; + case AR6320_REV1_VERSION: + case AR6320_REV2_VERSION: + case AR6320_REV3_VERSION: + case AR6320_REV3_2_VERSION: + case QCA9377_REV1_1_VERSION: + case QCA9379_REV1_VERSION: + case AR6320_REV4_VERSION: + case AR6320_DEV_VERSION: + /* + * In sdio interface chip, both sdio_data2 and uart_tx pin + * will use GPIO6. It is set by fw rom code, which will cause + * sdio CRC error when there is sdio transaction. + * Override uart tx pin to avoid side effect to sdio pin. + */ + if (hif_get_bus_type(scn) == QDF_BUS_TYPE_SDIO) + param = 19; + else + param = 6; + break; + default: + /* Configure GPIO AR9888 UART */ + param = 7; + } - break; - default: - /* Configure GPIO AR9888 UART */ - param = 7; - } + bmi_write_memory(hif_hia_item_address(target_type, + offsetof(struct host_interest_s, hi_dbg_uart_txpin)), + (uint8_t *)¶m, 4, ol_ctx); - bmi_write_memory(hif_hia_item_address(target_type, - offsetof(struct host_interest_s, hi_dbg_uart_txpin)), - (uint8_t *)¶m, 4, ol_ctx); + if (ini_cfg->enable_uart_print) { param = 1; bmi_write_memory(hif_hia_item_address(target_type, offsetof(struct host_interest_s, hi_serial_enable)), |