diff options
| author | David Collins <collinsd@codeaurora.org> | 2016-03-29 12:24:03 -0700 |
|---|---|---|
| committer | Bryan Huntsman <bryanh@codeaurora.org> | 2016-04-12 15:49:41 -0700 |
| commit | deb0522330975705a146ac6a09101fb8b9d309fa (patch) | |
| tree | ab15bfb70edf5757ce59f1a2faf80bb35a9ab761 | |
| parent | 542cc0c4ed345f58e8366ede7c67d596b9f15851 (diff) | |
ARM: dts: msm: add VDD_GFX CPR controller device for msmcobalt
Add a VDD_GFX CPR4 controller device which allows consumers to
make voltage corner requests which are then translated to the
minimum possible voltage using the CPR hardware feedback.
Change-Id: Idd5f5380f911b5b5d402b7c19999ce2e300d660d
CRs-Fixed: 986619
Signed-off-by: David Collins <collinsd@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi index 41c3953205a4..a9a7750aaf83 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi @@ -10,6 +10,9 @@ * GNU General Public License for more details. */ +#include <dt-bindings/clock/msm-clocks-cobalt.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + &rpm_bus { /* PMCOBALT S1 + S6 = VDD_CX supply */ rpm-regulator-smpa1 { @@ -740,6 +743,105 @@ }; }; + gfx_cpr: cpr4-ctrl@5061000 { + compatible = "qcom,cpr4-msmcobalt-mmss-regulator"; + reg = <0x05061000 0x4000>, <0x00784000 0x1000>; + reg-names = "cpr_ctrl", "fuse_base"; + clocks = <&clock_gpu clk_gpucc_rbcpr_clk>, + <&clock_gcc clk_cnoc_clk>; + clock-names = "core_clk", "bus_clk"; + interrupts = <GIC_SPI 285 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "cpr"; + qcom,cpr-ctrl-name = "gfx"; + + qcom,cpr-sensor-time = <1000>; + qcom,cpr-loop-time = <5000000>; + qcom,cpr-idle-cycles = <15>; + qcom,cpr-step-quot-init-min = <10>; + qcom,cpr-step-quot-init-max = <13>; + qcom,cpr-count-mode = <2>; /* Staggered */ + + vdd-supply = <&pm8005_s1>; + qcom,voltage-step = <4000>; + mem-acc-supply = <&gfx_mem_acc_vreg>; + qcom,cpr-aging-ref-voltage = <1032000>; + + thread@0 { + qcom,cpr-thread-id = <0>; + qcom,cpr-consecutive-up = <0>; + qcom,cpr-consecutive-down = <2>; + qcom,cpr-up-threshold = <0>; + qcom,cpr-down-threshold = <2>; + + gfx_vreg: regulator { + regulator-name = "gfx_corner"; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <6>; + + qcom,cpr-fuse-corners = <4>; + qcom,cpr-fuse-combos = <8>; + qcom,cpr-corners = <6>; + + qcom,cpr-corner-fmax-map = <1 3 5 6>; + + qcom,cpr-voltage-ceiling = + <632000 696000 768000 828000 896000 + 1032000>; + qcom,cpr-voltage-floor = + <528000 528000 568000 612000 664000 + 752000>; + + qcom,mem-acc-voltage = <1 1 1 2 2 2>; + + qcom,corner-frequencies = + <171000000 251000000 332000000 + 403000000 504000000 650000000>; + + qcom,cpr-target-quotients = + < 0 0 404 478 363 411 140 176 + 105 0 0 0 0 0 0 0>, + < 0 0 574 651 532 584 266 319 + 196 0 0 0 0 0 0 0>, + < 0 0 743 830 693 753 389 456 + 285 0 0 0 0 0 0 0>, + < 0 0 879 977 829 893 495 570 + 365 0 0 0 0 0 0 0>, + < 0 0 1168 1270 1097 1150 0 0 + 0 0 0 1406 899 805 0 0>, + <1669 1757 0 0 0 0 0 0 + 0 1359 1902 1740 0 1033 0 0>; + + qcom,cpr-ro-scaling-factor = + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>, + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>, + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>, + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>, + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>, + <2389 2287 2985 3112 2873 2904 2159 2399 + 1580 1602 2158 3042 2780 2069 0 0>; + + qcom,cpr-floor-to-ceiling-max-range = + <50000 50000 50000 50000 50000 50000>; + + qcom,cpr-fused-closed-loop-voltage-adjustment-map = + <1 2 2 3 3 4>; + + qcom,allow-voltage-interpolation; + qcom,cpr-scaled-open-loop-voltage-as-ceiling; + + qcom,cpr-aging-max-voltage-adjustment = <15000>; + qcom,cpr-aging-ref-corner = <6>; + qcom,cpr-aging-ro-scaling-factor = <2950>; + qcom,allow-aging-voltage-adjustment = <0>; + }; + }; + }; + gfx_mem_acc_vreg: regulator@1fcf004 { compatible = "qcom,mem-acc-regulator"; reg = <0x01fcf004 0x4>; |
