msm: mdss: hdmi: add new formats defined in cea-861-f

CEA-861-F specification defines new video formats which are supported in
the hdmi 2.0 specification.

Change-Id: I5bf017835ea7c5e472e91c0d663f6f0083a87854
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>

7 files changed, 326 insertions, 92 deletions

diff --git a/drivers/video/fbdev/msm/mdss_hdmi_edid.c b/drivers/video/fbdev/msm/mdss_hdmi_edid.c
index 18215f68ea60..4f94ddc94e97 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_edid.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_edid.c
@@ -123,6 +123,7 @@ struct hdmi_edid_ctrl {
 	u8 spkr_alloc_data_block[MAX_SPKR_ALLOC_DATA_BLOCK_SIZE];
 	int sadb_size;
 	u8 edid_buf[MAX_EDID_BLOCK_SIZE];
+	u32 max_pclk_khz;
 
 	struct hdmi_edid_sink_data sink_data;
 	struct hdmi_edid_init_data init_data;
@@ -311,6 +312,10 @@ static ssize_t hdmi_edid_sysfs_rda_res_info(struct device *dev,
 			edid_ctrl->init_data.ds_data,
 			minfo->video_format);
 
+		info.pixel_formats =
+		    (minfo->rgb_support ? MSM_HDMI_RGB_888_24BPP_FORMAT : 0) |
+		    (minfo->y420_support ? MSM_HDMI_YUV_420_12BPP_FORMAT : 0);
+
 		minfo++;
 		if (ret || !info.supported)
 			continue;
@@ -326,7 +331,7 @@ static ssize_t hdmi_edid_sysfs_rda_res_info(struct device *dev,
 
 		memcpy(&info_dbg, buf_dbg, sizeof(info_dbg));
 
-		DEV_DBG("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n",
+		DEV_DBG("%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d,%d\n",
 			info_dbg.video_format, info_dbg.active_h,
 			info_dbg.front_porch_h, info_dbg.pulse_width_h,
 			info_dbg.back_porch_h, info_dbg.active_low_h,
@@ -334,7 +339,8 @@ static ssize_t hdmi_edid_sysfs_rda_res_info(struct device *dev,
 			info_dbg.pulse_width_v, info_dbg.back_porch_v,
 			info_dbg.active_low_v, info_dbg.pixel_freq,
 			info_dbg.refresh_rate, info_dbg.interlaced,
-			info_dbg.supported, info_dbg.ar);
+			info_dbg.supported, info_dbg.ar,
+			info_dbg.pixel_formats);
 
 		buf_dbg += sizeof(info_dbg);
 	}
@@ -507,6 +513,15 @@ static struct attribute_group hdmi_edid_fs_attrs_group = {
 	.attrs = hdmi_edid_fs_attrs,
 };
 
+static bool hdmi_edid_is_mode_supported(struct hdmi_edid_ctrl *edid_ctrl,
+			struct msm_hdmi_mode_timing_info *timing)
+{
+	if (!timing->supported || timing->pixel_freq > edid_ctrl->max_pclk_khz)
+		return false;
+
+	return true;
+}
+
 static int hdmi_edid_read_block(struct hdmi_edid_ctrl *edid_ctrl, int block,
 	u8 *edid_buf)
 {
@@ -661,7 +676,7 @@ static void hdmi_edid_add_sink_y420_format(struct hdmi_edid_ctrl *edid_ctrl,
 	u32 ret = hdmi_get_supported_mode(&timing,
 				edid_ctrl->init_data.ds_data,
 				video_format);
-	u32 supported = timing.supported;
+	u32 supported = hdmi_edid_is_mode_supported(edid_ctrl, &timing);
 	struct hdmi_edid_sink_data *sink = &edid_ctrl->sink_data;
 
 	if (video_format >= HDMI_VFRMT_MAX) {
@@ -1315,7 +1330,7 @@ static void hdmi_edid_add_sink_video_format(struct hdmi_edid_ctrl *edid_ctrl,
 	u32 ret = hdmi_get_supported_mode(&timing,
 				edid_ctrl->init_data.ds_data,
 				video_format);
-	u32 supported = timing.supported;
+	u32 supported = hdmi_edid_is_mode_supported(edid_ctrl, &timing);
 	struct hdmi_edid_sink_data *sink_data = &edid_ctrl->sink_data;
 	struct disp_mode_info *disp_mode_list = sink_data->disp_mode_list;
 
@@ -2153,7 +2168,7 @@ void hdmi_edid_deinit(void *input)
 	}
 } /* hdmi_edid_deinit */
 
-void *hdmi_edid_init(struct hdmi_edid_init_data *init_data)
+void *hdmi_edid_init(struct hdmi_edid_init_data *init_data, u32 max_pclk_khz)
 {
 	struct hdmi_edid_ctrl *edid_ctrl = NULL;
 
@@ -2172,6 +2187,7 @@ void *hdmi_edid_init(struct hdmi_edid_init_data *init_data)
 
 	edid_ctrl->init_data = *init_data;
 	edid_ctrl->sink_mode = false;
+	edid_ctrl->max_pclk_khz = max_pclk_khz;
 
 	if (sysfs_create_group(init_data->sysfs_kobj,
 		&hdmi_edid_fs_attrs_group)) {
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_edid.h b/drivers/video/fbdev/msm/mdss_hdmi_edid.h
index d226de74f3de..128a36a09bde 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_edid.h
+++ b/drivers/video/fbdev/msm/mdss_hdmi_edid.h
@@ -33,6 +33,6 @@ int hdmi_edid_get_audio_blk(void *edid_ctrl,
 	struct msm_hdmi_audio_edid_blk *blk);
 void hdmi_edid_set_video_resolution(void *edid_ctrl, u32 resolution);
 void hdmi_edid_deinit(void *edid_ctrl);
-void *hdmi_edid_init(struct hdmi_edid_init_data *init_data);
+void *hdmi_edid_init(struct hdmi_edid_init_data *init_data, u32 max_pclk_khz);
 
 #endif /* __HDMI_EDID_H__ */
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.c b/drivers/video/fbdev/msm/mdss_hdmi_tx.c
index 95cefc1f55b1..e5fd9b397a98 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_tx.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.c
@@ -75,6 +75,14 @@
 #define HDMI_TX_KHZ_TO_HZ 1000
 #define HDMI_TX_MHZ_TO_HZ 1000000
 
+/* Maximum pixel clock rates for hdmi tx */
+#define HDMI_DEFAULT_MAX_PCLK_RATE         148500
+#define HDMI_TX_3_MAX_PCLK_RATE            297000
+#define HDMI_TX_4_MAX_PCLK_RATE            600000
+
+#define HDMI_TX_VERSION_4         4
+#define HDMI_TX_VERSION_3         3
+
 /* Enable HDCP by default */
 static bool hdcp_feature_on = true;
 
@@ -277,6 +285,18 @@ static int hdmi_tx_get_version(struct hdmi_tx_ctrl *hdmi_ctrl)
 	reg_val = (reg_val & 0xF0000000) >> 28;
 	hdmi_ctrl->hdmi_tx_ver = reg_val;
 
+	switch (hdmi_ctrl->hdmi_tx_ver) {
+	case (HDMI_TX_VERSION_3):
+		hdmi_ctrl->max_pclk_khz = HDMI_TX_3_MAX_PCLK_RATE;
+		break;
+	case (HDMI_TX_VERSION_4):
+		hdmi_ctrl->max_pclk_khz = HDMI_TX_4_MAX_PCLK_RATE;
+		break;
+	default:
+		hdmi_ctrl->max_pclk_khz = HDMI_DEFAULT_MAX_PCLK_RATE;
+		break;
+	}
+
 	rc = hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_HPD_PM, false);
 	if (rc) {
 		DEV_ERR("%s: FAILED to disable power\n", __func__);
@@ -1167,7 +1187,7 @@ static int hdmi_tx_init_features(struct hdmi_tx_ctrl *hdmi_ctrl)
 	edid_init_data.ds_data = &hdmi_ctrl->ds_data;
 
 	hdmi_ctrl->feature_data[HDMI_TX_FEAT_EDID] =
-		hdmi_edid_init(&edid_init_data);
+		hdmi_edid_init(&edid_init_data, hdmi_ctrl->max_pclk_khz);
 	if (!hdmi_ctrl->feature_data[HDMI_TX_FEAT_EDID]) {
 		DEV_ERR("%s: hdmi_edid_init failed\n", __func__);
 		return -EPERM;
@@ -1762,16 +1782,16 @@ void hdmi_tx_set_vendor_specific_infoframe(
 
 	hdmi_video_format = 0x1;
 	switch (hdmi_ctrl->vid_cfg.vic) {
-	case HDMI_VFRMT_3840x2160p30_16_9:
+	case HDMI_EVFRMT_3840x2160p30_16_9:
 		hdmi_vic = 0x1;
 		break;
-	case HDMI_VFRMT_3840x2160p25_16_9:
+	case HDMI_EVFRMT_3840x2160p25_16_9:
 		hdmi_vic = 0x2;
 		break;
-	case HDMI_VFRMT_3840x2160p24_16_9:
+	case HDMI_EVFRMT_3840x2160p24_16_9:
 		hdmi_vic = 0x3;
 		break;
-	case HDMI_VFRMT_4096x2160p24_16_9:
+	case HDMI_EVFRMT_4096x2160p24_16_9:
 		hdmi_vic = 0x4;
 		break;
 	default:
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.h b/drivers/video/fbdev/msm/mdss_hdmi_tx.h
index 6c10da4aaff3..0b691bbffaed 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_tx.h
+++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.h
@@ -126,6 +126,7 @@ struct hdmi_video_config {
 struct hdmi_tx_ctrl {
 	struct platform_device *pdev;
 	u32 hdmi_tx_ver;
+	u32 max_pclk_khz;
 	struct hdmi_tx_platform_data pdata;
 	struct mdss_panel_data panel_data;
 	struct mdss_util_intf *mdss_util;
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.c b/drivers/video/fbdev/msm/mdss_hdmi_util.c
index 9dfc0a60391a..d59d8cae2be3 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_util.c
+++ b/drivers/video/fbdev/msm/mdss_hdmi_util.c
@@ -181,17 +181,17 @@ int msm_hdmi_get_timing_info(
 	case HDMI_VFRMT_1920x1080p30_16_9:
 		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1920x1080p30_16_9);
 		break;
-	case HDMI_VFRMT_3840x2160p30_16_9:
-		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p30_16_9);
+	case HDMI_EVFRMT_3840x2160p30_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_EVFRMT_3840x2160p30_16_9);
 		break;
-	case HDMI_VFRMT_3840x2160p25_16_9:
-		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p25_16_9);
+	case HDMI_EVFRMT_3840x2160p25_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_EVFRMT_3840x2160p25_16_9);
 		break;
-	case HDMI_VFRMT_3840x2160p24_16_9:
-		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p24_16_9);
+	case HDMI_EVFRMT_3840x2160p24_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_EVFRMT_3840x2160p24_16_9);
 		break;
-	case HDMI_VFRMT_4096x2160p24_16_9:
-		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_4096x2160p24_16_9);
+	case HDMI_EVFRMT_4096x2160p24_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_EVFRMT_4096x2160p24_16_9);
 		break;
 	case HDMI_VFRMT_1024x768p60_4_3:
 		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1024x768p60_4_3);
@@ -235,6 +235,56 @@ int msm_hdmi_get_timing_info(
 	case HDMI_VFRMT_1280x800p60_16_10:
 		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_1280x800p60_16_10);
 		break;
+	case HDMI_VFRMT_3840x2160p24_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p24_16_9);
+		break;
+	case HDMI_VFRMT_3840x2160p25_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p25_16_9);
+		break;
+	case HDMI_VFRMT_3840x2160p30_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p30_16_9);
+		break;
+	case HDMI_VFRMT_3840x2160p50_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p50_16_9);
+		break;
+	case HDMI_VFRMT_3840x2160p60_16_9:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p60_16_9);
+		break;
+	case HDMI_VFRMT_4096x2160p24_256_135:
+		MSM_HDMI_MODES_GET_DETAILS(mode,
+					HDMI_VFRMT_4096x2160p24_256_135);
+		break;
+	case HDMI_VFRMT_4096x2160p25_256_135:
+		MSM_HDMI_MODES_GET_DETAILS(mode,
+					HDMI_VFRMT_4096x2160p25_256_135);
+		break;
+	case HDMI_VFRMT_4096x2160p30_256_135:
+		MSM_HDMI_MODES_GET_DETAILS(mode,
+					HDMI_VFRMT_4096x2160p30_256_135);
+		break;
+	case HDMI_VFRMT_4096x2160p50_256_135:
+		MSM_HDMI_MODES_GET_DETAILS(mode,
+					HDMI_VFRMT_4096x2160p50_256_135);
+		break;
+	case HDMI_VFRMT_4096x2160p60_256_135:
+		MSM_HDMI_MODES_GET_DETAILS(mode,
+					HDMI_VFRMT_4096x2160p60_256_135);
+		break;
+	case HDMI_VFRMT_3840x2160p24_64_27:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p24_64_27);
+		break;
+	case HDMI_VFRMT_3840x2160p25_64_27:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p25_64_27);
+		break;
+	case HDMI_VFRMT_3840x2160p30_64_27:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p30_64_27);
+		break;
+	case HDMI_VFRMT_3840x2160p50_64_27:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p50_64_27);
+		break;
+	case HDMI_VFRMT_3840x2160p60_64_27:
+		MSM_HDMI_MODES_GET_DETAILS(mode, HDMI_VFRMT_3840x2160p60_64_27);
+		break;
 	default:
 		ret = hdmi_get_resv_timing_info(mode, id);
 	}
diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.h b/drivers/video/fbdev/msm/mdss_hdmi_util.h
index d1d4780c5207..d86c048ff31a 100644
--- a/drivers/video/fbdev/msm/mdss_hdmi_util.h
+++ b/drivers/video/fbdev/msm/mdss_hdmi_util.h
@@ -324,6 +324,26 @@ struct hdmi_util_ds_data {
 	u32 ds_max_clk;
 };
 
+static inline int hdmi_tx_get_v_total(const struct msm_hdmi_mode_timing_info *t)
+{
+	if (t) {
+		return t->active_v + t->front_porch_v + t->pulse_width_v +
+			t->back_porch_v;
+	}
+
+	return 0;
+}
+
+static inline int hdmi_tx_get_h_total(const struct msm_hdmi_mode_timing_info *t)
+{
+	if (t) {
+		return t->active_h + t->front_porch_h + t->pulse_width_h +
+			t->back_porch_h;
+	}
+
+	return 0;
+}
+
 /* video timing related utility routines */
 int hdmi_get_video_id_code(struct msm_hdmi_mode_timing_info *timing_in,
 	struct hdmi_util_ds_data *ds_data);
diff --git a/include/uapi/video/msm_hdmi_modes.h b/include/uapi/video/msm_hdmi_modes.h
index 085b3150d322..d3203eb1a0ac 100644
--- a/include/uapi/video/msm_hdmi_modes.h
+++ b/include/uapi/video/msm_hdmi_modes.h
@@ -3,12 +3,17 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 
+#define MSM_HDMI_RGB_888_24BPP_FORMAT       BIT(0)
+#define MSM_HDMI_YUV_420_12BPP_FORMAT       BIT(1)
+
 enum aspect_ratio {
 	HDMI_RES_AR_INVALID,
 	HDMI_RES_AR_4_3,
 	HDMI_RES_AR_5_4,
 	HDMI_RES_AR_16_9,
 	HDMI_RES_AR_16_10,
+	HDMI_RES_AR_64_27,
+	HDMI_RES_AR_256_135,
 	HDMI_RES_AR_MAX,
 };
 
@@ -31,6 +36,8 @@ struct msm_hdmi_mode_timing_info {
 	uint32_t	interlaced;
 	uint32_t	supported;
 	enum aspect_ratio ar;
+	/* Flags indicating support for specific pixel formats */
+	uint32_t        pixel_formats;
 };
 
 #define MSM_HDMI_INIT_RES_PAGE          1
@@ -124,17 +131,61 @@ struct msm_hdmi_mode_timing_info {
 #define HDMI_VFRMT_1280x720p30_16_9	62
 #define HDMI_VFRMT_1920x1080p120_16_9	63
 #define HDMI_VFRMT_1920x1080p100_16_9	64
-/* Video Identification Codes from 65-127 are reserved for the future */
+#define HDMI_VFRMT_1280x720p24_64_27    65
+#define HDMI_VFRMT_1280x720p25_64_27    66
+#define HDMI_VFRMT_1280x720p30_64_27    67
+#define HDMI_VFRMT_1280x720p50_64_27    68
+#define HDMI_VFRMT_1280x720p60_64_27    69
+#define HDMI_VFRMT_1280x720p100_64_27   70
+#define HDMI_VFRMT_1280x720p120_64_27   71
+#define HDMI_VFRMT_1920x1080p24_64_27   72
+#define HDMI_VFRMT_1920x1080p25_64_27   73
+#define HDMI_VFRMT_1920x1080p30_64_27   74
+#define HDMI_VFRMT_1920x1080p50_64_27   75
+#define HDMI_VFRMT_1920x1080p60_64_27   76
+#define HDMI_VFRMT_1920x1080p100_64_27  77
+#define HDMI_VFRMT_1920x1080p120_64_27  78
+#define HDMI_VFRMT_1680x720p24_64_27    79
+#define HDMI_VFRMT_1680x720p25_64_27    80
+#define HDMI_VFRMT_1680x720p30_64_27    81
+#define HDMI_VFRMT_1680x720p50_64_27    82
+#define HDMI_VFRMT_1680x720p60_64_27    83
+#define HDMI_VFRMT_1680x720p100_64_27   84
+#define HDMI_VFRMT_1680x720p120_64_27   85
+#define HDMI_VFRMT_2560x1080p24_64_27   86
+#define HDMI_VFRMT_2560x1080p25_64_27   87
+#define HDMI_VFRMT_2560x1080p30_64_27   88
+#define HDMI_VFRMT_2560x1080p50_64_27   89
+#define HDMI_VFRMT_2560x1080p60_64_27   90
+#define HDMI_VFRMT_2560x1080p100_64_27  91
+#define HDMI_VFRMT_2560x1080p120_64_27  92
+#define HDMI_VFRMT_3840x2160p24_16_9    93
+#define HDMI_VFRMT_3840x2160p25_16_9    94
+#define HDMI_VFRMT_3840x2160p30_16_9    95
+#define HDMI_VFRMT_3840x2160p50_16_9    96
+#define HDMI_VFRMT_3840x2160p60_16_9    97
+#define HDMI_VFRMT_4096x2160p24_256_135 98
+#define HDMI_VFRMT_4096x2160p25_256_135 99
+#define HDMI_VFRMT_4096x2160p30_256_135 100
+#define HDMI_VFRMT_4096x2160p50_256_135 101
+#define HDMI_VFRMT_4096x2160p60_256_135 102
+#define HDMI_VFRMT_3840x2160p24_64_27   103
+#define HDMI_VFRMT_3840x2160p25_64_27   104
+#define HDMI_VFRMT_3840x2160p30_64_27   105
+#define HDMI_VFRMT_3840x2160p50_64_27   106
+#define HDMI_VFRMT_3840x2160p60_64_27   107
+
+/* Video Identification Codes from 107-127 are reserved for the future */
 #define HDMI_VFRMT_END			127
 
 #define EVFRMT_OFF(x)			(HDMI_VFRMT_END + x)
 
 /* extended video formats */
-#define HDMI_VFRMT_3840x2160p30_16_9	EVFRMT_OFF(1)
-#define HDMI_VFRMT_3840x2160p25_16_9	EVFRMT_OFF(2)
-#define HDMI_VFRMT_3840x2160p24_16_9	EVFRMT_OFF(3)
-#define HDMI_VFRMT_4096x2160p24_16_9	EVFRMT_OFF(4)
-#define HDMI_EVFRMT_END			HDMI_VFRMT_4096x2160p24_16_9
+#define HDMI_EVFRMT_3840x2160p30_16_9	EVFRMT_OFF(1)
+#define HDMI_EVFRMT_3840x2160p25_16_9	EVFRMT_OFF(2)
+#define HDMI_EVFRMT_3840x2160p24_16_9	EVFRMT_OFF(3)
+#define HDMI_EVFRMT_4096x2160p24_16_9	EVFRMT_OFF(4)
+#define HDMI_EVFRMT_END			HDMI_EVFRMT_4096x2160p24_16_9
 
 #define WQXGA_OFF(x)			(HDMI_EVFRMT_END + x)
 
@@ -196,110 +247,176 @@ struct msm_hdmi_mode_timing_info {
 
 #define HDMI_VFRMT_640x480p60_4_3_TIMING				\
 	{HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, true,		\
-	 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3}
+	 480, 10, 2, 33, true, 25200, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x480p60_4_3_TIMING				\
 	{HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3}
+	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x480p60_16_9_TIMING				\
 	{HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, true,		\
-	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9}
+	 480, 9, 6, 30, true, 27027, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x720p60_16_9_TIMING				\
 	{HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, false,	\
-	 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9}
+	 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080i60_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false,	\
-	 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9}
+	 540, 2, 5, 5, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x480i60_4_3_TIMING				\
 	{HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3}
+	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1440x480i60_16_9_TIMING				\
 	{HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true,		\
-	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9}
+	 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p60_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_720x576p50_4_3_TIMING				\
 	{HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3}
+	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_720x576p50_16_9_TIMING				\
 	{HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, true,		\
-	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9}
+	 576,  5, 5, 39, true, 27000, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x720p50_16_9_TIMING				\
 	{HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, false,	\
-	 720,  5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9}
+	 720,  5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x576i50_4_3_TIMING				\
 	{HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3}
+	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1440x576i50_16_9_TIMING				\
 	{HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true,		\
-	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9}
+	 288,  2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p50_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p24_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 24000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p25_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 25000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1920x1080p30_16_9_TIMING				\
 	{HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, false,	\
-	 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9}
+	 1080, 4, 5, 36, false, 74250, 30000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1024x768p60_4_3_TIMING                               \
 	{HDMI_VFRMT_1024x768p60_4_3, 1024, 24, 136, 160, false,         \
-	768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3}
+	768, 2, 6, 29, false, 65000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1280x1024p60_5_4_TIMING				\
 	{HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, false,	\
-	1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4}
+	1024, 1, 3, 38, false, 108000, 60000, false, true, HDMI_RES_AR_5_4, 0}
 #define HDMI_VFRMT_2560x1600p60_16_9_TIMING				\
 	{HDMI_VFRMT_2560x1600p60_16_9, 2560, 48, 32, 80, false,		\
-	 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p30_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 30000, false, true, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p25_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 25000, false, true, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_3840x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9}
-#define HDMI_VFRMT_4096x2160p24_16_9_TIMING				\
-	{HDMI_VFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
-	 2160, 8, 10, 72, false, 297000, 24000, false, true, HDMI_RES_AR_16_9}
+	 1600, 3, 6, 37, false, 268500, 60000, false, true, HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p30_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p25_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_3840x2160p24_16_9_TIMING				\
+	{HDMI_EVFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_EVFRMT_4096x2160p24_16_9_TIMING				\
+	{HDMI_EVFRMT_4096x2160p24_16_9, 4096, 1020, 88, 296, false,	\
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
 
 #define HDMI_VFRMT_800x600p60_4_3_TIMING				\
 	{HDMI_VFRMT_800x600p60_4_3, 800, 40, 128, 88, false,	\
-	 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3}
+	 600, 1, 4, 23, false, 40000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_848x480p60_16_9_TIMING				\
 	{HDMI_VFRMT_848x480p60_16_9, 848, 16, 112, 112, false,	\
-	 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9}
+	 480, 6, 8, 23, false, 33750, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1280x960p60_4_3_TIMING\
 	{HDMI_VFRMT_1280x960p60_4_3, 1280, 96, 112, 312, false,	\
-	 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3}
+	 960, 1, 3, 36, false, 108000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1360x768p60_16_9_TIMING\
 	{HDMI_VFRMT_1360x768p60_16_9, 1360, 64, 112, 256, false,	\
-	 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9}
+	 768, 3, 6, 18, false, 85500, 60000, false, true, HDMI_RES_AR_16_9, 0}
 #define HDMI_VFRMT_1440x900p60_16_10_TIMING\
 	{HDMI_VFRMT_1440x900p60_16_10, 1440, 48, 32, 80, false,	\
-	 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10}
+	 900, 3, 6, 17, true, 88750, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1400x1050p60_4_3_TIMING\
 	{HDMI_VFRMT_1400x1050p60_4_3, 1400, 48, 32, 80, false,	\
-	 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3}
+	 1050, 3, 4, 23, true, 101000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1680x1050p60_16_10_TIMING\
 	{HDMI_VFRMT_1680x1050p60_16_10, 1680, 48, 32, 80, false,	\
-	 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10}
+	 1050, 3, 6, 21, true, 119000, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1600x1200p60_4_3_TIMING\
 	{HDMI_VFRMT_1600x1200p60_4_3, 1600, 64, 192, 304, false,	\
-	 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3}
+	 1200, 1, 3, 46, false, 162000, 60000, false, true, HDMI_RES_AR_4_3, 0}
 #define HDMI_VFRMT_1920x1200p60_16_10_TIMING\
 	{HDMI_VFRMT_1920x1200p60_16_10, 1920, 48, 32, 80, false,\
-	 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10}
+	 1200, 3, 6, 26, true, 154000, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1366x768p60_16_10_TIMING\
 	{HDMI_VFRMT_1366x768p60_16_10, 1366, 70, 143, 213, false,\
-	 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10}
+	 768, 3, 3, 24, false, 85500, 60000, false, true, HDMI_RES_AR_16_10, 0}
 #define HDMI_VFRMT_1280x800p60_16_10_TIMING\
 	{HDMI_VFRMT_1280x800p60_16_10, 1280, 72, 128, 200, true,\
-	 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10}
+	 800, 3, 6, 22, false, 83500, 60000, false, true, HDMI_RES_AR_16_10, 0}
+#define HDMI_VFRMT_3840x2160p24_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p24_16_9, 3840, 1276, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p25_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p25_16_9, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p30_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p30_16_9, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p50_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p50_16_9, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+#define HDMI_VFRMT_3840x2160p60_16_9_TIMING                             \
+	{HDMI_VFRMT_3840x2160p60_16_9, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_16_9, 0}
+
+#define HDMI_VFRMT_4096x2160p24_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p24_256_135, 4096, 1020, 88, 296, false,   \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p25_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p25_256_135, 4096, 968, 88, 128, false,    \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p30_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p30_256_135, 4096, 88, 88, 128, false,     \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p50_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p50_256_135, 4096, 968, 88, 128, false,    \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+#define HDMI_VFRMT_4096x2160p60_256_135_TIMING                          \
+	{HDMI_VFRMT_4096x2160p60_256_135, 4096, 88, 88, 128, false,     \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_256_135, 0}
+
+#define HDMI_VFRMT_3840x2160p24_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p24_64_27, 3840, 1276, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 24000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p25_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p25_64_27, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 297000, 25000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p30_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p30_64_27, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 297000, 30000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p50_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p50_64_27, 3840, 1056, 88, 296, false,      \
+	 2160, 8, 10, 72, false, 594000, 50000, false, true, \
+		HDMI_RES_AR_64_27, 0}
+#define HDMI_VFRMT_3840x2160p60_64_27_TIMING                             \
+	{HDMI_VFRMT_3840x2160p60_64_27, 3840, 176, 88, 296, false,       \
+	 2160, 8, 10, 72, false, 594000, 60000, false, true, \
+		HDMI_RES_AR_64_27, 0}
 
 #define MSM_HDMI_MODES_SET_TIMING(LUT, MODE) do {		\
 	struct msm_hdmi_mode_timing_info mode = MODE##_TIMING;	\
@@ -353,16 +470,46 @@ do {	\
 			HDMI_VFRMT_1920x1080p25_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
 			HDMI_VFRMT_1920x1080p30_16_9);	\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p24_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p25_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p30_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p50_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p60_16_9);  \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p24_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p25_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p30_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p50_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_4096x2160p60_256_135);\
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p24_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p25_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p30_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p50_64_27); \
+		MSM_HDMI_MODES_SET_TIMING(__lut,	\
+			HDMI_VFRMT_3840x2160p60_64_27); \
 	}	\
 	if (__type & MSM_HDMI_MODES_XTND) {	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p30_16_9);	\
+			HDMI_EVFRMT_3840x2160p30_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p25_16_9);	\
+			HDMI_EVFRMT_3840x2160p25_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_3840x2160p24_16_9);	\
+			HDMI_EVFRMT_3840x2160p24_16_9);	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
-			HDMI_VFRMT_4096x2160p24_16_9);	\
+			HDMI_EVFRMT_4096x2160p24_16_9);	\
 	}	\
 	if (__type & MSM_HDMI_MODES_DVI) {	\
 		MSM_HDMI_MODES_SET_TIMING(__lut,	\
@@ -401,24 +548,4 @@ do {	\
 	*mode = info;						\
 	} while (0)
 
-
-static inline int hdmi_tx_get_v_total(const struct msm_hdmi_mode_timing_info *t)
-{
-	if (t) {
-		return t->active_v + t->front_porch_v + t->pulse_width_v +
-			t->back_porch_v;
-	}
-
-	return 0;
-}
-
-static inline int hdmi_tx_get_h_total(const struct msm_hdmi_mode_timing_info *t)
-{
-	if (t) {
-		return t->active_h + t->front_porch_h + t->pulse_width_h +
-			t->back_porch_h;
-	}
-
-	return 0;
-}
 #endif /* _UAPI_MSM_HDMI_MODES_H__ */