qcacld-3.0: Add ini keys for WRR tx scheduler tuning

qcacld-2.0 to qcacld-3.0 propagation

Add below four keys to allow user to tune WRR TX scheduler params.
Each key is mapping to one AC defined in data path module through
OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC.
	gEnableTxSchedWrrBE
	gEnableTxSchedWrrBK
	gEnableTxSchedWrrVI
	gEnableTxSchedWrrVO

Change-Id: I5c34b604297d83673ea065243cc58c3f2180ff3e
CRs-Fixed: 1020141

8 files changed, 395 insertions, 0 deletions

diff --git a/core/cds/inc/cds_config.h b/core/cds/inc/cds_config.h
index f8901f17cac7..4492f3f7e101 100644
--- a/core/cds/inc/cds_config.h
+++ b/core/cds/inc/cds_config.h
@@ -27,6 +27,8 @@
 #if !defined(__CDS_CONFIG_H)
 #define __CDS_CONFIG_H
 
+#define TX_WMM_AC_NUM	4
+
 /**
  * enum driver_type - Indicate the driver type to the cds, and based on this
  * do appropriate initialization.
@@ -52,6 +54,30 @@ enum cfg_sub_20_channel_width {
 };
 
 /**
+ * struct ol_tx_sched_wrr_ac_specs_t - the wrr ac specs params structure
+ * @wrr_skip_weight: map to ol_tx_sched_wrr_adv_category_info_t.specs.
+ *                            wrr_skip_weight
+ * @credit_threshold: map to ol_tx_sched_wrr_adv_category_info_t.specs.
+ *                            credit_threshold
+ * @send_limit: map to ol_tx_sched_wrr_adv_category_info_t.specs.
+ *                            send_limit
+ * @credit_reserve: map to ol_tx_sched_wrr_adv_category_info_t.specs.
+ *                            credit_reserve
+ * @discard_weight: map to ol_tx_sched_wrr_adv_category_info_t.specs.
+ *                            discard_weight
+ *
+ * This structure is for wrr ac specs params set from user, it will update
+ * its content corresponding to the ol_tx_sched_wrr_adv_category_info_t.specs.
+ */
+struct ol_tx_sched_wrr_ac_specs_t {
+	int wrr_skip_weight;
+	uint32_t credit_threshold;
+	uint16_t send_limit;
+	int credit_reserve;
+	int discard_weight;
+};
+
+/**
  * struct cds_config_info - Place Holder for cds configuration
  * @max_station: Max station supported
  * @max_bssid: Max Bssid Supported
@@ -150,5 +176,7 @@ struct cds_config_info {
 	bool flow_steering_enabled;
 	bool self_recovery_enabled;
 	bool fw_timeout_crash;
+
+	struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM];
 };
 #endif /* !defined( __CDS_CONFIG_H ) */
diff --git a/core/cds/src/cds_api.c b/core/cds/src/cds_api.c
index 4475b5751480..82173bde5d57 100644
--- a/core/cds/src/cds_api.c
+++ b/core/cds/src/cds_api.c
@@ -158,6 +158,74 @@ void cds_tdls_tx_rx_mgmt_event(uint8_t event_id, uint8_t tx_rx,
 }
 #endif
 
+/**
+ * vos_set_ac_specs_params() - set ac_specs params in mac open param
+ * @param: Pointer to mac open param
+ * @hdd_ctx: Pointer to hdd context
+ *
+ * Return: none
+ */
+static void cds_set_ac_specs_params(struct cds_config_info *cds_cfg,
+					hdd_context_t *hdd_ctx)
+{
+	uint8_t num_entries = 0;
+	uint8_t tx_sched_wrr_param[TX_SCHED_WRR_PARAMS_NUM];
+	uint8_t *tx_sched_wrr_ac;
+	int i;
+
+	if (NULL == hdd_ctx)
+		return;
+
+	if (NULL == cds_cfg)
+		return;
+
+	if (NULL == hdd_ctx->config) {
+		/* Do nothing if hdd_ctx is invalid */
+		QDF_TRACE(QDF_MODULE_ID_QDF, QDF_TRACE_LEVEL_ERROR,
+			"%s: Warning: hdd_ctx->cfg_ini is NULL", __func__);
+		return;
+	}
+
+	for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
+		switch (i) {
+		case OL_TX_WMM_AC_BE:
+			tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_be;
+			break;
+		case OL_TX_WMM_AC_BK:
+			tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_bk;
+			break;
+		case OL_TX_WMM_AC_VI:
+			tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_vi;
+			break;
+		case OL_TX_WMM_AC_VO:
+			tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_vo;
+			break;
+		default:
+			tx_sched_wrr_ac = NULL;
+			break;
+		}
+
+		hdd_string_to_u8_array(tx_sched_wrr_ac,
+				tx_sched_wrr_param,
+				&num_entries,
+				sizeof(tx_sched_wrr_param));
+
+		if (num_entries == TX_SCHED_WRR_PARAMS_NUM) {
+			cds_cfg->ac_specs[i].wrr_skip_weight =
+						tx_sched_wrr_param[0];
+			cds_cfg->ac_specs[i].credit_threshold =
+						tx_sched_wrr_param[1];
+			cds_cfg->ac_specs[i].send_limit =
+						tx_sched_wrr_param[2];
+			cds_cfg->ac_specs[i].credit_reserve =
+						tx_sched_wrr_param[3];
+			cds_cfg->ac_specs[i].discard_weight =
+						tx_sched_wrr_param[4];
+		}
+
+		num_entries = 0;
+	}
+}
 
 /**
  * cds_open() - open the CDS Module
@@ -315,6 +383,8 @@ QDF_STATUS cds_open(void)
 		goto err_htc_close;
 	}
 
+	cds_set_ac_specs_params(cds_cfg, pHddCtx);
+
 	/*Open the WMA module */
 	qdf_status = wma_open(gp_cds_context,
 			      hdd_update_tgt_cfg,
diff --git a/core/dp/ol/inc/ol_cfg.h b/core/dp/ol/inc/ol_cfg.h
index 29ade0c7e055..34ac3ce17070 100644
--- a/core/dp/ol/inc/ol_cfg.h
+++ b/core/dp/ol/inc/ol_cfg.h
@@ -39,6 +39,7 @@
 #endif
 #include "ol_txrx_ctrl_api.h"   /* txrx_pdev_cfg_param_t */
 
+
 /**
  * @brief format of data frames delivered to/from the WLAN driver by/to the OS
  */
@@ -94,6 +95,8 @@ struct txrx_pdev_cfg_t {
 	uint32_t tx_flow_start_queue_offset;
 #endif
 	bool flow_steering_enabled;
+
+	struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM];
 };
 
 /**
@@ -584,4 +587,14 @@ static inline uint8_t ol_cfg_is_flow_steering_enabled(ol_pdev_handle pdev)
 
 	return cfg->flow_steering_enabled;
 }
+
+int ol_cfg_get_wrr_skip_weight(ol_pdev_handle pdev, int ac);
+
+uint32_t ol_cfg_get_credit_threshold(ol_pdev_handle pdev, int ac);
+
+uint16_t ol_cfg_get_send_limit(ol_pdev_handle pdev, int ac);
+
+int ol_cfg_get_credit_reserve(ol_pdev_handle pdev, int ac);
+
+int ol_cfg_get_discard_weight(ol_pdev_handle pdev, int ac);
 #endif /* _OL_CFG__H_ */
diff --git a/core/dp/txrx/ol_cfg.c b/core/dp/txrx/ol_cfg.c
index 29140a5f93e2..87ab86ca5f46 100644
--- a/core/dp/txrx/ol_cfg.c
+++ b/core/dp/txrx/ol_cfg.c
@@ -121,6 +121,7 @@ ol_pdev_handle ol_pdev_cfg_attach(qdf_device_t osdev,
 				  struct txrx_pdev_cfg_param_t cfg_param)
 {
 	struct txrx_pdev_cfg_t *cfg_ctx;
+	int i;
 
 	cfg_ctx = qdf_mem_malloc(sizeof(*cfg_ctx));
 	if (!cfg_ctx) {
@@ -162,6 +163,20 @@ ol_pdev_handle ol_pdev_cfg_attach(qdf_device_t osdev,
 	cfg_ctx->ce_classify_enabled = cfg_param.ce_classify_enabled;
 
 	ol_tx_set_flow_control_parameters(cfg_ctx, cfg_param);
+
+	for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
+		cfg_ctx->ac_specs[i].wrr_skip_weight =
+			cfg_param.ac_specs[i].wrr_skip_weight;
+		cfg_ctx->ac_specs[i].credit_threshold =
+			cfg_param.ac_specs[i].credit_threshold;
+		cfg_ctx->ac_specs[i].send_limit =
+			cfg_param.ac_specs[i].send_limit;
+		cfg_ctx->ac_specs[i].credit_reserve =
+			cfg_param.ac_specs[i].credit_reserve;
+		cfg_ctx->ac_specs[i].discard_weight =
+			cfg_param.ac_specs[i].discard_weight;
+	}
+
 	return (ol_pdev_handle) cfg_ctx;
 }
 
@@ -423,3 +438,88 @@ bool ol_cfg_is_ce_classify_enabled(ol_pdev_handle pdev)
 	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
 	return cfg->ce_classify_enabled;
 }
+
+/**
+ * ol_cfg_get_wrr_skip_weight() - brief Query for the param of wrr_skip_weight
+ * @pdev: handle to the physical device.
+ * @ac: access control, it will be BE, BK, VI, VO
+ *
+ * Return: wrr_skip_weight for specified ac.
+ */
+int ol_cfg_get_wrr_skip_weight(ol_pdev_handle pdev, int ac)
+{
+	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
+
+	if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
+		return cfg->ac_specs[ac].wrr_skip_weight;
+	else
+		return 0;
+}
+
+/**
+ * ol_cfg_get_credit_threshold() - Query for the param of credit_threshold
+ * @pdev: handle to the physical device.
+ * @ac: access control, it will be BE, BK, VI, VO
+ *
+ * Return: credit_threshold for specified ac.
+ */
+uint32_t ol_cfg_get_credit_threshold(ol_pdev_handle pdev, int ac)
+{
+	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
+
+	if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
+		return cfg->ac_specs[ac].credit_threshold;
+	else
+		return 0;
+}
+
+/**
+ * ol_cfg_get_send_limit() - Query for the param of send_limit
+ * @pdev: handle to the physical device.
+ * @ac: access control, it will be BE, BK, VI, VO
+ *
+ * Return: send_limit for specified ac.
+ */
+uint16_t ol_cfg_get_send_limit(ol_pdev_handle pdev, int ac)
+{
+	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
+
+	if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
+		return cfg->ac_specs[ac].send_limit;
+	else
+		return 0;
+}
+
+/**
+ * ol_cfg_get_credit_reserve() - Query for the param of credit_reserve
+ * @pdev: handle to the physical device.
+ * @ac: access control, it will be BE, BK, VI, VO
+ *
+ * Return: credit_reserve for specified ac.
+ */
+int ol_cfg_get_credit_reserve(ol_pdev_handle pdev, int ac)
+{
+	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
+
+	if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
+		return cfg->ac_specs[ac].credit_reserve;
+	else
+		return 0;
+}
+
+/**
+ * ol_cfg_get_discard_weight() - Query for the param of discard_weight
+ * @pdev: handle to the physical device.
+ * @ac: access control, it will be BE, BK, VI, VO
+ *
+ * Return: discard_weight for specified ac.
+ */
+int ol_cfg_get_discard_weight(ol_pdev_handle pdev, int ac)
+{
+	struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
+
+	if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
+		return cfg->ac_specs[ac].discard_weight;
+	else
+		return 0;
+}
diff --git a/core/dp/txrx/ol_tx_sched.c b/core/dp/txrx/ol_tx_sched.c
index 11d0d6c1a45a..dc2dd854c56d 100644
--- a/core/dp/txrx/ol_tx_sched.c
+++ b/core/dp/txrx/ol_tx_sched.c
@@ -1009,6 +1009,72 @@ ol_tx_sched_category_info_wrr_adv(
 	*bytes = category->state.bytes;
 }
 
+/**
+ * ol_tx_sched_wrr_param_update() - update the WRR TX sched params
+ * @pdev: Pointer to PDEV structure.
+ * @scheduler: Pointer to tx scheduler.
+ *
+ * Update the WRR TX schedule parameters for each category if it is
+ * specified in the ini file by user.
+ *
+ * Return: none
+ */
+void ol_tx_sched_wrr_param_update(struct ol_txrx_pdev_t *pdev,
+				struct ol_tx_sched_wrr_adv_t *scheduler)
+{
+	int i;
+	char *tx_sched_wrr_name[4] = {
+		"BE",
+		"BK",
+		"VI",
+		"VO"
+	};
+
+	if (NULL == scheduler)
+		return;
+
+	QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
+		"%s: Tuning the TX scheduler wrr parameters by ini file:",
+		__func__);
+
+	QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
+		"         skip credit limit credit disc");
+
+	for (i = OL_TX_SCHED_WRR_ADV_CAT_BE;
+		i <= OL_TX_SCHED_WRR_ADV_CAT_VO; i++) {
+		if (ol_cfg_get_wrr_skip_weight(pdev->ctrl_pdev, i)) {
+			scheduler->categories[i].specs.wrr_skip_weight =
+				ol_cfg_get_wrr_skip_weight(pdev->ctrl_pdev, i);
+			scheduler->categories[i].specs.credit_threshold =
+				ol_cfg_get_credit_threshold(pdev->ctrl_pdev, i);
+			scheduler->categories[i].specs.send_limit =
+				ol_cfg_get_send_limit(pdev->ctrl_pdev, i);
+			scheduler->categories[i].specs.credit_reserve =
+				ol_cfg_get_credit_reserve(pdev->ctrl_pdev, i);
+			scheduler->categories[i].specs.discard_weight =
+				ol_cfg_get_discard_weight(pdev->ctrl_pdev, i);
+
+			QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
+				"%s-update: %d,  %d,    %d,   %d,    %d",
+				tx_sched_wrr_name[i],
+				scheduler->categories[i].specs.wrr_skip_weight,
+				scheduler->categories[i].specs.credit_threshold,
+				scheduler->categories[i].specs.send_limit,
+				scheduler->categories[i].specs.credit_reserve,
+				scheduler->categories[i].specs.discard_weight);
+		} else {
+			QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
+				"%s-orig: %d,  %d,    %d,   %d,    %d",
+				tx_sched_wrr_name[i],
+				scheduler->categories[i].specs.wrr_skip_weight,
+				scheduler->categories[i].specs.credit_threshold,
+				scheduler->categories[i].specs.send_limit,
+				scheduler->categories[i].specs.credit_reserve,
+				scheduler->categories[i].specs.discard_weight);
+		}
+	}
+}
+
 void *
 ol_tx_sched_init_wrr_adv(
 		struct ol_txrx_pdev_t *pdev)
@@ -1030,6 +1096,8 @@ ol_tx_sched_init_wrr_adv(
 	OL_TX_SCHED_WRR_ADV_CAT_CFG_STORE(MCAST_DATA, scheduler);
 	OL_TX_SCHED_WRR_ADV_CAT_CFG_STORE(MCAST_MGMT, scheduler);
 
+	ol_tx_sched_wrr_param_update(pdev, scheduler);
+
 	for (i = 0; i < OL_TX_SCHED_WRR_ADV_NUM_CATEGORIES; i++) {
 		scheduler->categories[i].state.active = 0;
 		scheduler->categories[i].state.frms = 0;
diff --git a/core/hdd/inc/wlan_hdd_cfg.h b/core/hdd/inc/wlan_hdd_cfg.h
index daa93108b37b..1b8508e29db8 100644
--- a/core/hdd/inc/wlan_hdd_cfg.h
+++ b/core/hdd/inc/wlan_hdd_cfg.h
@@ -47,6 +47,8 @@
 #include <wmi_unified.h>
 
 #define FW_MODULE_LOG_LEVEL_STRING_LENGTH  (255)
+#define TX_SCHED_WRR_PARAM_STRING_LENGTH   (50)
+#define TX_SCHED_WRR_PARAMS_NUM            (5)
 
 #define CFG_ENABLE_RX_THREAD		(1 << 0)
 #define CFG_ENABLE_RPS			(1 << 1)
@@ -3324,6 +3326,42 @@ enum dot11p_mode {
 #define CFG_EDCA_BE_AIFS_VALUE_DEFAULT    (3)
 
 /*
+ * This key is mapping to VO defined in data path module through
+ * OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
+ * WRR TX sched parameters such as skip, credit, limit, credit, disc for VO.
+ * e.g., gEnableTxSchedWrrVO = 10, 9, 8, 1, 8
+ */
+#define CFG_ENABLE_TX_SCHED_WRR_VO          "gEnableTxSchedWrrVO"
+#define CFG_ENABLE_TX_SCHED_WRR_VO_DEFAULT  ""
+
+/*
+ * This key is mapping to VI defined in data path module through
+ * OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
+ * WRR TX sched parameters such as skip, credit, limit, credit, disc for VI.
+ * e.g., gEnableTxSchedWrrVI = 10, 9, 8, 1, 8
+ */
+#define CFG_ENABLE_TX_SCHED_WRR_VI          "gEnableTxSchedWrrVI"
+#define CFG_ENABLE_TX_SCHED_WRR_VI_DEFAULT  ""
+
+/*
+ * This key is mapping to BE defined in data path module through
+ * OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
+ * WRR TX sched parameters such as skip, credit, limit, credit, disc for BE.
+ * e.g., gEnableTxSchedWrrBE = 10, 9, 8, 1, 8
+ */
+#define CFG_ENABLE_TX_SCHED_WRR_BE          "gEnableTxSchedWrrBE"
+#define CFG_ENABLE_TX_SCHED_WRR_BE_DEFAULT  ""
+
+/*
+ * This key is mapping to BK defined in data path module through
+ * OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
+ * WRR TX sched parameters such as skip, credit, limit, credit, disc for BK.
+ * e.g., gEnableTxSchedWrrBK = 10, 9, 8, 1, 8
+ */
+#define CFG_ENABLE_TX_SCHED_WRR_BK          "gEnableTxSchedWrrBK"
+#define CFG_ENABLE_TX_SCHED_WRR_BK_DEFAULT  ""
+
+/*
  * Enable/disable DPTRACE
  * Enabling this might have performace impact.
  */
@@ -4257,6 +4295,16 @@ struct hdd_config {
 	uint32_t edca_vi_aifs;
 	uint32_t edca_bk_aifs;
 	uint32_t edca_be_aifs;
+
+	/* Tuning TX sched parameters for VO (skip credit limit credit disc) */
+	uint8_t  tx_sched_wrr_vo[TX_SCHED_WRR_PARAM_STRING_LENGTH];
+	/* Tuning TX sched parameters for VI (skip credit limit credit disc) */
+	uint8_t  tx_sched_wrr_vi[TX_SCHED_WRR_PARAM_STRING_LENGTH];
+	/* Tuning TX sched parameters for BE (skip credit limit credit disc) */
+	uint8_t  tx_sched_wrr_be[TX_SCHED_WRR_PARAM_STRING_LENGTH];
+	/* Tuning TX sched parameters for BK (skip credit limit credit disc) */
+	uint8_t  tx_sched_wrr_bk[TX_SCHED_WRR_PARAM_STRING_LENGTH];
+
 	bool enable_fatal_event;
 	bool bpf_enabled;
 	bool enable_dp_trace;
diff --git a/core/hdd/src/wlan_hdd_cfg.c b/core/hdd/src/wlan_hdd_cfg.c
index 015faf43c39d..222e272f7a08 100644
--- a/core/hdd/src/wlan_hdd_cfg.c
+++ b/core/hdd/src/wlan_hdd_cfg.c
@@ -3866,6 +3866,27 @@ REG_TABLE_ENTRY g_registry_table[] = {
 			CFG_EDCA_BE_AIFS_VALUE_DEFAULT,
 			CFG_EDCA_BE_AIFS_VALUE_MIN,
 			CFG_EDCA_BE_AIFS_VALUE_MAX),
+
+	REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_VO, WLAN_PARAM_String,
+			struct hdd_config, tx_sched_wrr_vo,
+			VAR_FLAGS_OPTIONAL,
+			(void *) CFG_ENABLE_TX_SCHED_WRR_VO_DEFAULT),
+
+	REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_VI, WLAN_PARAM_String,
+			struct hdd_config, tx_sched_wrr_vi,
+			VAR_FLAGS_OPTIONAL,
+			(void *) CFG_ENABLE_TX_SCHED_WRR_VI_DEFAULT),
+
+	REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_BE, WLAN_PARAM_String,
+			struct hdd_config, tx_sched_wrr_be,
+			VAR_FLAGS_OPTIONAL,
+			(void *) CFG_ENABLE_TX_SCHED_WRR_BE_DEFAULT),
+
+	REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_BK, WLAN_PARAM_String,
+			struct hdd_config, tx_sched_wrr_bk,
+			VAR_FLAGS_OPTIONAL,
+			(void *) CFG_ENABLE_TX_SCHED_WRR_BK_DEFAULT),
+
 #ifdef WLAN_FEATURE_NAN_DATAPATH
 	REG_VARIABLE(CFG_ENABLE_NAN_DATAPATH_NAME, WLAN_PARAM_Integer,
 		struct hdd_config, enable_nan_datapath,
@@ -5701,6 +5722,20 @@ void hdd_cfg_print(hdd_context_t *pHddCtx)
 	hdd_info("Name = [%s] Value = [%u]",
 		CFG_EDCA_BE_AIFS_VALUE_NAME,
 		pHddCtx->config->edca_be_aifs);
+
+	hddLog(LOG2, "Name = [%s] Value = [%s]",
+		CFG_ENABLE_TX_SCHED_WRR_VO,
+		pHddCtx->config->tx_sched_wrr_vo);
+	hddLog(LOG2, "Name = [%s] Value = [%s]",
+		CFG_ENABLE_TX_SCHED_WRR_VI,
+		pHddCtx->config->tx_sched_wrr_vi);
+	hddLog(LOG2, "Name = [%s] Value = [%s]",
+		CFG_ENABLE_TX_SCHED_WRR_BK,
+		pHddCtx->config->tx_sched_wrr_bk);
+	hddLog(LOG2, "Name = [%s] Value = [%s]",
+		CFG_ENABLE_TX_SCHED_WRR_BE,
+		pHddCtx->config->tx_sched_wrr_be);
+
 	hdd_info("Name = [%s] Value = [%u]",
 		CFG_ENABLE_DP_TRACE,
 		pHddCtx->config->enable_dp_trace);
diff --git a/core/wma/src/wma_main.c b/core/wma/src/wma_main.c
index e43eae06b71e..8fb173dd7738 100644
--- a/core/wma/src/wma_main.c
+++ b/core/wma/src/wma_main.c
@@ -1632,6 +1632,38 @@ void ol_cfg_set_flow_control_parameters(struct txrx_pdev_cfg_param_t *olCfg,
 }
 #endif
 
+/**
+ * ol_cfg_update_ac_specs_params() - update ac_specs params
+ * @olcfg: cfg handle
+ * @mac_params: mac params
+ *
+ * Return: none
+ */
+void ol_cfg_update_ac_specs_params(struct txrx_pdev_cfg_param_t *olcfg,
+		struct cds_config_info *cds_cfg)
+{
+	int i;
+
+	if (NULL == olcfg)
+		return;
+
+	if (NULL == cds_cfg)
+		return;
+
+	for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
+		olcfg->ac_specs[i].wrr_skip_weight =
+			cds_cfg->ac_specs[i].wrr_skip_weight;
+		olcfg->ac_specs[i].credit_threshold =
+			cds_cfg->ac_specs[i].credit_threshold;
+		olcfg->ac_specs[i].send_limit =
+			cds_cfg->ac_specs[i].send_limit;
+		olcfg->ac_specs[i].credit_reserve =
+			cds_cfg->ac_specs[i].credit_reserve;
+		olcfg->ac_specs[i].discard_weight =
+			cds_cfg->ac_specs[i].discard_weight;
+	}
+}
+
 #ifdef WLAN_FEATURE_NAN
 /**
  * wma_set_nan_enable() - set nan enable flag in WMA handle
@@ -1966,6 +1998,7 @@ QDF_STATUS wma_open(void *cds_context,
 	olCfg.ce_classify_enabled = cds_cfg->ce_classify_enabled;
 
 	ol_cfg_set_flow_control_parameters(&olCfg, cds_cfg);
+	ol_cfg_update_ac_specs_params(&olCfg, cds_cfg);
 
 	((p_cds_contextType) cds_context)->cfg_ctx =
 		ol_pdev_cfg_attach(((p_cds_contextType) cds_context)->qdf_ctx,