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authorOsvaldo Banuelos <osvaldob@codeaurora.org>2016-10-27 22:25:44 -0700
committerOsvaldo Banuelos <osvaldob@codeaurora.org>2016-11-07 07:49:10 -0800
commitda0db5ee22a52f7bebe766b3a2b756fc9149347f (patch)
tree506c6d0ddb6ddd53453671bf29f1e624a9bd5c3c
parent758693b4a6d94a0724081578d24f6ba1cc449255 (diff)
ARM: dts: msm: update VDD_APC CPR settings for msmcobalt
Update the default CPR min/max step quotient, count repeat, consecutive down, and aging RO scaling factor values for VDD_APC0 and VDD_APC1 to match the latest hardware guidelines. CRs-Fixed: 1080409 Change-Id: Ibb35a3f475725af96276389f78abb790ea5b5b81 Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi16
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi4
2 files changed, 11 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi
index bb72cf3a0d2c..e23112891e82 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-regulator.dtsi
@@ -590,8 +590,9 @@
qcom,cpr-idle-cycles = <15>;
qcom,cpr-up-down-delay-time = <3000>;
qcom,cpr-step-quot-init-min = <11>;
- qcom,cpr-step-quot-init-max = <13>;
+ qcom,cpr-step-quot-init-max = <12>;
qcom,cpr-count-mode = <0>; /* All at once */
+ qcom,cpr-count-repeat = <1>;
qcom,cpr-down-error-step-limit = <1>;
qcom,cpr-up-error-step-limit = <1>;
qcom,cpr-corner-switch-delay-time = <209>;
@@ -618,7 +619,7 @@
thread@0 {
qcom,cpr-thread-id = <0>;
qcom,cpr-consecutive-up = <0>;
- qcom,cpr-consecutive-down = <0>;
+ qcom,cpr-consecutive-down = <2>;
qcom,cpr-up-threshold = <2>;
qcom,cpr-down-threshold = <2>;
@@ -740,7 +741,7 @@
qcom,cpr-aging-max-voltage-adjustment = <15000>;
qcom,cpr-aging-ref-corner = <22>;
- qcom,cpr-aging-ro-scaling-factor = <2950>;
+ qcom,cpr-aging-ro-scaling-factor = <1620>;
qcom,allow-aging-voltage-adjustment = <0>;
qcom,allow-aging-open-loop-voltage-adjustment =
<1>;
@@ -761,9 +762,10 @@
qcom,cpr-loop-time = <5000000>;
qcom,cpr-idle-cycles = <15>;
qcom,cpr-up-down-delay-time = <3000>;
- qcom,cpr-step-quot-init-min = <11>;
- qcom,cpr-step-quot-init-max = <13>;
+ qcom,cpr-step-quot-init-min = <9>;
+ qcom,cpr-step-quot-init-max = <14>;
qcom,cpr-count-mode = <0>; /* All at once */
+ qcom,cpr-count-repeat = <1>;
qcom,cpr-down-error-step-limit = <1>;
qcom,cpr-up-error-step-limit = <1>;
qcom,cpr-corner-switch-delay-time = <209>;
@@ -790,7 +792,7 @@
thread@0 {
qcom,cpr-thread-id = <0>;
qcom,cpr-consecutive-up = <0>;
- qcom,cpr-consecutive-down = <0>;
+ qcom,cpr-consecutive-down = <2>;
qcom,cpr-up-threshold = <2>;
qcom,cpr-down-threshold = <2>;
@@ -932,7 +934,7 @@
qcom,cpr-aging-max-voltage-adjustment = <15000>;
qcom,cpr-aging-ref-corner = <25>;
- qcom,cpr-aging-ro-scaling-factor = <2950>;
+ qcom,cpr-aging-ro-scaling-factor = <1700>;
qcom,allow-aging-voltage-adjustment = <0>;
qcom,allow-aging-open-loop-voltage-adjustment =
<1>;
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
index beecee843778..586c88862877 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
@@ -462,7 +462,7 @@
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
qcom,cpr-aging-ref-corner = <22 22>;
- qcom,cpr-aging-ro-scaling-factor = <2950>;
+ qcom,cpr-aging-ro-scaling-factor = <1620>;
qcom,allow-aging-voltage-adjustment = <0>;
};
@@ -623,7 +623,7 @@
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
qcom,cpr-aging-ref-corner = <30 26>;
- qcom,cpr-aging-ro-scaling-factor = <2950>;
+ qcom,cpr-aging-ro-scaling-factor = <1700>;
qcom,allow-aging-voltage-adjustment = <0>;
};