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| author | Linux Build Service Account <lnxbuild@localhost> | 2017-04-10 09:26:31 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-04-10 09:26:30 -0700 |
| commit | d744e18a0aff55459377294d987b96e3c880628f (patch) | |
| tree | 423e97d2d2e02443b762c7452dfca3dbbd72a2db | |
| parent | ce83deeacc30346290b632d3b55e493094277d05 (diff) | |
| parent | a32245e79fc3d14acd8ce2bfd22dd8057dc87d53 (diff) | |
Merge "ARM: dts: msm: Put secondary QUSB2 PHY in reset state for SDM660"
| -rw-r--r-- | arch/arm/boot/dts/qcom/sdm660-common.dtsi | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660-common.dtsi b/arch/arm/boot/dts/qcom/sdm660-common.dtsi index fbe6d1d8cc74..33edebec2f72 100644 --- a/arch/arm/boot/dts/qcom/sdm660-common.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-common.dtsi @@ -452,6 +452,40 @@ qcom,reset-ep-after-lpm-resume; }; + qusb_phy1: qusb@c014000 { + compatible = "qcom,qusb2phy"; + reg = <0x0c014000 0x180>, + <0x00188014 0x4>; + reg-names = "qusb_phy_base", + "ref_clk_addr"; + vdd-supply = <&pm660l_l1>; + vdda18-supply = <&pm660_l10>; + vdda33-supply = <&pm660l_l7>; + qcom,vdd-voltage-level = <1 5 7>; + qcom,qusb-phy-init-seq = <0xF8 0x80 + 0xB3 0x84 + 0x83 0x88 + 0xC0 0x8C + 0x30 0x08 + 0x79 0x0C + 0x21 0x10 + 0x14 0x9C + 0x9F 0x1C + 0x00 0x18>; + phy_type = "utmi"; + qcom,phy-clk-scheme = "cml"; + qcom,major-rev = <1>; + qcom,hold-reset; + + clocks = <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, + <&clock_gcc GCC_RX1_USB2_CLKREF_CLK>, + <&clock_rpmcc RPM_LN_BB_CLK1>; + clock-names = "cfg_ahb_clk", "ref_clk", "ref_clk_src"; + + resets = <&clock_gcc GCC_QUSB2PHY_SEC_BCR>; + reset-names = "phy_reset"; + }; + sdhc_1: sdhci@c0c4000 { compatible = "qcom,sdhci-msm-v5"; reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>; |