clk: msm: clock-alpha-pll: Allow interrupts to be enabled during set_rate

Some PLL implementations depend on the CPU being able to handle
certain interrupts in order for the set_rate operation to
complete. Allow interrupts to be handled in the set_rate op.

CRs-Fixed: 960701
Change-Id: I6fda5ed9eb7d6f2e2cd91c58ebabfd7bc1c8a2fc
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>

2 files changed, 10 insertions, 2 deletions

diff --git a/drivers/clk/msm/clock-alpha-pll.c b/drivers/clk/msm/clock-alpha-pll.c
index b9a1167a790d..834315aa4993 100644
--- a/drivers/clk/msm/clock-alpha-pll.c
+++ b/drivers/clk/msm/clock-alpha-pll.c
@@ -612,13 +612,17 @@ static int alpha_pll_set_rate(struct clk *c, unsigned long rate)
 		return -EINVAL;
 	}
 
+	if (pll->no_irq_dis)
+		spin_lock(&c->lock);
+	else
+		spin_lock_irqsave(&c->lock, flags);
+
 	/*
 	 * For PLLs that do not support dynamic programming (dynamic_update
 	 * is not set), ensure PLL is off before changing rate. For
 	 * optimization reasons, assume no downstream clock is actively
 	 * using it.
 	 */
-	spin_lock_irqsave(&c->lock, flags);
 	if (c->count && !pll->dynamic_update)
 		c->ops->disable(c);
 
@@ -644,7 +648,10 @@ static int alpha_pll_set_rate(struct clk *c, unsigned long rate)
 	if (c->count && !pll->dynamic_update)
 		c->ops->enable(c);
 
-	spin_unlock_irqrestore(&c->lock, flags);
+	if (pll->no_irq_dis)
+		spin_unlock(&c->lock);
+	else
+		spin_unlock_irqrestore(&c->lock, flags);
 	return 0;
 }
 
diff --git a/include/soc/qcom/clock-alpha-pll.h b/include/soc/qcom/clock-alpha-pll.h
index 0b5329ba817c..acffe33dc4f3 100644
--- a/include/soc/qcom/clock-alpha-pll.h
+++ b/include/soc/qcom/clock-alpha-pll.h
@@ -79,6 +79,7 @@ struct alpha_pll_clk {
 	 * that the workaround is required.
 	 */
 	bool offline_bit_workaround;
+	bool no_irq_dis;
 	bool is_fabia;
 	unsigned long min_supported_freq;
 	struct clk c;