diff options
| author | Rajkumar Subbiah <rsubbia@codeaurora.org> | 2017-02-24 17:23:03 -0500 |
|---|---|---|
| committer | Rajkumar Subbiah <rsubbia@codeaurora.org> | 2017-02-27 12:39:22 -0500 |
| commit | d5ee46812127d16ca72aa41466c2e6bce31f7451 (patch) | |
| tree | 0e2751ca765397c8632cb9331ab34861b32c9dc2 | |
| parent | c4b8f7345591598bccc856150c65d787e894c039 (diff) | |
msm: mdss: flush timing after splash done for video panel
During continuous splash handoff the pipes are unstaged and the
timing engine is being turned off. But this change is not
being flushed. Right after that we release the splash memory
and this sometimes causes a memory fault. This change adds
the necessary flush.
Change-Id: Ia78359fd8159a7217ffc4f0192788f295ac3504c
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_intf_video.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c index 663d63092ebf..57bbf4c030d2 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c +++ b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c @@ -1671,7 +1671,7 @@ int mdss_mdp_video_reconfigure_splash_done(struct mdss_mdp_ctl *ctl, struct mdss_panel_data *pdata; int i, ret = 0, off; u32 data, flush; - struct mdss_mdp_video_ctx *ctx; + struct mdss_mdp_video_ctx *ctx, *sctx = NULL; struct mdss_mdp_ctl *sctl; if (!ctl) { @@ -1695,10 +1695,13 @@ int mdss_mdp_video_reconfigure_splash_done(struct mdss_mdp_ctl *ctl, pdata->panel_info.cont_splash_enabled = 0; sctl = mdss_mdp_get_split_ctl(ctl); - if (sctl) + if (sctl) { sctl->panel_data->panel_info.cont_splash_enabled = 0; - else if (ctl->panel_data->next && is_pingpong_split(ctl->mfd)) + sctx = (struct mdss_mdp_video_ctx *) sctl->intf_ctx[MASTER_CTX]; + } else if (ctl->panel_data->next && is_pingpong_split(ctl->mfd)) { ctl->panel_data->next->panel_info.cont_splash_enabled = 0; + sctx = (struct mdss_mdp_video_ctx *) ctl->intf_ctx[SLAVE_CTX]; + } if (!handoff) { ret = mdss_mdp_ctl_intf_event(ctl, MDSS_EVENT_CONT_SPLASH_BEGIN, @@ -1724,6 +1727,8 @@ int mdss_mdp_video_reconfigure_splash_done(struct mdss_mdp_ctl *ctl, mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, flush); mdp_video_write(ctx, MDSS_MDP_REG_INTF_TIMING_ENGINE_EN, 0); + mdss_mdp_video_timegen_flush(ctl, sctx); + /* wait for 1 VSYNC for the pipe to be unstaged */ msleep(20); |