diff options
| author | Adrian Salido-Moreno <adrianm@codeaurora.org> | 2013-03-12 16:41:57 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:15:47 -0700 |
| commit | d5a55d52ee49e59a25fb477fa807406b6410c52e (patch) | |
| tree | b2e0b3fbc4ae0b239a9bc268a40f4185ba8c20cb | |
| parent | f7ad8f651d8bfb3ede5132f00700a4447685ec3c (diff) | |
msm: mdss: observe dual pipe mux inefficiencies for mdp clock rate
There is some inefficiency in dual pipe mux where it can only use 8 out
of 9 clocks when running in dual pipe mode. In order to account for
this, need to ensure that minimum MDP clock accounts for this
inefficiency.
Change-Id: Ia7bebaaff7720cd293cd478f7f45ca8ed8d36f2f
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_ctl.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c index 108340de5d9a..97998d8cc8ff 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c +++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c @@ -200,6 +200,20 @@ static int mdss_mdp_ctl_perf_update(struct mdss_mdp_ctl *ctl) total_ib_quota += ib_quota; if (clk_rate > max_clk_rate) max_clk_rate = clk_rate; + + if (ctl->intf_type) { + struct mdss_panel_info *pinfo; + + pinfo = &ctl->panel_data->panel_info; + clk_rate = (ctl->intf_type == MDSS_INTF_DSI) ? + pinfo->mipi.dsi_pclk_rate : + pinfo->clk_rate; + + /* minimum clock rate due to inefficiency in 3dmux */ + clk_rate = mult_frac(clk_rate >> 1, 9, 8); + if (clk_rate > max_clk_rate) + max_clk_rate = clk_rate; + } } /* request minimum bandwidth to have bus clock on when display is on */ |