diff options
| author | Mike McCormack <mikem@ring3k.org> | 2011-01-31 22:10:12 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-01-31 13:57:05 -0800 |
| commit | d163f324af5cd2c504796f471f29a8b62d71bf93 (patch) | |
| tree | 0b0fe80383414741028b9180cf19a539f4d6f94c | |
| parent | d5fdaa3ae73ef61de5a82b63a601afa9c4dc1d3b (diff) | |
Staging: rtl8192e: Move static variable to device struct
Signed-off-by: Mike McCormack <mikem@ring3k.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| -rw-r--r-- | drivers/staging/rtl8192e/r8192E.h | 4 | ||||
| -rw-r--r-- | drivers/staging/rtl8192e/r8192E_core.c | 12 |
2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/staging/rtl8192e/r8192E.h b/drivers/staging/rtl8192e/r8192E.h index 0189a3d290e8..a8b69d3960ae 100644 --- a/drivers/staging/rtl8192e/r8192E.h +++ b/drivers/staging/rtl8192e/r8192E.h @@ -975,6 +975,10 @@ typedef struct r8192_priv bool bLastDTPFlag_High; bool bLastDTPFlag_Low; + /* OFDM RSSI. For high power or not */ + u8 phy_check_reg824; + u32 phy_reg824_bit9; + //Add by amy for Rate Adaptive rate_adaptive rate_adaptive; //Add by amy for TX power tracking diff --git a/drivers/staging/rtl8192e/r8192E_core.c b/drivers/staging/rtl8192e/r8192E_core.c index c5be6bcbd49f..bb86f93c0086 100644 --- a/drivers/staging/rtl8192e/r8192E_core.c +++ b/drivers/staging/rtl8192e/r8192E_core.c @@ -5001,10 +5001,6 @@ static void rtl8192_query_rxphystatus( u8 is_cck_rate=0; u8 rf_rx_num = 0; - /* 2007/07/04 MH For OFDM RSSI. For high power or not. */ - static u8 check_reg824 = 0; - static u32 reg824_bit9 = 0; - is_cck_rate = rx_hal_is_cck_rate(pdrvinfo); // Record it for next packet processing @@ -5015,10 +5011,10 @@ static void rtl8192_query_rxphystatus( pstats->bPacketBeacon = precord_stats->bPacketBeacon = bPacketBeacon; pstats->bToSelfBA = precord_stats->bToSelfBA = bToSelfBA; /*2007.08.30 requested by SD3 Jerry */ - if(check_reg824 == 0) + if (priv->phy_check_reg824 == 0) { - reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200); - check_reg824 = 1; + priv->phy_reg824_bit9 = rtl8192_QueryBBReg(priv->ieee80211->dev, rFPGA0_XA_HSSIParameter2, 0x200); + priv->phy_check_reg824 = 1; } @@ -5064,7 +5060,7 @@ static void rtl8192_query_rxphystatus( } #endif - if(!reg824_bit9) + if (!priv->phy_reg824_bit9) { report = pcck_buf->cck_agc_rpt & 0xc0; report = report>>6; |