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authorLloyd Atkinson <latkinso@codeaurora.org>2016-08-23 14:32:32 -0400
committerGerrit - the friendly Code Review server <code-review@localhost>2016-11-30 14:53:47 -0800
commitc7ef2fa30934421806f873b8c40278376618c486 (patch)
tree813ab241e42740a6215e17c3febd3800072c9814
parent871197cafa96534c54101bc9ed695f33cb74b4ff (diff)
drm/msm/sde: reset ctl mixer config at end of use case
Need to take the control path out of any source split or other configuration at the end of a use case to prepare for the next client. Change-Id: I9a2fb57dcafc576a23a13da1906a44e9992aeb74 Signed-off-by: Lloyd Atkinson <latkinso@codeaurora.org>
-rw-r--r--drivers/gpu/drm/msm/sde/sde_crtc.c3
-rw-r--r--drivers/gpu/drm/msm/sde/sde_hw_ctl.c12
-rw-r--r--drivers/gpu/drm/msm/sde/sde_hw_ctl.h12
3 files changed, 27 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
index 7726bb04b823..875c3c99f337 100644
--- a/drivers/gpu/drm/msm/sde/sde_crtc.c
+++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
@@ -268,6 +268,9 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc)
}
mixer[i].mixer_op_mode = 0;
mixer[i].flush_mask = 0;
+ if (mixer[i].hw_ctl->ops.clear_all_blendstages)
+ mixer[i].hw_ctl->ops.clear_all_blendstages(
+ mixer[i].hw_ctl);
}
/* initialize stage cfg */
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_ctl.c b/drivers/gpu/drm/msm/sde/sde_hw_ctl.c
index 2f1bac78b14e..00dae5dc6638 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_ctl.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_ctl.c
@@ -258,6 +258,17 @@ static int sde_hw_ctl_reset_control(struct sde_hw_ctl *ctx)
return -EINVAL;
}
+static void sde_hw_ctl_clear_all_blendstages(struct sde_hw_ctl *ctx)
+{
+ struct sde_hw_blk_reg_map *c = &ctx->hw;
+ int i;
+
+ for (i = 0; i < ctx->mixer_count; i++) {
+ SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0);
+ SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0);
+ }
+}
+
static void sde_hw_ctl_setup_blendstage(struct sde_hw_ctl *ctx,
enum sde_lm lm, struct sde_hw_stage_cfg *stage_cfg, u32 index)
{
@@ -389,6 +400,7 @@ static void _setup_ctl_ops(struct sde_hw_ctl_ops *ops,
ops->trigger_start = sde_hw_ctl_trigger_start;
ops->setup_intf_cfg = sde_hw_ctl_intf_cfg;
ops->reset = sde_hw_ctl_reset_control;
+ ops->clear_all_blendstages = sde_hw_ctl_clear_all_blendstages;
ops->setup_blendstage = sde_hw_ctl_setup_blendstage;
ops->get_bitmask_sspp = sde_hw_ctl_get_bitmask_sspp;
ops->get_bitmask_mixer = sde_hw_ctl_get_bitmask_mixer;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
index 2f9ff5b76c3b..2fb7b377e51d 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_ctl.h
@@ -125,6 +125,18 @@ struct sde_hw_ctl_ops {
u32 *flushbits,
enum sde_wb blk);
+ /**
+ * Set all blend stages to disabled
+ * @ctx : ctl path ctx pointer
+ */
+ void (*clear_all_blendstages)(struct sde_hw_ctl *ctx);
+
+ /**
+ * Configure layer mixer to pipe configuration
+ * @ctx : ctl path ctx pointer
+ * @lm : layer mixer enumeration
+ * @cfg : blend stage configuration
+ */
void (*setup_blendstage)(struct sde_hw_ctl *ctx,
enum sde_lm lm, struct sde_hw_stage_cfg *cfg, u32 index);
};