diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-09-28 08:37:30 -0700 |
|---|---|---|
| committer | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-09-28 10:26:19 -0700 |
| commit | bfebb79e7c5215c50d1e8ff2a01cef25ba6087c2 (patch) | |
| tree | 77a1943a2ce588626211595939fb6f0ddb5b5ccb | |
| parent | 626caf4e54864d90e8d104277f9a1446e487c7e1 (diff) | |
clk: msm: clock-gpu-cobalt: Update the graphics core clock frequency
Remove support for 710 MHz as the highest possible frequency that
the graphics core clock can scale to on MSMCOBALT v2. The new FMAX
will be 670 MHz.
CRs-Fixed: 1072272
Change-Id: I39119c9dd527dec6a9f4745c0502c83d083f4b26
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi | 6 | ||||
| -rw-r--r-- | drivers/clk/msm/clock-gpu-cobalt.c | 3 |
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi index db50038b297e..33419a0d1606 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi @@ -202,8 +202,7 @@ < 414000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >, < 515000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >, < 596000000 6 RPM_SMD_REGULATOR_LEVEL_NOM >, - < 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >, - < 710000000 8 RPM_SMD_REGULATOR_LEVEL_TURBO >; + < 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >; qcom,gfxfreq-mx-speedbin0 = < 0 0 >, < 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >, @@ -212,8 +211,7 @@ < 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >, < 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >, < 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >, - < 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >, - < 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >; + < 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >; }; &mdss_mdp { diff --git a/drivers/clk/msm/clock-gpu-cobalt.c b/drivers/clk/msm/clock-gpu-cobalt.c index 7cec9be1f42c..9d93351a083e 100644 --- a/drivers/clk/msm/clock-gpu-cobalt.c +++ b/drivers/clk/msm/clock-gpu-cobalt.c @@ -173,7 +173,6 @@ static struct clk_freq_tbl ftbl_gfx3d_clk_src_v2[] = { F_SLEW( 515000000, 1030000000, gpu_pll0_pll_out_even, 1, 0, 0), F_SLEW( 596000000, 1192000000, gpu_pll0_pll_out_even, 1, 0, 0), F_SLEW( 670000000, 1340000000, gpu_pll0_pll_out_even, 1, 0, 0), - F_SLEW( 710000000, 1420000000, gpu_pll0_pll_out_even, 1, 0, 0), F_END }; @@ -612,7 +611,7 @@ static void msm_gfxcc_hamster_fixup(void) static void msm_gfxcc_cobalt_v2_fixup(void) { - gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1420000500; + gpu_pll0_pll.c.fmax[VDD_DIG_MIN] = 1340000500; gfx3d_clk_src.freq_tbl = ftbl_gfx3d_clk_src_v2; } |