ARM: dts: msm: Modify QRD interposer dts file for msm8998

Update regulators for clocks and usb phy.

CRs-Fixed: 1096674
Change-Id: Ib205ccebaec612fd9d1d6bb1a02a4f14be8f21c1
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>

2 files changed, 57 insertions, 155 deletions

diff --git a/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dts b/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dts
index ddae02812731..013c849c4936 100644
--- a/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dts
+++ b/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dts
@@ -14,6 +14,9 @@
 /dts-v1/;
 
 #include "msm8998-v2.1-interposer-msmfalcon-qrd.dtsi"
+#include "msm8998-interposer-pmfalcon.dtsi"
+#include "msm8998-interposer-msmfalcon-audio.dtsi"
+#include "msm8998-interposer-camera-sensor-mtp.dtsi"
 
 / {
 	model =
@@ -41,174 +44,72 @@
 };
 
 &clock_gcc {
-	/delete-property/vdd_dig-supply;
-	/delete-property/vdd_dig_ao-supply;
+	vdd_dig-supply = <&pm2falcon_s3_level>;
+	vdd_dig_ao-supply = <&pm2falcon_s3_level_ao>;
 };
 
 &clock_mmss {
-	/delete-property/vdd_dig-supply;
-	/delete-property/vdd_mmsscc_mx-supply;
+	vdd_dig-supply = <&pm2falcon_s3_level>;
+	vdd_mmsscc_mx-supply = <&pm2falcon_s5_level>;
 };
 
 &clock_gpu {
-	/delete-property/vdd_dig-supply;
+	vdd_dig-supply = <&pm2falcon_s3_level>;
 };
 
 &clock_gfx {
-	/delete-property/vdd_mx-supply;
-	/delete-property/vdd_gpu_mx-supply;
-};
-
-&pcie0 {
-	/delete-property/vreg-1.8-supply;
-	/delete-property/vreg-0.9-supply;
-	/delete-property/vreg-cx-supply;
+	/* GFX Rail = CX */
+	vdd_gpucc-supply = <&pm2falcon_s3_level>;
+	vdd_mx-supply = <&pm2falcon_s5_level>;
+	vdd_gpu_mx-supply = <&pm2falcon_s5_level>;
+	qcom,gfxfreq-speedbin0 =
+		<         0 0                           0 >,
+		< 180000000 RPM_SMD_REGULATOR_LEVEL_MIN_SVS
+					RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 257000000 RPM_SMD_REGULATOR_LEVEL_LOW_SVS
+					RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 342000000 RPM_SMD_REGULATOR_LEVEL_SVS
+					RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 414000000 RPM_SMD_REGULATOR_LEVEL_SVS_PLUS
+					RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 515000000 RPM_SMD_REGULATOR_LEVEL_NOM
+					RPM_SMD_REGULATOR_LEVEL_NOM >,
+		< 596000000 RPM_SMD_REGULATOR_LEVEL_NOM_PLUS
+					RPM_SMD_REGULATOR_LEVEL_NOM >,
+		< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO
+					RPM_SMD_REGULATOR_LEVEL_TURBO >,
+		< 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO
+					RPM_SMD_REGULATOR_LEVEL_TURBO >;
+	qcom,gfxfreq-mx-speedbin0 =
+		<         0                           0 >,
+		< 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 257000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 342000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
+		< 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
+		< 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
+		< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >,
+		< 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;
+};
+
+&gdsc_gpu_gx {
+	clock-names = "core_root_clk";
+	clocks = <&clock_gfx clk_gfx3d_clk_src>;
+	qcom,force-enable-root-clk;
+	/* GFX Rail = CX */
+	parent-supply = <&pm2falcon_s3_level>;
+	status = "ok";
 };
 
 &qusb_phy0 {
-	/delete-property/vdd-supply;
-	/delete-property/vdda18-supply;
-	/delete-property/vdda33-supply;
+	vdd-supply = <&pm2falcon_l1>;
+	vdda18-supply = <&pmfalcon_l10>;
+	qcom,vdd-voltage-level = <0 925000 925000>;
+	vdda33-supply = <&pm2falcon_l7>;
 };
 
 &ssphy {
-	/delete-property/vdd-supply;
-	/delete-property/core-supply;
-};
-
-&usb3 {
-	/delete-property/extcon;
-};
-
-&mdss_dsi {
-	/delete-property/vdda-1p2-supply;
-	/delete-property/vdda-0p9-supply;
-};
-
-&mdss_dsi0 {
-	/delete-property/wqhd-vddio-supply;
-	/delete-property/lab-supply;
-	/delete-property/ibb-supply;
-};
-
-&mdss_dsi1 {
-	/delete-property/wqhd-vddio-supply;
-	/delete-property/lab-supply;
-	/delete-property/ibb-supply;
-};
-
-&mdss_hdmi_pll {
-	/delete-property/vdda-pll-supply;
-	/delete-property/vdda-phy-supply;
-};
-
-&mdss_dp_ctrl {
-	/delete-property/vdda-1p2-supply;
-	/delete-property/vdda-0p9-supply;
-	/delete-property/qcom,dp-usbpd-detection;
-};
-
-&apc0_cpr {
-	 /* disable aging and closed-loop */
-	/delete-property/vdd-supply;
-	/delete-property/qcom,cpr-enable;
-	/delete-property/qcom,cpr-hw-closed-loop;
-	/delete-property/qcom,cpr-aging-ref-voltage;
-};
-
-&apc0_pwrcl_vreg {
-	/delete-property/qcom,cpr-aging-max-voltage-adjustment;
-	/delete-property/qcom,cpr-aging-ref-corner;
-	/delete-property/qcom,cpr-aging-ro-scaling-factor;
-	/delete-property/qcom,allow-aging-voltage-adjustment;
-	/delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
-};
-
-&apc1_cpr {
-	/* disable aging and closed-loop */
-	/delete-property/vdd-supply;
-	/delete-property/qcom,cpr-enable;
-	/delete-property/qcom,cpr-hw-closed-loop;
-	/delete-property/qcom,cpr-aging-ref-voltage;
-};
-
-&apc1_perfcl_vreg {
-	/delete-property/qcom,cpr-aging-max-voltage-adjustment;
-	/delete-property/qcom,cpr-aging-ref-corner;
-	/delete-property/qcom,cpr-aging-ro-scaling-factor;
-	/delete-property/qcom,allow-aging-voltage-adjustment;
-	/delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
-};
-
-&gfx_cpr {
-	reg = <0x05061000 0x4000>,
-		<0x00784000 0x1000>;
-	reg-names = "cpr_ctrl", "fuse_base";
-
-	/* disable aging and closed-loop */
-	/delete-property/vdd-supply;
-	/delete-property/qcom,cpr-enable;
-	/delete-property/qcom,cpr-aging-ref-voltage;
-	/delete-property/qcom,cpr-aging-allowed-reg-mask;
-	/delete-property/qcom,cpr-aging-allowed-reg-value;
-};
-
-&gfx_vreg {
-	/delete-property/qcom,cpr-aging-max-voltage-adjustment;
-	/delete-property/qcom,cpr-aging-ref-corner;
-	/delete-property/qcom,cpr-aging-ro-scaling-factor;
-	/delete-property/qcom,allow-aging-voltage-adjustment;
-	/delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
-};
-
-&clock_audio {
-	/delete-property/qcom,audio-ref-clk-gpio;
+	vdd-supply = <&pm2falcon_l1>;
+	qcom,vdd-voltage-level = <0 925000 925000>;
+	core-supply = <&pmfalcon_l1>;
 };
-
-&soc {
-	/delete-node/qcom,csid@ca30000;
-	/delete-node/qcom,csid@ca30400;
-	/delete-node/qcom,csid@ca30800;
-	/delete-node/qcom,csid@ca30c00;
-
-	/delete-node/qcom,lpass@17300000;
-	/delete-node/qcom,mss@4080000;
-	/delete-node/qcom,spss@1d00000;
-	/delete-node/qcom,bcl;
-	/delete-node/qcom,msm-thermal;
-	/delete-node/qcom,ssc@5c00000;
-	/delete-node/qcom,icnss@18800000;
-	/delete-node/qcom,wil6210;
-	/delete-node/qcom,rpm-smd;
-	/delete-node/qcom,spmi@800f000;
-
-
-	rpm_bus: qcom,rpm-smd {
-		compatible = "qcom,rpm-glink";
-		qcom,glink-edge = "rpm";
-		rpm-channel-name = "rpm_requests";
-	};
-
-	spmi_bus: qcom,spmi@800f000 {
-		compatible = "qcom,spmi-pmic-arb";
-		reg =   <0x800f000 0x1000>,
-			<0x8400000 0x1000000>,
-			<0x9400000 0x1000000>,
-			<0xa400000 0x220000>,
-			<0x800a000 0x3000>;
-		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
-		interrupt-names = "periph_irq";
-		interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
-		qcom,ee = <0>;
-		qcom,channel = <0>;
-		#address-cells = <2>;
-		#size-cells = <0>;
-		interrupt-controller;
-		#interrupt-cells = <4>;
-		cell-index = <0>;
-	};
-};
-
-#include "msm-pmfalcon.dtsi"
-#include "msm-pm2falcon.dtsi"
-#include "msmfalcon-regulator.dtsi"
diff --git a/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dtsi b/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dtsi
index 775b6b1190d1..83368136a8b3 100644
--- a/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8998-v2.1-interposer-msmfalcon-qrd.dtsi
@@ -12,6 +12,7 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "msm8998-v2.1-interposer-msmfalcon.dtsi"
+#include "msm8998-camera-sensor-mtp.dtsi"
 
 / {
 	bluetooth: bt_wcn3990 {