diff options
| author | Sharat Masetty <smasetty@codeaurora.org> | 2017-04-06 15:43:14 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-04-11 23:59:17 -0700 |
| commit | ba1ad633396bafc23cabfea286f14f4930a07d02 (patch) | |
| tree | d1866719bedb25ffa925170b467efa7e68dbf68a | |
| parent | 4901c7fce456a3ad5d80836000539674a885913e (diff) | |
drm/msm: Re-trigger preemption upon command completion
Trigger preemption from the interrupt handler. This allows us
to aggressively change ringbuffers especially to lower priority
ones and finish working on pending commands.
Change-Id: Ic05213f3d02b1bb7400461edd0d19e38d5b01ec2
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 5b2c7e77771c..32b2c7fab839 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1039,8 +1039,10 @@ static irqreturn_t a5xx_irq(struct msm_gpu *gpu) if (status & A5XX_RBBM_INT_0_MASK_GPMU_VOLTAGE_DROOP) a5xx_gpmu_err_irq(gpu); - if (status & A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS) + if (status & A5XX_RBBM_INT_0_MASK_CP_CACHE_FLUSH_TS) { + a5xx_preempt_trigger(gpu); msm_gpu_retire(gpu); + } if (status & A5XX_RBBM_INT_0_MASK_CP_SW) a5xx_preempt_irq(gpu); |