ARM: dts: msm: Remove clocks listed under video and camera GDSC nodes

The core and peripheral memory retention bits no longer need to be
set and cleared by the GDSC driver on MSMCOBALT. Instead, the video
and camera client drivers will use the clk_set_flags API to toggle
these bits as needed.

Change-Id: Ia10ff063d8dc7b52a52e0ff22a2b0a46cc171eb5
CRs-Fixed: 1044274
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>

1 files changed, 0 insertions, 19 deletions

diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
index aa9390de6525..9dfddb50f640 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi
@@ -2834,53 +2834,34 @@
 };
 
 &gdsc_venus {
-	clock-names = "bus_clk", "maxi_clk", "core_clk";
-	clocks = <&clock_mmss clk_mmss_video_axi_clk>,
-		 <&clock_mmss clk_mmss_video_maxi_clk>,
-		 <&clock_mmss clk_mmss_video_core_clk>;
 	status = "ok";
 };
 
 &gdsc_venus_core0 {
-	clock-names = "core0_clk";
-	clocks = <&clock_mmss clk_mmss_video_subcore0_clk>;
 	status = "ok";
 	qcom,support-hw-trigger;
 };
 
 &gdsc_venus_core1 {
-	clock-names = "core1_clk";
-	clocks = <&clock_mmss clk_mmss_video_subcore1_clk>;
 	status = "ok";
 	qcom,support-hw-trigger;
 };
 
 &gdsc_camss_top {
-	clock-names = "bus_clk", "vfe_axi";
-	clocks = <&clock_mmss clk_mmss_camss_cpp_axi_clk>,
-		 <&clock_mmss clk_mmss_camss_vfe_vbif_axi_clk>;
 	status = "ok";
 };
 
 &gdsc_vfe0 {
-	clock-names = "core0_clk" , "core0_stream_clk";
-	clocks = <&clock_mmss clk_mmss_camss_vfe0_clk>,
-		 <&clock_mmss clk_mmss_camss_vfe0_stream_clk>;
 	parent-supply = <&gdsc_camss_top>;
 	status = "ok";
 };
 
 &gdsc_vfe1 {
-	clock-names = "core1_clk" , "core1_stream_clk";
-	clocks = <&clock_mmss clk_mmss_camss_vfe1_clk>,
-		 <&clock_mmss clk_mmss_camss_vfe1_stream_clk>;
 	parent-supply = <&gdsc_camss_top>;
 	status = "ok";
 };
 
 &gdsc_cpp {
-	clock-names = "core_clk";
-	clocks = <&clock_mmss clk_mmss_camss_cpp_clk>;
 	parent-supply = <&gdsc_camss_top>;
 	status = "ok";
 };