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authorNicholas Troast <ntroast@codeaurora.org>2017-03-31 09:39:28 -0700
committerNicholas Troast <ntroast@codeaurora.org>2017-04-04 09:05:34 -0700
commitb76ebafbd9b6a96ba1504409aec49f860ae993b4 (patch)
treedf003c0911ed61ba877d1bd8732f7a4f10ceae8b
parent92124c76a2bd3e0c1d98de91d09199558117a1a9 (diff)
iio: qcom-tadc: use HW default for batt therm HW conversion trigger
The battery thermistor channel is unused in parallel charge applications since the primary charger disables the parallel charger when hard JEITA limits are reached. In standalone applications the battery thermistor channel is used since it is required for JEITA. The hardware defaults take care of both of these applications hence mask the register writes to enable only the die temperature, and connector thermistor hardware conversion triggers. This will ensure the battery thermistor hardware conversion trigger is left to the hardware default. Change-Id: Iea2fc779562436dfae3bd41c944d5727366006b2 Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
-rw-r--r--drivers/iio/adc/qcom-tadc.c49
1 files changed, 42 insertions, 7 deletions
diff --git a/drivers/iio/adc/qcom-tadc.c b/drivers/iio/adc/qcom-tadc.c
index 054dfcc8556a..05b1985ba378 100644
--- a/drivers/iio/adc/qcom-tadc.c
+++ b/drivers/iio/adc/qcom-tadc.c
@@ -228,6 +228,7 @@ struct tadc_chip {
struct votable *tadc_disable_votable;
struct work_struct status_change_work;
struct notifier_block nb;
+ u8 hwtrig_conv;
};
struct tadc_pt {
@@ -356,6 +357,26 @@ unlock:
return rc;
}
+static int tadc_masked_write(struct tadc_chip *chip, u16 reg, u8 mask, u8 data)
+{
+ int rc = 0;
+
+ mutex_lock(&chip->write_lock);
+ if (tadc_is_reg_locked(chip, reg)) {
+ rc = regmap_write(chip->regmap, (reg & 0xFF00) | 0xD0, 0xA5);
+ if (rc < 0) {
+ pr_err("Couldn't unlock secure register rc=%d\n", rc);
+ goto unlock;
+ }
+ }
+
+ rc = regmap_update_bits(chip->regmap, reg, mask, data);
+
+unlock:
+ mutex_unlock(&chip->write_lock);
+ return rc;
+}
+
static int tadc_lerp(const struct tadc_pt *pts, size_t size, bool inv,
s32 input, s32 *output)
{
@@ -880,6 +901,12 @@ static int tadc_disable_vote_callback(struct votable *votable,
if (timeleft == 0)
pr_err("Timed out waiting for eoc, disabling hw conversions regardless\n");
+ rc = tadc_read(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip),
+ &chip->hwtrig_conv, 1);
+ if (rc < 0) {
+ pr_err("Couldn't save hw conversions rc=%d\n", rc);
+ return rc;
+ }
rc = tadc_write(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip), 0x00);
if (rc < 0) {
pr_err("Couldn't disable hw conversions rc=%d\n", rc);
@@ -896,9 +923,10 @@ static int tadc_disable_vote_callback(struct votable *votable,
pr_err("Couldn't disable direct test mode rc=%d\n", rc);
return rc;
}
- rc = tadc_write(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip), 0x07);
+ rc = tadc_write(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip),
+ chip->hwtrig_conv);
if (rc < 0) {
- pr_err("Couldn't enable hw conversions rc=%d\n", rc);
+ pr_err("Couldn't restore hw conversions rc=%d\n", rc);
return rc;
}
}
@@ -1126,16 +1154,23 @@ static int tadc_init_hw(struct tadc_chip *chip)
return rc;
}
- /* enable all temperature hardware triggers */
- rc = tadc_write(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip),
- BIT(TADC_THERM1) |
- BIT(TADC_THERM2) |
- BIT(TADC_DIE_TEMP));
+ /* enable connector and die temp hardware triggers */
+ rc = tadc_masked_write(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip),
+ BIT(TADC_THERM2) | BIT(TADC_DIE_TEMP),
+ BIT(TADC_THERM2) | BIT(TADC_DIE_TEMP));
if (rc < 0) {
pr_err("Couldn't enable hardware triggers rc=%d\n", rc);
return rc;
}
+ /* save hw triggered conversion configuration */
+ rc = tadc_read(chip, TADC_HWTRIG_CONV_CH_EN_REG(chip),
+ &chip->hwtrig_conv, 1);
+ if (rc < 0) {
+ pr_err("Couldn't save hw conversions rc=%d\n", rc);
+ return rc;
+ }
+
return 0;
}