diff options
| author | Padmanabhan Komanduru <pkomandu@codeaurora.org> | 2014-11-19 15:38:01 +0530 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:36:27 -0700 |
| commit | ad16d856d5d5014b71d4444892a070d7136a7872 (patch) | |
| tree | c076ded0585f98acd19abede254dee1967688ff1 | |
| parent | ad245195a0fdb858d9a684d27d350ca8fdf1875f (diff) | |
mdss: dsi: ensure proper clearing of DSI RDBK registers
During high performance scenarios, sometimes the DSI RDBK registers
are not getting cleared. This can cause improper read return values
since the RDBK data count will not get reset in such cases. Add
memory barriers during reset of RDBK registers to ensure that
the registers are cleared.
Change-Id: I870744b58c3e4064ca9f04f92e831d69139336db
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_dsi_host.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/video/fbdev/msm/mdss_dsi_host.c b/drivers/video/fbdev/msm/mdss_dsi_host.c index a810708f7b95..847cbe3dd1a0 100644 --- a/drivers/video/fbdev/msm/mdss_dsi_host.c +++ b/drivers/video/fbdev/msm/mdss_dsi_host.c @@ -1395,7 +1395,9 @@ do_send: if (ctrl_rev >= MDSS_DSI_HW_REV_101) { /* clear the RDBK_DATA registers */ MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x1); + wmb(); /* make sure the RDBK registers are cleared */ MIPI_OUTP(ctrl->ctrl_base + 0x01d4, 0x0); + wmb(); /* make sure the RDBK registers are cleared */ } mdss_dsi_wait4video_eng_busy(ctrl); /* video mode only */ |