diff options
| author | Runmin Wang <runminw@codeaurora.org> | 2017-02-09 13:57:04 -0800 |
|---|---|---|
| committer | Runmin Wang <runminw@codeaurora.org> | 2017-02-10 10:34:55 -0800 |
| commit | ac69bcf1f03d8b2303ce616de7d808f5fdcee2a6 (patch) | |
| tree | 769be480e7dd44ae574dc92dac523a6ff08d670c | |
| parent | 0b8561aff0c4251d9fdd71381464bc3a1fa2e90c (diff) | |
defconfig: msm: Enable EL2 tlb handler
Enable QCOM_EL2_TLB_HANDLER so that tlb conflict is handled
by EL2.
Change-Id: I8af8be929293e5419d58712d742cb62fb82f8897
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
| -rw-r--r-- | arch/arm64/configs/msmcortex-perf_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm64/configs/msmcortex_defconfig | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/configs/msmcortex-perf_defconfig b/arch/arm64/configs/msmcortex-perf_defconfig index f4a7d9107f36..e649455f2c70 100644 --- a/arch/arm64/configs/msmcortex-perf_defconfig +++ b/arch/arm64/configs/msmcortex-perf_defconfig @@ -52,6 +52,7 @@ CONFIG_PCI=y CONFIG_PCI_MSM=y CONFIG_SCHED_MC=y CONFIG_NR_CPUS=8 +CONFIG_QCOM_TLB_EL2_HANDLER=y CONFIG_PREEMPT=y CONFIG_HZ_100=y CONFIG_ARM64_REG_REBALANCE_ON_CTX_SW=y diff --git a/arch/arm64/configs/msmcortex_defconfig b/arch/arm64/configs/msmcortex_defconfig index d0fdb7206d5b..ba78f0db11a8 100644 --- a/arch/arm64/configs/msmcortex_defconfig +++ b/arch/arm64/configs/msmcortex_defconfig @@ -52,6 +52,7 @@ CONFIG_PCI=y CONFIG_PCI_MSM=y CONFIG_SCHED_MC=y CONFIG_NR_CPUS=8 +CONFIG_QCOM_TLB_EL2_HANDLER=y CONFIG_PREEMPT=y CONFIG_HZ_100=y CONFIG_CLEANCACHE=y |