diff options
| author | Siddartha Mohanadoss <smohanad@codeaurora.org> | 2017-03-22 16:45:18 -0700 |
|---|---|---|
| committer | Siddartha Mohanadoss <smohanad@codeaurora.org> | 2017-03-23 16:45:37 -0700 |
| commit | aae895ce11c89ebfbb987c81d55e412287dcbfbf (patch) | |
| tree | 719999cb5c0e62baba550524e2290c93ebdc64b4 | |
| parent | 89bfd053bfb4afb40d86f58de52cb7b1433dccba (diff) | |
iio: qcom-rradc: Update reading battery ID channel
The battery ID channel on the RRADC can be disabled
during initialization. Therefore update the sequence
to enable the channel before enabling the trigger and
continuous mode. After reading the battery ID result
from the RRADC controller, disable the trigger
and disable the channel after conversion request.
CRs-Fixed: 2023991
Change-Id: I461e04175ae351312b68771ef85cd928d5c0e4b1
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
| -rw-r--r-- | drivers/iio/adc/qcom-rradc.c | 89 |
1 files changed, 72 insertions, 17 deletions
diff --git a/drivers/iio/adc/qcom-rradc.c b/drivers/iio/adc/qcom-rradc.c index 57145ea72e90..202fee4711c1 100644 --- a/drivers/iio/adc/qcom-rradc.c +++ b/drivers/iio/adc/qcom-rradc.c @@ -38,6 +38,7 @@ #define FG_ADC_RR_FAKE_BATT_HIGH_MSB 0x5B #define FG_ADC_RR_BATT_ID_CTRL 0x60 +#define FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV BIT(0) #define FG_ADC_RR_BATT_ID_TRIGGER 0x61 #define FG_ADC_RR_BATT_ID_TRIGGER_CTL BIT(0) #define FG_ADC_RR_BATT_ID_STS 0x62 @@ -753,6 +754,75 @@ static int rradc_read_channel_with_continuous_mode(struct rradc_chip *chip, return rc; } +static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable) +{ + int rc = 0; + + if (enable) { + rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, + FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, + FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV); + if (rc < 0) { + pr_err("Enabling BATT ID channel failed:%d\n", rc); + return rc; + } + } else { + rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, + FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, 0); + if (rc < 0) { + pr_err("Disabling BATT ID channel failed:%d\n", rc); + return rc; + } + } + + return rc; +} + +static int rradc_do_batt_id_conversion(struct rradc_chip *chip, + struct rradc_chan_prop *prop, u16 *data, u8 *buf) +{ + int rc = 0, ret = 0; + + rc = rradc_enable_batt_id_channel(chip, true); + if (rc < 0) { + pr_err("Enabling BATT ID channel failed:%d\n", rc); + return rc; + } + + rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, + FG_ADC_RR_BATT_ID_TRIGGER_CTL, + FG_ADC_RR_BATT_ID_TRIGGER_CTL); + if (rc < 0) { + pr_err("BATT_ID trigger set failed:%d\n", rc); + ret = rc; + rc = rradc_enable_batt_id_channel(chip, false); + if (rc < 0) + pr_err("Disabling BATT ID channel failed:%d\n", rc); + return ret; + } + + rc = rradc_read_channel_with_continuous_mode(chip, prop, buf); + if (rc < 0) { + pr_err("Error reading in continuous mode:%d\n", rc); + ret = rc; + } + + rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, + FG_ADC_RR_BATT_ID_TRIGGER_CTL, 0); + if (rc < 0) { + pr_err("BATT_ID trigger re-set failed:%d\n", rc); + ret = rc; + } + + rc = rradc_enable_batt_id_channel(chip, false); + if (rc < 0) { + pr_err("Disabling BATT ID channel failed:%d\n", rc); + ret = rc; + } + + return ret; +} + static int rradc_do_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data) { @@ -765,24 +835,9 @@ static int rradc_do_conversion(struct rradc_chip *chip, switch (prop->channel) { case RR_ADC_BATT_ID: - rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, - FG_ADC_RR_BATT_ID_TRIGGER_CTL, - FG_ADC_RR_BATT_ID_TRIGGER_CTL); - if (rc < 0) { - pr_err("BATT_ID trigger set failed:%d\n", rc); - goto fail; - } - - rc = rradc_read_channel_with_continuous_mode(chip, prop, buf); - if (rc < 0) { - pr_err("Error reading in continuous mode:%d\n", rc); - goto fail; - } - - rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, - FG_ADC_RR_BATT_ID_TRIGGER_CTL, 0); + rc = rradc_do_batt_id_conversion(chip, prop, data, buf); if (rc < 0) { - pr_err("BATT_ID trigger re-set failed:%d\n", rc); + pr_err("Battery ID conversion failed:%d\n", rc); goto fail; } break; |
