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authorMitchel Humpherys <mitchelh@codeaurora.org>2015-05-18 21:16:10 -0700
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-22 11:12:09 -0700
commita6d990e2fd7286ae8473306790a75d1503309bdf (patch)
treeaa387e35f368055448f0c40986a3506447a441de
parent81e4499b1e19b3e81da993e9a80e3e0b604c719f (diff)
Revert "iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC"
This reverts commit 433a4b6a37c8f96295a7e80cb603c2318872c1f2. An equivalent patch is being brought in with the upcoming page table refactoring, so rip this guy out in preparation. This also reverts commit af3e3c36d08077856640b28d68c9f99d2188a000, which introduced users of the IOMMU_NOEXEC flag. Change-Id: Ibb36f60f2148170d8a01632043bf36b5f8c60777 Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org> [pdaly@codeaurora.org Resolve minor conflicts] Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
-rw-r--r--arch/arm64/mm/dma-mapping.c2
-rw-r--r--drivers/iommu/arm-smmu.c9
-rw-r--r--include/linux/iommu.h2
3 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 65c5178a9ba3..06a00d0e5a4a 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -1328,7 +1328,7 @@ __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
len = (j - i) << PAGE_SHIFT;
ret = iommu_map(mapping->domain, iova, phys, len,
- IOMMU_READ|IOMMU_WRITE|IOMMU_NOEXEC);
+ IOMMU_READ|IOMMU_WRITE);
if (ret < 0)
goto fail;
iova += len;
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 6cb08d5f8e8f..10ec04e29f42 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1648,7 +1648,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
unsigned long pfn, int prot, int stage)
{
pte_t *pte, *start;
- pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
+ pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN;
int ret;
if (pmd_none(*pmd)) {
@@ -1698,11 +1698,10 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
pteval |= ARM_SMMU_PTE_MEMATTR_DEV;
}
- if (prot & IOMMU_NOEXEC)
- pteval |= ARM_SMMU_PTE_XN;
-
/* If no access, create a faulting entry to avoid TLB fills */
- if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
+ if (prot & IOMMU_EXEC)
+ pteval &= ~ARM_SMMU_PTE_XN;
+ else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_PAGE;
pteval |= ARM_SMMU_PTE_SH_IS;
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index d68f9574e24a..01025881a680 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -27,7 +27,7 @@
#define IOMMU_READ (1 << 0)
#define IOMMU_WRITE (1 << 1)
#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
-#define IOMMU_NOEXEC (1 << 3)
+#define IOMMU_EXEC (1 << 3)
#define IOMMU_PRIV (1 << 4)
#define IOMMU_DEVICE (1 << 5) /* Indicates access to device memory */