diff options
| author | Alan Kwong <akwong@codeaurora.org> | 2016-02-17 00:48:28 -0500 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-28 16:42:42 -0700 |
| commit | a43565e79dcd9d85ac93453a6e0efde0193eb8ea (patch) | |
| tree | 2c7a35001c251b6755dcbe8542036cf8ad61c0d9 | |
| parent | 8fc762b27f0e8eeedf0636d34c89a86e017f6432 (diff) | |
ARM: dts: msm: Add rotator node to msmcobalt
Add mdss_rotator node with smmu subnodes.
Change mdss_mdp to interrupt controller so rotator can
receive interrupt routed by mdp handler.
CRs-Fixed: 972831
Change-Id: I5e0f8f06897ff0d4b55aa1f9fc8114dd02451649
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi index 8233ab92d980..45dff4201d69 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi @@ -17,6 +17,8 @@ <0x0c9b0000 0x1040>; reg-names = "mdp_phys", "vbif_phys"; interrupts = <0 83 0>; + interrupt-controller; + #interrupt-cells = <1>; vdd-supply = <&gdsc_mdss>; /* Bus Scale Settings */ @@ -385,4 +387,60 @@ qcom,mdss-fb-map = <&mdss_fb1>; }; + mdss_rotator: qcom,mdss_rotator { + compatible = "qcom,sde_rotator"; + reg = <0x0c900000 0xab100>, + <0x0c9b8000 0x1040>; + reg-names = "mdp_phys", + "rot_vbif_phys"; + + qcom,mdss-rot-mode = <1>; + qcom,mdss-highest-bank-bit = <0x2>; + + /* Bus Scale Settings */ + qcom,msm-bus,name = "mdss_rotator"; + qcom,msm-bus,num-cases = <3>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <25 512 0 0>, + <25 512 0 6400000>, + <25 512 0 6400000>; + + rot-vdd-supply = <&gdsc_mdss>; + qcom,supply-names = "rot-vdd"; + + clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>, + <&clock_mmss clk_rot_clk_src>, + <&clock_mmss clk_mmss_mdss_rot_clk>, + <&clock_mmss clk_mmss_mdss_axi_clk>; + clock-names = "iface_clk", "rot_core_clk", + "rot_clk", "axi_clk"; + + interrupt-parent = <&mdss_mdp>; + interrupts = <2 0>; + + /* VBIF QoS remapper settings*/ + qcom,mdss-rot-vbif-qos-setting = <1 1 1 1>; + + qcom,mdss-default-ot-rd-limit = <32>; + qcom,mdss-default-ot-wr-limit = <32>; + + smmu_rot_unsec: qcom,smmu_rot_unsec_cb { + compatible = "qcom,smmu_sde_rot_unsec"; + iommus = <&mmss_smmu 0xe00>; + gdsc-mdss-supply = <&gdsc_bimc_smmu>; + clocks = <&clock_mmss clk_mmss_bimc_smmu_ahb_clk>, + <&clock_mmss clk_mmss_bimc_smmu_axi_clk>; + clock-names = "mmss_smmu_ahb_clk", "mmss_smmu_axi_clk"; + }; + + smmu_rot_sec: qcom,smmu_rot_sec_cb { + compatible = "qcom,smmu_sde_rot_sec"; + iommus = <&mmss_smmu 0xe01>; + gdsc-mdss-supply = <&gdsc_bimc_smmu>; + clocks = <&clock_mmss clk_mmss_bimc_smmu_ahb_clk>, + <&clock_mmss clk_mmss_bimc_smmu_axi_clk>; + clock-names = "mmss_smmu_ahb_clk", "mmss_smmu_axi_clk"; + }; + }; }; |