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| author | Linux Build Service Account <lnxbuild@localhost> | 2016-11-30 16:28:03 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2016-11-30 16:28:03 -0800 |
| commit | a27b2f17890884a05b18ae69c7eae079cdde4b16 (patch) | |
| tree | bfec2401f07ca8e23aeba7034616f74f6cbdb6d0 | |
| parent | 0380dc86d2a75a4ae7d4246a94a5d767b0b75de4 (diff) | |
| parent | 52ab253870978e80ca86c207b31019bb8d76a1f2 (diff) | |
Merge "ARM: dts: msm: Add qseecom device node for msmfalcon"
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmfalcon.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index 721bc870d55a..79cdc2b701e1 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -1253,6 +1253,34 @@ qcom,irq-is-percpu; interrupts = <1 6 4>; }; + + qcom_seecom: qseecom@86d00000 { + compatible = "qcom,qseecom"; + reg = <0x86d00000 0x2200000>; + reg-names = "secapp-region"; + qcom,hlos-num-ce-hw-instances = <1>; + qcom,hlos-ce-hw-instance = <0>; + qcom,qsee-ce-hw-instance = <0>; + qcom,disk-encrypt-pipe-pair = <2>; + qcom,support-fde; + qcom,no-clock-support; + qcom,msm-bus,name = "qseecom-noc"; + qcom,msm-bus,num-cases = <4>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <55 512 0 0>, + <55 512 200000 400000>, + <55 512 300000 800000>, + <55 512 400000 1000000>; + clock-names = "core_clk_src", "core_clk", + "iface_clk", "bus_clk"; + clocks = <&clock_gcc QSEECOM_CE1_CLK>, + <&clock_gcc QSEECOM_CE1_CLK>, + <&clock_gcc QSEECOM_CE1_CLK>, + <&clock_gcc QSEECOM_CE1_CLK>; + qcom,ce-opp-freq = <171430000>; + qcom,qsee-reentrancy-support = <2>; + }; }; #include "msmfalcon-ion.dtsi" |