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authorLinux Build Service Account <lnxbuild@quicinc.com>2017-11-19 07:45:19 -0800
committerGerrit - the friendly Code Review server <code-review@localhost>2017-11-19 07:45:19 -0800
commit9715e41c28175edb97ea524356ae74ca4cd519bb (patch)
tree5bf97f664c4619b4a6cf2211e5099a33ebef7ccb
parent2f1c6c842d70062f954e60e75b5ab997b02a8486 (diff)
parentf96e94247a5b3b1160feb85a23a7772494205b83 (diff)
Merge "clk: qcom: mdss: fix the divider programming for DisplayPort PLL"
-rw-r--r--drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c b/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
index 0bd7e6413a6b..2d40fdeabcae 100644
--- a/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
+++ b/drivers/clk/msm/mdss/mdss-dp-pll-8998-util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -128,10 +128,10 @@ int vco_divided_clk_set_div(struct div_clk *clk, int div)
auxclk_div = MDSS_PLL_REG_R(dp_res->phy_base, DP_PHY_VCO_DIV);
auxclk_div &= ~0x03; /* bits 0 to 1 */
- auxclk_div |= 1; /* Default divider */
-
if (div == 4)
auxclk_div |= 2;
+ else
+ auxclk_div |= 1; /* Default divider */
MDSS_PLL_REG_W(dp_res->phy_base,
DP_PHY_VCO_DIV, auxclk_div);