diff options
| author | Osvaldo Banuelos <osvaldob@codeaurora.org> | 2016-04-25 13:02:56 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-27 19:13:03 -0700 |
| commit | 8ef05d02e27140fed9bd71ad15a5522333bf999b (patch) | |
| tree | 6d6eb925d6c1c68745a09facece3cc73dc5d78a1 | |
| parent | 5b613ab9a10a019d324e52e20b1f6e686039b5d5 (diff) | |
ARM: dts: msm: Add APCS common base to OSM clock device for msmcobalt
The OSM device needs access to the APCS common register space
to configure the LMh RCG which serves as clock source to OSM.
Add this register space to the OSM device.
Change-Id: I493e711463e2458abe735d440f98fbc80b11c208
CRs-Fixed: 1007896
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmcobalt.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 920080858c04..7c0eb08547a2 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -678,8 +678,10 @@ compatible = "qcom,cpu-clock-osm"; reg = <0x179C0000 0x4000>, <0x17916000 0x1000>, - <0x17816000 0x1000>; - reg-names = "osm", "pwrcl_pll", "perfcl_pll"; + <0x17816000 0x1000>, + <0x179D1000 0x1000>; + reg-names = "osm", "pwrcl_pll", "perfcl_pll", + "apcs_common"; vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; vdd-perfcl-supply = <&apc1_perfcl_vreg>; |