diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2016-09-27 23:27:07 -0600 |
|---|---|---|
| committer | Linux Build Service Account <lnxbuild@localhost> | 2016-09-27 23:27:07 -0600 |
| commit | 8d9657e7e077f13fd3e4e8091d3f1c5ca81f6649 (patch) | |
| tree | 82db8fbdf0a2866ff57325f31f1db0e3c3df1693 | |
| parent | f31227c2a21f83c4a4b13841515906d7de4c9c2c (diff) | |
| parent | 626caf4e54864d90e8d104277f9a1446e487c7e1 (diff) | |
Promotion of kernel.lnx.4.4-160927.
CRs Change ID Subject
--------------------------------------------------------------------------------------------------------------
1030987 I39029b3d8f58fb6167f81e8863daf04ccea8e56f ARM: dts: msm: update phy timing params for nt35597 pane
1066270 I1041141b8dc80db0baec7ffe71a5c2a7b41e2cbb msm: sde: Add pre/post power event handler in SDE rotato
1054613 I1827413e7e4fede197b3ebb6216239c07ae33a71 sysrq: Fix warning in sysrq generated crash.
1067509 Ifd70ca3071a7305ba064de7409090ce487c56968 iio: rradc: Add a format string in log prints
1065513 I25d7dc8abbd6dae4c54ee14f8feaf5701f64fd95 input: touchscreen: power off touch panel during suspend
1068011 Ic8dd3e9521159ce8da064da38cfa12e75f07209f phy: qcom-ufs: remove warnings for optional clocks
1064761 I54ba694f4c997bf5ecc540cee274e2cb07b77446 dwc3: core: clear DELAYP1TRANS with USB3PIPECTL register
1069005 Ie2072768b2fab3bcbdc70798897ca66614ee8a06 icnss: Provide ICNSS support of reading SOC serial numbe
1066530 I886e40f597169939ce4598863fd80145743d8db7 msm: ipa: add support for new QMI IDL
1062604 I2646d00d64416523da9c936715e9af9a2b258eeb msm: mdss: wait for kickoff before executing mode switch
1070141 I9f58a411c2a923c07fd27ab9dc5ac244e4b13a44 leds: qpnp-flash-v2: Fix compilation issue for 32-bit ke
1066407 I906613a00137925c9903ac6c01771c459594864f regulator: cpr3-regulator: fix potential aging uninitial
1053501 I41f4745f24720c7af5ab08dc4274224d7fe4dcfe net: fix infoleak in rtnetlink
1070564 I95fb375500c649f3e986f0cde5a3ce6fa8ad27ad ARM: dts: msm: Add rpm-smd node for msmfalcon
1068650 I7eae1fbad8467e36c1a216d1ea719c6e3ed9e586 Revert "ARM: dts: msm: configure CX voltage levels from
1067888 I2e93bcd1e84d43bc7a58af0be02d5337d936d4ee edac: cortex: Remove WARN_ON messages
1068581 I34c4feb0297838889cc2505eb3e08516165c5f2f msm: mdss: disable Client Driven Prefetch
1065513 I59681138448584fc7a04c95dc8af3d4c3d395ff0 input: touchscreen: Change late_init call to module_init
1038778 I48d560ab2caa6ea467ac56bf0d323937a475cdde msm: kgsl: Disable rbbm countable on a540
1047362 1047365 Ice01d5a829b6637c24822943ab393fb0809895cd ARM: dts: msm: add MI2S and AUX PCM support for msmcobal
1068126 Id44e63dab2fe68398c7b5ecdc423598ad4a27faa soc: qcom: spss_utils: fix test_fuse_state_show()
1070662 I410e58361282f175e46b68cbfaf4824e386454f8 usb: gadget: f_cdev: Avoid potential NULL pointer derefe
1068069 I90370e7e5de55b499a78fbfe5e913f39ec22c7e5 dwc3: gadget: Avoid starting next transfer if transfer i
1040066 I34f1b611000f5d9e4ae4c13a89b8571faa0f3393 ASoC: msm: update to align afe memory mapping as multipl
1060888 I58d05466f5e372fb9ce3e0dd49fff07c341f6dc0 ARM: dts: msm: add sharp 120 Hz panel support for msmcob
1068920 I36d278bf1837b2a18f74ff52b9be9b7e5a165857 cnss: Add new case in cnss runtime PM request feature
1054973 Ica22ee19f281fa0cff7d629f396c41c935692c59 ASoC: wcd: add null check before pointer dereference
1021945 I78a7600506b4d2457bb1c38f8a39888a9cf9467c qseecom: Change whitelist_support flag to false if TZ fa
1053488 I13e73cfb2ad761c94762d0c8196df7725abdf5c5 BACKPORT: perf tools: Document the perf sysctls
1065513 Iee1db2eb07c00fd4338255b9648fac5e05aa9c6d input: touchscreen: Add virtual key support from dtsi
1069025 I07f0ef2ee8d37336047a37aa93c8b4f26d07cd72 msm: mdss: expand vbif debug bus for msmcobalt
1047362 1047365 I48e6680b026391d8e77bbdcba4fb59ed90b13581 ASoC: msmcobalt: add support for MI2S and AUX PCM
1052747 I5a809e464c90c29b6f69fc0bfba67bae9a9b6551 msm: camera: Add support for reset controller framework
1068069 Iec1c5913efe1dd266506f973951f22a2170fce77 Revert "usb: dwc3: gadget: use update transfer command"
1067012 I5326ee8e58d291b1d9b07649b87632d7e9102e0d iommu: msm: use list_for_each_entry_safe for deletion
1066382 Ib42aad9e0d838eda4653e0bab9f074b3031983dd usb: pd: Avoid potential NULL ptr dereferences
1050304 I19917582aa1a52b11eb04e2031403c09bc0aba9b msm: mdss: make hdcp 1.x data part of fb panel
1069377 Ia380ee6ad4584c29feb80fdc3b9247dd11e64a3e soundwire: Add support for usecases without compander
1065319 I97febdd414ef5cd57490ce2746650dde7fdda28f cgroup: make sure a parent css isn't freed before its ch
1009284 I3283c6255f9cdbbfbffc47057c60b30eb7bdacde msm: mdss: program HDMI/DP core select during interface
1045100 I71af0e13b77ecf53a1b337e3fb2f7a82a2ce25af ASoC: msm: qdsp6v2: fix crash during flac superset clip
1052747 I92d6e80898f63700f040f43d133fe461ff458937 ARM: dts: msm: update PCIe reset clks for MSM8996 and ms
1068069 I5dd4818e07a3297dd9226169741d8753b2f57a2e Revert "usb: dwc3: gadget: use Update Transfer from Xfer
1004881 Ida24c83eb2f1ae94ad7168b6065db69da35c3ec9 drivers: cpuidle: lpm-levels: Fix wakeup time for suspen
1067833 Iab8b0bc6fd17183fc6056f06a90421cde24987c8 usb: gadget: gsi: Set NUM_OF_TRB as 15 for IN and OUT GS
1050672 I8002a67d8d9cb41709049ff34f35717f3dd0acd0 serial: msm_serial_hs: Change the wakeup interrupt enabl
1069213 I53657d42b5cfe7dba63d8331127aca6551e553e1 ARM: dts: msm: Add support for venus pil on msmfalcon
1009284 I3d83b735a81fed834befca21307cafda89eb5878 msm: mdss: dp: update audio programming sequence
1068650 I0ed47e89f6a4dd332ff28e8a1203ae3bfe44e7fa msm: mdss: control when MMSS GDSC gets turned off
1065513 I763598585cee9705d6def8b7fe61d3206788912b input: touchscreen: Remove improper debug code
1057105 I0822f2e60c4ac22b1636d1d5988ba322dafcdb49 msm: mdss: consider ib to commit the bw vote for mdp
1066173 I8b1ff2af7db2ca13671e31a9bce05329346bda10 soc: qcom: ipc_router_glink_xprt: Add larger size receiv
1055145 Ie8e7f3949d276325305799640f2775343bd6b9da usb: gadget: Enable L1 suspend by default
1064055 If6961217df08bcf0506eedacb07874dfafd7c1ca crypto: msm: qce50: DMA-API buffers limitations
1067296 If3f17a913aac8fb5959c919ae28973544e33444a ARM: dts: msm: add initial memory map for msmtriton
1065561 I7db756e363cb66d22eb5d516e6e512e89e26e6a3 ASoC: wcd9335: reduce speaker teardown latency
1065513 I5243d9ab801f6964e675ad37c2161beda3586dfe input: touchscreen: Convert Goodix driver to dev_pm_ops
1068113 Id1523786f1c87449ed3943f1726766dad6a4ade2 msm: pcie: initialize var in GPIO init function
1067908 I13dbd369c0ce137e884c156360c514df92746e39 perf: Enable updating exclude_idle events at idle
1065341 I2d79daa72fb87a7d3c0818563a88e94f36af48b8 icnss: Provide client_id in ind_register request
1068069 Ic08b2da2983a520a07a0b225254c068d499a67cc Revert "usb: dwc3: gadget: start requests as soon as the
1067888 Id14ffa45a1326e47adc847c012e9ac21c6954990 defconfig: msmcortex: Remove panic on SBE
1067180 Ie140740ce0374808a630a37d29888b646baa576f power: fg-memif: Clear retry_once flag in IMA read
1067885 Iaa0a2df686c88e9aecb308f5749493187c07a38a icnss: Add debug support of configuring QMI timeout
1067141 Idd971601d5358104831784d645d84b1f9d2b631c msm: mdss: Correct error handling in MDSS driver
1057027 Ia65a71347666ed9fa3f6bf92fe7c573638301254 msm: mdss: avoid shutting down PHY PMIC regulators
1059652 I8443f450b6b0c0b2b66592bbb55b167221d2f342 ARM: dts: msm: fix low FPS issue on Sharp FHD panel
1064466 I46d9b5c57f94aa1f10df08c4430b617355a82eec clk: msm: mdss: change DP clock rate in order of KHz
1065513 I0d4731148351652092fe7feede0b44828939d98b input: touchscreen: Replace kernel thread with a workque
1070486 Ia3c1beed20590e4135d58ad235ff861d47db5882 ARM: dts: msm: update regulator name for msmfalcon
1068069 Idcd7ae3de3cb85b84c3db7f367b56b097561b2dd Revert "usb: dwc3: gadget: start transfer on XFER_COMPLE
1028630 I34bba1ebc417a3d6daa3b6e0a38c4b519c82c606 soc: qcom: ssr: Return from acknowledgment wait if modem
1065513 I69585d757f1a6dc40834a99ee67c872bf6f3ea13 input: touchscreen: Add fw_name sysfs entry in Goodix dr
1066446 I5418d298290623ac66a2b64108a1f5dab034e5f3 soc: qcom: Add subsys state with service notifier notifi
1047365 I985200bbff55583ac09bf7444ecbc5cf6ab7eb41 ASoC: msm: add tertiary and quaternary audio PCM support
1052747 I1ca8bb386673f0db020554659f69c71b540e3dcc msm: pcie: add support for reset controller framework
1018090 Ie8b5025988cf9ad54c05ac23f3a51e74a50c8c40 config: msmcortex: enable qnovo driver
1066517 I46afe2a08495c2ed06806b0568b1c44a6ffd947f ASoC: wsa881x: Update device state during device probe
1066183 If58f6c5b48a023ba7f9212758d71930116156008 msm: msm_bus: introduce bus topology for msmfalcon
1052262 I999c6f2f76b8991172cd2f5c4b6c99e0ed5d186b msm: mdss: dsi: Configure pll to work only in full rate
1058744 I66436b7c2d9e02658cfc4c195ca78852b09c01f7 memshare: Add support to listen to SUBSYS_RAMDUMP_NOTIFI
1053488 Iff5bff4fc1042e85866df9faa01bce8d04335ab8 FROMLIST: security,perf: Allow further restriction of pe
1067296 I81b7992aa1117590400050c2da7dc7c9e3903572 ARM: dts: msm: update the memory map details for msmfalc
1069121 If5485379934a222f19f5dd20b8d4f44769470e8d usb: phy: qusb: Reset clock mux to avoid leakage on vdd
1066183 Ibed309284b47ba3f22ccbac45c750f3e366ec40e msm: msm_bus: add new master/slave ids
1069970 Id8a42dec3e081187054cb2353ba3473bae9dd547 USB: gadget: f_fs: Use %zu when printing size_t
1066446 I77b248c51914651aea4b27d7c5a3d5d784b1e542 soc: qcom: pil: Correct notification path in subsys_stop
1000209 Ia97cb849ac7ce08a5c387eb11b1b01aad36244a0 msm: mdss: fix truncation of 64 bit for clk rate
1050304 I665008509a2c00d6627e49a5806069747e00eafd msm: mdss: hdcp: fix hdcp sink address and random number
1058529 I83ee4619feff2ca7452119c9baecb6ffde755287 cpuset: handle race between CPU hotplug and cpuset_hotpl
1064312 I7c189e3e4182348c05b5e9573c9039a04c70bf62 Revert "defconfig: msm: enable common log for msmcobalt"
1070282 I6924bc24fafb1685a2a157656281e7d36223257e drivers: GICv3: remove the rtb logs of gic_poke_irq
1070035 Ie919a2a886924f1b1e01415bfdaa53f74046f5b0 usb: gadget: composite: fix dereference after null check
1065274 Iee328c847ffc16154e78682515454be6a61b35b4 msm: mdss: Correct DSC panel dimension when dest-scaler
1066446 I071df5d5848878e5ff7b514bf9089c011a0c6a69 soc: qcom: pil: Change clock disabling sequence
1064312 Icbb2a60683ecca303cbd48576d80d0a765610c8f soc: qcom: move scan dump memory allocation
1064312 I325bc1cb97b5a1ef2c00374b00d967e258a90a48 ARM: dts: msm: enable scan dump for msmcobalt
1050304 Ib7b046ca5a0071e571758fd656c86a3fd3be51af msm: mdss: dp: fix hdcp 1.x interrupt and aux issues
1062729 I40166e423618f5e78093b22efb5ab5def517a051 ARM: dts: msm: add sound support for msmcobalt skuk
1048778 Ia5602cd4c612b8aacbdf27206a0a28cb50858911 ARM: dts: reduce on/off time for nt35597 dsc panels
1067980 I9cebd73d2165af47fb15a5916753365b4b7562bc defconfig: arm64: msmcortex: enable MSM_TZ_LOG for msmco
1067509 I997197c7c7315769e49342da7973a9f79ab54c80 qcom-charger: handle get prop errors graciously
Change-Id: Id5aade34904f9c241f1fada4d6db84cd186cc45a
CRs-Fixed: 1069025, 1054973, 1070486, 1065561, 1052747, 1067180, 1065341, 1028630, 1067509, 1053488, 1009284, 1004881, 1068581, 1000209, 1067833, 1047362, 1069121, 1070282, 1069970, 1057105, 1069005, 1047365, 1064466, 1060888, 1030987, 1067012, 1053501, 1068920, 1064312, 1062604, 1065274, 1050304, 1069213, 1070564, 1067141, 1064055, 1055145, 1066446, 1066183, 1066407, 1068069, 1064761, 1067888, 1065513, 1059652, 1068126, 1067885, 1068650, 1069377, 1021945, 1067908, 1058744, 1065319, 1052262, 1048778, 1040066, 1057027, 1058529, 1050672, 1066173, 1067296, 1038778, 1045100, 1062729, 1067980, 1054613, 1070141, 1068011, 1068113, 1066517, 1070035, 1066530, 1066382, 1018090, 1066270, 1070662
146 files changed, 6283 insertions, 1205 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/msm_watchdog.txt b/Documentation/devicetree/bindings/arm/msm/msm_watchdog.txt index 56559a69eb46..296e5dd0e383 100644 --- a/Documentation/devicetree/bindings/arm/msm/msm_watchdog.txt +++ b/Documentation/devicetree/bindings/arm/msm/msm_watchdog.txt @@ -34,6 +34,7 @@ Optional properties: - qcom,ipi-ping : (boolean) send keep alive ping to other cpus if present - qcom,wakeup-enable : (boolean) enable non secure watchdog to freeze / unfreeze automatically across suspend / resume path. +- qcom,scandump-size : size of scan dump memory region Example: diff --git a/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt b/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt index 4de22947b333..4c676fa66e62 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt +++ b/Documentation/devicetree/bindings/input/touchscreen/gt9xx/gt9xx.txt @@ -35,6 +35,7 @@ Optional properties: min y, max x and max y values. - goodix,i2c-pull-up : To specify pull up is required. - goodix,no-force-update : To specify force update is allowed. + - goodix,enable-power-off : Power off touchscreen during suspend. - goodix,button-map : Button map of key codes. The number of key codes depend on panel. - goodix,cfg-data0 : Touch screen controller config data group 0. Ask vendor @@ -55,6 +56,7 @@ Optional properties: to provide that. - goodix,cfg-data5 : Touch screen controller config data group 5. Ask vendor to provide that. + - goodix,fw-name : Touch screen controller firmware file name. Example: i2c@f9927000 { goodix@5d { @@ -89,5 +91,6 @@ i2c@f9927000 { 20 21 22 24 26 28 29 2A FF FF FF FF FF FF FF FF FF 22 22 22 22 22 22 FF 07 01]; + goodix,fw_name = "gtp_fw.bin"; }; }; diff --git a/Documentation/devicetree/bindings/media/video/msm-cpp.txt b/Documentation/devicetree/bindings/media/video/msm-cpp.txt index b39c20ecbf22..52abf409cb65 100644 --- a/Documentation/devicetree/bindings/media/video/msm-cpp.txt +++ b/Documentation/devicetree/bindings/media/video/msm-cpp.txt @@ -22,6 +22,10 @@ Required properties: case dynamic clock scaling based on prevalent streams need lower clock rate. - qcom,cpp-fw-payload-info: Child node for cpp node having infomration on cpp firmware payload offsets. This is mandatory node. +- resets: reset specifier pair consists of phandle for the reset controller + and reset lines used by this controller. +- reset-names: reset signal name strings sorted in the same order as the resets + property. Required properties of the child node: - qcom,stripe-base = Base offset of stripes in cpp payload. @@ -120,6 +124,7 @@ Example: qcom,ref-we-mmu-pf-ptr-off = <22>; qcom,set-group-buffer-len = <135>; qcom,dup-frame-indicator-off = <70>; - + resets = <&clock_mmss MMSS_CAMSS_MICRO_BCR>; + reset-names = "micro_iface_reset"; }; }; diff --git a/Documentation/devicetree/bindings/pci/msm_pcie.txt b/Documentation/devicetree/bindings/pci/msm_pcie.txt index 4b5a6b4af789..8885f4ae80ad 100644 --- a/Documentation/devicetree/bindings/pci/msm_pcie.txt +++ b/Documentation/devicetree/bindings/pci/msm_pcie.txt @@ -110,6 +110,10 @@ Optional Properties: manager(scm) driver. scm driver uses this device id to restore PCIe controller related security configuration after coming out of the controller power collapse. + - resets: reset specifier pair consists of phandle for the reset controller + and reset lines used by this controller. + - reset-names: reset signal name strings sorted in the same order as the resets + property. Example: @@ -230,13 +234,21 @@ Example: <&clock_gcc clk_gcc_pcie_0_cfg_ahb_clk>, <&clock_gcc clk_gcc_pcie_0_mstr_axi_clk>, <&clock_gcc clk_gcc_pcie_0_slv_axi_clk>, - <&clock_gcc clk_pcie_0_phy_ldo>, - <&clock_gcc clk_gcc_pcie_phy_0_reset>; + <&clock_gcc clk_pcie_0_phy_ldo>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", "pcie_0_ldo"; + + resets = <&clock_gcc GCC_PCIE_PHY_BCR>, + <&clock_gcc GCC_PCIE_PHY_COM_BCR>, + <&clock_gcc GCC_PCIE_PHY_NOCSR_COM_PHY_BCR>, + <&clock_gcc GCC_PCIE_0_PHY_BCR>; + + reset-names = "pcie_phy_reset", "pcie_phy_com_reset", + "pcie_phy_nocsr_com_phy_reset","pcie_0_phy_reset"; + max-clock-frequency-hz = <125000000>, <0>, <1000000>, <0>, <0>, <0>, <0>; qcom,l0s-supported; diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt index a01bd451c577..82befcbd24a3 100755..100644 --- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt +++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt @@ -1646,6 +1646,18 @@ Optional Properties: secondary -> Secondary MI2S interface tertiary -> Tertiary MI2S interface quaternary -> Quaternary MI2S interface +- qcom,mi2s-audio-intf: This property is used to inform machine driver + if mi2s backend dailink has to be added as part of the sound card dai-links. +- qcom,auxpcm-audio-intf: This property is used to inform machine driver + if auxpcm backend dailink has to be added as part of the sound card dai-links. +- qcom,msm-mi2s-master: This property is used to inform machine driver + if MSM is the clock master of mi2s. 1 means master and 0 means slave. The + first entry is primary mi2s; the second entry is secondary mi2s, and so on. +- reg: This property provides the AUX PCM/MI2S mux select register addresses + and size. +- reg_names: This property provides the name of the AUX PCM/MI2S mux select + registers so the machine driver can retrieve the addresses. The order of the + names has to match the order of the registers in "reg" property. - asoc-platform: This is phandle list containing the references to platform device nodes that are used as part of the sound card dai-links. - asoc-platform-names: This property contains list of platform names. The order of @@ -1678,6 +1690,17 @@ Example: "csr_gp_io_mux_spkr_ctl", "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel"; qcom,msm-ext-pa = "primary"; + qcom,mi2s-audio-intf; + qcom,auxpcm-audio-intf; + qcom,msm-mi2s-master = <1>, <0>, <1>, <1>; + reg = <0x1711a000 0x4>, + <0x1711b000 0x4>, + <0x1711c000 0x4>, + <0x1711d000 0x4>; + reg-names = "lpaif_pri_mode_muxsel", + "lpaif_sec_mode_muxsel", + "lpaif_tert_mode_muxsel", + "lpaif_quat_mode_muxsel"; qcom,msm-mclk-freq = <9600000>; qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt index 9c48b84660f5..03e6aafd5b94 100644 --- a/Documentation/sysctl/kernel.txt +++ b/Documentation/sysctl/kernel.txt @@ -60,6 +60,7 @@ show up in /proc/sys/kernel: - panic_on_stackoverflow - panic_on_unrecovered_nmi - panic_on_warn +- perf_event_paranoid - pid_max - powersave-nap [ PPC only ] - printk @@ -599,19 +600,6 @@ This file shows up if CONFIG_DEBUG_STACKOVERFLOW is enabled. ============================================================== -panic_on_unrecovered_nmi: - -The default Linux behaviour on an NMI of either memory or unknown is -to continue operation. For many environments such as scientific -computing it is preferable that the box is taken out and the error -dealt with than an uncorrected parity/ECC error get propagated. - -A small number of systems do generate NMI's for bizarre random reasons -such as power management so the default is off. That sysctl works like -the existing panic controls already in that directory. - -============================================================== - panic_on_warn: Calls panic() in the WARN() path when set to 1. This is useful to avoid @@ -649,6 +637,32 @@ allowed to execute. ============================================================== +panic_on_unrecovered_nmi: + +The default Linux behaviour on an NMI of either memory or unknown is +to continue operation. For many environments such as scientific +computing it is preferable that the box is taken out and the error +dealt with than an uncorrected parity/ECC error get propagated. + +A small number of systems do generate NMI's for bizarre random reasons +such as power management so the default is off. That sysctl works like +the existing panic controls already in that directory. + +============================================================== + +perf_event_paranoid: + +Controls use of the performance events system by unprivileged +users (without CAP_SYS_ADMIN). The default value is 3 if +CONFIG_SECURITY_PERF_EVENTS_RESTRICT is set, or 1 otherwise. + + -1: Allow use of (almost) all events by all users +>=0: Disallow raw tracepoint access by users without CAP_IOC_LOCK +>=1: Disallow CPU event access by users without CAP_SYS_ADMIN +>=2: Disallow kernel profiling by users without CAP_SYS_ADMIN +>=3: Disallow all event access by users without CAP_SYS_ADMIN + +============================================================== pid_max: diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-cmd.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-cmd.dtsi index 57c6301f2074..95a8e80ccdbd 100644 --- a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-cmd.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-cmd.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -53,41 +53,41 @@ qcom,ulps-enabled; qcom,adjust-timer-wakeup-ms = <1>; - qcom,mdss-dsi-on-command = [15 01 00 00 0a 00 02 ff 10 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 ba 03 - 15 01 00 00 0a 00 02 e5 01 - 15 01 00 00 0a 00 02 b0 03 - 15 01 00 00 0a 00 02 ff 28 - 15 01 00 00 0a 00 02 7a 02 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 ff 10 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 c0 03 - 15 01 00 00 0a 00 02 bb 10 - 15 01 00 00 0a 00 02 ff e0 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 6b 3d - 15 01 00 00 0a 00 02 6c 3d - 15 01 00 00 0a 00 02 6d 3d - 15 01 00 00 0a 00 02 6e 3d - 15 01 00 00 0a 00 02 6f 3d - 15 01 00 00 0a 00 02 35 02 - 15 01 00 00 0a 00 02 36 72 - 15 01 00 00 0a 00 02 37 10 - 15 01 00 00 0a 00 02 08 c0 - 15 01 00 00 0a 00 02 ff 24 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 c6 06 - 15 01 00 00 0a 00 02 ff 10 - 05 01 00 00 f0 00 01 11 - 05 01 00 00 f0 00 01 29 + qcom,mdss-dsi-on-command = [15 01 00 00 00 00 02 ff 10 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ba 03 + 15 01 00 00 00 00 02 e5 01 + 15 01 00 00 00 00 02 b0 03 + 15 01 00 00 00 00 02 ff 28 + 15 01 00 00 00 00 02 7a 02 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ff 10 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 c0 03 + 15 01 00 00 00 00 02 bb 10 + 15 01 00 00 00 00 02 ff e0 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 6b 3d + 15 01 00 00 00 00 02 6c 3d + 15 01 00 00 00 00 02 6d 3d + 15 01 00 00 00 00 02 6e 3d + 15 01 00 00 00 00 02 6f 3d + 15 01 00 00 00 00 02 35 02 + 15 01 00 00 00 00 02 36 72 + 15 01 00 00 00 00 02 37 10 + 15 01 00 00 00 00 02 08 c0 + 15 01 00 00 00 00 02 ff 24 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 c6 06 + 15 01 00 00 00 00 02 ff 10 + 05 01 00 00 a0 00 01 11 + 05 01 00 00 00 00 01 29 07 01 00 00 0a 00 02 01 00]; qcom,mdss-dsi-post-panel-on-command = [05 01 00 00 a0 00 01 29]; - qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 - 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 02 28 00 + 05 01 00 00 0a 00 02 10 00]; qcom,compression-mode = "dsc"; qcom,config-select = <&dsi_nt35597_dsc_cmd_config2>; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-video.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-video.dtsi index 1c515f506e9d..fd11be721dbb 100644 --- a/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-video.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-panel-nt35597-dsc-wqxga-video.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -30,37 +30,37 @@ qcom,mdss-dsi-underflow-color = <0xff>; qcom,mdss-dsi-border-color = <0>; - qcom,mdss-dsi-on-command = [15 01 00 00 0a 00 02 ff 10 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 ba 03 - 15 01 00 00 0a 00 02 e5 01 - 15 01 00 00 0a 00 02 b0 03 - 39 01 00 00 0a 00 06 3B 03 08 08 2e 64 - 15 01 00 00 0a 00 02 ff 28 - 15 01 00 00 0a 00 02 7a 02 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 ff 10 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 c0 03 - 15 01 00 00 0a 00 02 bb 03 - 15 01 00 00 0a 00 02 ff e0 - 15 01 00 00 0a 00 02 fb 01 - 15 01 00 00 0a 00 02 6b 3d - 15 01 00 00 0a 00 02 6c 3d - 15 01 00 00 0a 00 02 6d 3d - 15 01 00 00 0a 00 02 6e 3d - 15 01 00 00 0a 00 02 6f 3d - 15 01 00 00 0a 00 02 35 02 - 15 01 00 00 0a 00 02 36 72 - 15 01 00 00 0a 00 02 37 10 - 15 01 00 00 0a 00 02 08 c0 - 15 01 00 00 0a 00 02 ff 10 + qcom,mdss-dsi-on-command = [15 01 00 00 00 00 02 ff 10 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ba 03 + 15 01 00 00 00 00 02 e5 01 + 15 01 00 00 00 00 02 b0 03 + 39 01 00 00 00 00 06 3B 03 08 08 2e 64 + 15 01 00 00 00 00 02 ff 28 + 15 01 00 00 00 00 02 7a 02 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 ff 10 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 c0 03 + 15 01 00 00 00 00 02 bb 03 + 15 01 00 00 00 00 02 ff e0 + 15 01 00 00 00 00 02 fb 01 + 15 01 00 00 00 00 02 6b 3d + 15 01 00 00 00 00 02 6c 3d + 15 01 00 00 00 00 02 6d 3d + 15 01 00 00 00 00 02 6e 3d + 15 01 00 00 00 00 02 6f 3d + 15 01 00 00 00 00 02 35 02 + 15 01 00 00 00 00 02 36 72 + 15 01 00 00 00 00 02 37 10 + 15 01 00 00 00 00 02 08 c0 + 15 01 00 00 00 00 02 ff 10 05 01 00 00 a0 00 01 11 - 05 01 00 00 a0 00 01 29 - 07 01 00 00 a0 00 01 01]; + 05 01 00 00 00 00 01 29 + 07 01 00 00 0a 00 01 01]; - qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 - 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 02 28 00 + 05 01 00 00 0a 00 02 10 00]; qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; qcom,mdss-dsi-h-sync-pulse = <0>; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-sharp-1080p-cmd.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-sharp-1080p-cmd.dtsi index 8b01f6031211..68dabd2fe41c 100644 --- a/arch/arm/boot/dts/qcom/dsi-panel-sharp-1080p-cmd.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-panel-sharp-1080p-cmd.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -15,6 +15,7 @@ qcom,mdss-dsi-panel-name = "sharp 1080p cmd mode dsi panel"; qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <850000000>; qcom,mdss-dsi-virtual-channel-id = <0>; qcom,mdss-dsi-stream = <0>; qcom,mdss-dsi-panel-width = <1080>; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-sharp-dualmipi-1080p-120hz.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-sharp-dualmipi-1080p-120hz.dtsi index 5aa4974ded2f..a7861e96d3e2 100644 --- a/arch/arm/boot/dts/qcom/dsi-panel-sharp-dualmipi-1080p-120hz.dtsi +++ b/arch/arm/boot/dts/qcom/dsi-panel-sharp-dualmipi-1080p-120hz.dtsi @@ -1,4 +1,4 @@ -/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -16,7 +16,6 @@ "sharp 1080p 120hz dual dsi cmd mode panel"; qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; qcom,mdss-dsi-panel-framerate = <120>; - qcom,mdss-dsi-panel-clockrate = <975000000>; qcom,mdss-dsi-virtual-channel-id = <0>; qcom,mdss-dsi-stream = <0>; qcom,mdss-dsi-panel-width = <540>; diff --git a/arch/arm/boot/dts/qcom/msm-audio-lpass.dtsi b/arch/arm/boot/dts/qcom/msm-audio-lpass.dtsi index 41b6f50c520b..6360b54b1013 100644 --- a/arch/arm/boot/dts/qcom/msm-audio-lpass.dtsi +++ b/arch/arm/boot/dts/qcom/msm-audio-lpass.dtsi @@ -308,6 +308,49 @@ qcom,msm-cpudai-auxpcm-data = <0>, <0>; qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; qcom,msm-auxpcm-interface = "primary"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_sec_auxpcm: qcom,msm-sec-auxpcm { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "secondary"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_tert_auxpcm: qcom,msm-tert-auxpcm { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "tertiary"; + qcom,msm-cpudai-afe-clk-ver = <2>; + }; + + dai_quat_auxpcm: qcom,msm-quat-auxpcm { + compatible = "qcom,msm-auxpcm-dev"; + qcom,msm-cpudai-auxpcm-mode = <0>, <0>; + qcom,msm-cpudai-auxpcm-sync = <1>, <1>; + qcom,msm-cpudai-auxpcm-frame = <5>, <4>; + qcom,msm-cpudai-auxpcm-quant = <2>, <2>; + qcom,msm-cpudai-auxpcm-num-slots = <1>, <1>; + qcom,msm-cpudai-auxpcm-slot-mapping = <1>, <1>; + qcom,msm-cpudai-auxpcm-data = <0>, <0>; + qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>; + qcom,msm-auxpcm-interface = "quaternary"; + qcom,msm-cpudai-afe-clk-ver = <2>; }; hdmi_dba: qcom,msm-hdmi-dba-codec-rx { diff --git a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi index 3422e5e7f500..282e6bcb713b 100644 --- a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi @@ -623,6 +623,10 @@ "camss_cpp_axi_clk", "camss_cpp_clk", "micro_iface_clk", "camss_ahb_clk", "smmu_cpp_axi_clk", "cpp_vbif_ahb_clk"; + + resets = <&clock_mmss CAMSS_MICRO_BCR>; + reset-names = "micro_iface_reset"; + qcom,clock-rates = <0 0 0 480000000 0 0 480000000 0 0 0 0>; qcom,min-clock-rate = <200000000>; qcom,bus-master = <1>; diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi index 4b1b9796ebe6..dc1bbcd13c36 100644 --- a/arch/arm/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996.dtsi @@ -1394,18 +1394,20 @@ <&clock_gcc clk_gcc_pcie_clkref_clk>, <&clock_gcc clk_gcc_smmu_aggre0_axi_clk>, <&clock_gcc clk_gcc_pcie_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_pcie_phy_aux_clk>, - <&clock_gcc clk_gcc_pcie_phy_reset>, - <&clock_gcc clk_gcc_pcie_phy_com_reset>, - <&clock_gcc clk_gcc_pcie_phy_nocsr_com_phy_reset>, - <&clock_gcc clk_gcc_pcie_0_phy_reset>; + <&clock_gcc clk_gcc_pcie_phy_aux_clk>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", "pcie_0_ldo", "pcie_0_smmu_clk", - "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk", "pcie_phy_reset", - "pcie_phy_com_reset", "pcie_phy_nocsr_com_phy_reset", - "pcie_0_phy_reset"; + "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk"; + + resets = <&clock_gcc PCIE_PHY_BCR>, + <&clock_gcc PCIE_PHY_COM_BCR>, + <&clock_gcc PCIE_PHY_NOCSR_COM_PHY_BCR>, + <&clock_gcc PCIE_0_PHY_BCR>; + + reset-names = "pcie_phy_reset", "pcie_phy_com_reset", + "pcie_phy_nocsr_com_phy_reset","pcie_0_phy_reset"; max-clock-frequency-hz = <0>, <0>, <1010526>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>; @@ -1544,18 +1546,20 @@ <&clock_gcc clk_gcc_pcie_clkref_clk>, <&clock_gcc clk_gcc_smmu_aggre0_axi_clk>, <&clock_gcc clk_gcc_pcie_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_pcie_phy_aux_clk>, - <&clock_gcc clk_gcc_pcie_phy_reset>, - <&clock_gcc clk_gcc_pcie_phy_com_reset>, - <&clock_gcc clk_gcc_pcie_phy_nocsr_com_phy_reset>, - <&clock_gcc clk_gcc_pcie_1_phy_reset>; + <&clock_gcc clk_gcc_pcie_phy_aux_clk>; clock-names = "pcie_1_pipe_clk", "pcie_1_ref_clk_src", "pcie_1_aux_clk", "pcie_1_cfg_ahb_clk", "pcie_1_mstr_axi_clk", "pcie_1_slv_axi_clk", "pcie_1_ldo", "pcie_1_smmu_clk", - "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk", "pcie_phy_reset", - "pcie_phy_com_reset", "pcie_phy_nocsr_com_phy_reset", - "pcie_1_phy_reset"; + "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk"; + + resets = <&clock_gcc PCIE_PHY_BCR>, + <&clock_gcc PCIE_PHY_COM_BCR>, + <&clock_gcc PCIE_PHY_NOCSR_COM_PHY_BCR>, + <&clock_gcc PCIE_1_PHY_BCR>; + + reset-names = "pcie_phy_reset", "pcie_phy_com_reset", + "pcie_phy_nocsr_com_phy_reset","pcie_1_phy_reset"; max-clock-frequency-hz = <0>, <0>, <1010526>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>; @@ -1698,18 +1702,20 @@ <&clock_gcc clk_gcc_pcie_clkref_clk>, <&clock_gcc clk_gcc_smmu_aggre0_axi_clk>, <&clock_gcc clk_gcc_pcie_phy_cfg_ahb_clk>, - <&clock_gcc clk_gcc_pcie_phy_aux_clk>, - <&clock_gcc clk_gcc_pcie_phy_reset>, - <&clock_gcc clk_gcc_pcie_phy_com_reset>, - <&clock_gcc clk_gcc_pcie_phy_nocsr_com_phy_reset>, - <&clock_gcc clk_gcc_pcie_2_phy_reset>; + <&clock_gcc clk_gcc_pcie_phy_aux_clk>; clock-names = "pcie_2_pipe_clk", "pcie_2_ref_clk_src", "pcie_2_aux_clk", "pcie_2_cfg_ahb_clk", "pcie_2_mstr_axi_clk", "pcie_2_slv_axi_clk", "pcie_2_ldo", "pcie_2_smmu_clk", - "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk", "pcie_phy_reset", - "pcie_phy_com_reset", "pcie_phy_nocsr_com_phy_reset", - "pcie_2_phy_reset"; + "pcie_phy_cfg_ahb_clk", "pcie_phy_aux_clk"; + + resets = <&clock_gcc PCIE_PHY_BCR>, + <&clock_gcc PCIE_PHY_COM_BCR>, + <&clock_gcc PCIE_PHY_NOCSR_COM_PHY_BCR>, + <&clock_gcc PCIE_2_PHY_BCR>; + + reset-names = "pcie_phy_reset", "pcie_phy_com_reset", + "pcie_phy_nocsr_com_phy_reset","pcie_2_phy_reset"; max-clock-frequency-hz = <0>, <0>, <1010526>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi index 9b50bb96750a..1db3c2482935 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi @@ -81,6 +81,10 @@ "msm-pcm-routing", "msm-cpe-lsm", "msm-compr-dsp", "msm-pcm-dsp-noirq"; asoc-cpu = <&dai_hdmi>, <&dai_dp>, + <&dai_mi2s0>, <&dai_mi2s1>, + <&dai_mi2s2>, <&dai_mi2s3>, + <&dai_pri_auxpcm>, <&dai_sec_auxpcm>, + <&dai_tert_auxpcm>, <&dai_quat_auxpcm>, <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, <&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>, @@ -91,6 +95,10 @@ <&sb_7_rx>, <&sb_7_tx>, <&sb_8_tx>, <&usb_audio_rx>, <&usb_audio_tx>; asoc-cpu-names = "msm-dai-q6-hdmi.8", "msm-dai-q6-dp.24608", + "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", + "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", + "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2", + "msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", "msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389", @@ -162,6 +170,10 @@ "msm-pcm-routing", "msm-cpe-lsm", "msm-compr-dsp", "msm-pcm-dsp-noirq"; asoc-cpu = <&dai_hdmi>, <&dai_dp>, + <&dai_mi2s0>, <&dai_mi2s1>, + <&dai_mi2s2>, <&dai_mi2s3>, + <&dai_pri_auxpcm>, <&dai_sec_auxpcm>, + <&dai_tert_auxpcm>, <&dai_quat_auxpcm>, <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>, <&sb_2_rx>, <&sb_2_tx>, <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>, <&sb_5_tx>, @@ -171,6 +183,10 @@ <&incall_music_2_rx>, <&sb_5_rx>, <&usb_audio_rx>, <&usb_audio_tx>, <&sb_6_rx>; asoc-cpu-names = "msm-dai-q6-hdmi.8", "msm-dai-q6-dp.24608", + "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", + "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", + "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2", + "msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4", "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", "msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389", diff --git a/arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi index b4516f381c0c..154bc5b092df 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-camera.dtsi @@ -405,6 +405,8 @@ <106 512 0 0>, <106 512 0 0>; qcom,msm-bus-vector-dyn-vote; + resets = <&clock_mmss CAMSS_MICRO_BCR>; + reset-names = "micro_iface_reset"; qcom,cpp-fw-payload-info { qcom,stripe-base = <790>; qcom,plane-base = <715>; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi index d44002efea11..f59899fba039 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi @@ -393,6 +393,13 @@ qcom,5v-boost-gpio = <&tlmm 51 0>; }; +&dsi_dual_sharp_1080_120hz_cmd { + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + &mdss_hdmi_tx { pinctrl-names = "hdmi_hpd_active", "hdmi_ddc_active", "hdmi_cec_active", "hdmi_active", "hdmi_sleep"; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss-panels.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss-panels.dtsi index 3a15fbf6f15c..a4ba9a61cded 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss-panels.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss-panels.dtsi @@ -24,6 +24,7 @@ #include "dsi-panel-jdi-dualmipi-cmd.dtsi" #include "dsi-panel-sharp-1080p-cmd.dtsi" #include "dsi-panel-jdi-1080p-video.dtsi" +#include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi" &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { @@ -77,17 +78,17 @@ }; &dsi_dual_nt35597_video { - qcom,mdss-dsi-panel-timings = [00 19 05 06 0a 0f 05 06 05 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x07>; - qcom,mdss-dsi-t-clk-pre = <0x26>; + qcom,mdss-dsi-panel-timings = [00 1c 08 07 23 22 07 07 05 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x0d>; + qcom,mdss-dsi-t-clk-pre = <0x2d>; qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "bta_check"; }; &dsi_dual_nt35597_cmd { - qcom,mdss-dsi-panel-timings = [00 19 05 06 0a 0f 05 06 05 03 04 00]; - qcom,mdss-dsi-t-clk-post = <0x07>; - qcom,mdss-dsi-t-clk-pre = <0x26>; + qcom,mdss-dsi-panel-timings = [00 1c 08 07 23 22 07 07 05 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x0d>; + qcom,mdss-dsi-t-clk-pre = <0x2d>; }; &dsi_dual_nt35597_truly_video { @@ -149,3 +150,9 @@ qcom,mdss-dsi-t-clk-post = <0x07>; qcom,mdss-dsi-t-clk-pre = <0x28>; }; + +&dsi_dual_sharp_1080_120hz_cmd { + qcom,mdss-dsi-panel-timings = [00 19 05 06 0a 0f 05 06 05 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x7>; + qcom,mdss-dsi-t-clk-pre = <0x26>; +}; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi index fd930d3d1644..4fe694069011 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi @@ -21,9 +21,6 @@ interrupt-controller; #interrupt-cells = <1>; vdd-supply = <&gdsc_mdss>; - vdd-cx-supply = <&pmcobalt_s1_level>; - vdd-cx-min-uV = <RPM_SMD_REGULATOR_LEVEL_LOW_SVS>; - vdd-cx-max-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>; /* Bus Scale Settings */ qcom,msm-bus,name = "mdss_mdp"; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi index 70755ec1b8f5..8697ba4cb889 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi @@ -444,6 +444,13 @@ qcom,5v-boost-gpio = <&tlmm 51 0>; }; +&dsi_dual_sharp_1080_120hz_cmd { + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + &pmicobalt_haptics { status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom/msmcobalt-qrd-skuk.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-qrd-skuk.dtsi index c028ea0eeab3..1ae0ab804eac 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-qrd-skuk.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-qrd-skuk.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include "msmcobalt-pinctrl.dtsi" +#include "msmcobalt-audio.dtsi" &blsp1_uart3_hs { status = "ok"; @@ -99,4 +100,29 @@ debounce-interval = <15>; }; }; + + sound-tavil { + qcom,model = "msmcobalt-skuk-tavil-snd-card"; + + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "DMIC0", "MIC BIAS1", + "MIC BIAS1", "Digital Mic0", + "DMIC1", "MIC BIAS1", + "MIC BIAS1", "Digital Mic1", + "DMIC2", "MIC BIAS3", + "MIC BIAS3", "Digital Mic2", + "DMIC4", "MIC BIAS4", + "MIC BIAS4", "Digital Mic4", + "SpkrLeft IN", "SPK1 OUT"; + + qcom,msm-mbhc-hphl-swh = <1>; + + qcom,wsa-max-devs = <1>; + qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0213>; + qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft"; + }; }; diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index 789a322f73bf..7f5f81eff9e5 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -1579,18 +1579,25 @@ <&clock_gcc clk_gcc_pcie_0_cfg_ahb_clk>, <&clock_gcc clk_gcc_pcie_0_mstr_axi_clk>, <&clock_gcc clk_gcc_pcie_0_slv_axi_clk>, - <&clock_gcc clk_gcc_pcie_clkref_clk>, - <&clock_gcc clk_gcc_pcie_phy_reset>; + <&clock_gcc clk_gcc_pcie_clkref_clk>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", - "pcie_0_ldo", "pcie_0_phy_reset"; + "pcie_0_ldo"; max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>; + + resets = <&clock_gcc PCIE_PHY_BCR>, + <&clock_gcc PCIE_0_PHY_BCR>, + <&clock_gcc PCIE_0_PHY_BCR>; + + reset-names = "pcie_phy_reset", + "pcie_0_phy_reset", + "pcie_0_phy_pipe_reset"; }; qcom,ipc_router { @@ -2641,6 +2648,7 @@ qcom,pet-time = <10000>; qcom,ipi-ping; qcom,wakeup-enable; + qcom,scandump-size = <0x40000>; }; qcom,spss@1d00000 { diff --git a/arch/arm/boot/dts/qcom/msmfalcon-bus.dtsi b/arch/arm/boot/dts/qcom/msmfalcon-bus.dtsi new file mode 100644 index 000000000000..11f602d842bc --- /dev/null +++ b/arch/arm/boot/dts/qcom/msmfalcon-bus.dtsi @@ -0,0 +1,1217 @@ +/* Copyright (c) 2016, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/msm/msm-bus-ids.h> + +&soc { + ad_hoc_bus: ad-hoc-bus { + /*Version = 14 */ + compatible = "qcom,msm-bus-device"; + reg = <0x1620000 0x20000>, + <0x1000000 0x80000>, + <0x1500000 0x10000>, + <0x1700000 0x20000>, + <0x17900000 0xE000>, + <0x1740000 0x10000>, + <0x1740000 0x10000>; + + reg-names = "snoc-base", "bimc-base", "cnoc-base", + "a2noc-base", "gnoc-base", "mmnoc-ahb-base", "mnoc-base"; + + /*Buses*/ + + fab_a2noc: fab-a2noc { + cell-id = <MSM_BUS_FAB_A2_NOC>; + label = "fab-a2noc"; + qcom,fab-dev; + qcom,base-name = "a2noc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <4096>; + qcom,base-offset = <16384>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_gcc RPM_AGGRE2_NOC_CLK>, + <&clock_gcc RPM_AGGRE2_NOC_A_CLK>; + }; + + fab_bimc: fab-bimc { + cell-id = <MSM_BUS_FAB_BIMC>; + label = "fab-bimc"; + qcom,fab-dev; + qcom,base-name = "bimc-base"; + qcom,bus-type = <2>; + qcom,bypass-qos-prg; + qcom,util-fact = <153>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_gcc RPM_BIMC_MSMBUS_CLK>, + <&clock_gcc RPM_BIMC_MSMBUS_A_CLK>; + }; + + fab_cnoc: fab-cnoc { + cell-id = <MSM_BUS_FAB_CONFIG_NOC>; + label = "fab-cnoc"; + qcom,fab-dev; + qcom,base-name = "cnoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_gcc RPM_CNOC_MSMBUS_CLK>, + <&clock_gcc RPM_CNOC_MSMBUS_A_CLK>; + }; + + fab_gnoc: fab-gnoc { + cell-id = <MSM_BUS_FAB_GNOC>; + label = "fab-gnoc"; + qcom,virt-dev; + qcom,base-name = "gnoc-base"; + qcom,bypass-qos-prg; + }; + + fab_mnoc: fab-mnoc { + cell-id = <MSM_BUS_FAB_MMSS_NOC>; + label = "fab-mnoc"; + qcom,fab-dev; + qcom,base-name = "mnoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <4096>; + qcom,base-offset = <20480>; + qcom,util-fact = <154>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_gcc RPM_MMSSNOC_AXI_CLK>, + <&clock_gcc RPM_MMSSNOC_AXI_A_CLK>; + }; + + fab_snoc: fab-snoc { + cell-id = <MSM_BUS_FAB_SYS_NOC>; + label = "fab-snoc"; + qcom,fab-dev; + qcom,base-name = "snoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <4096>; + qcom,base-offset = <24576>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_gcc RPM_SNOC_MSMBUS_CLK>, + <&clock_gcc RPM_SNOC_MSMBUS_A_CLK>; + }; + + fab_mnoc_ahb: fab-mnoc-ahb { + cell-id = <MSM_BUS_FAB_MMSS_AHB>; + label = "fab-mnoc-ahb"; + qcom,fab-dev; + qcom,base-name = "mmnoc-ahb-base"; + qcom,bypass-qos-prg; + qcom,setrate-only-clk; + qcom,bus-type = <1>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&clock_mmss AHB_CLK_SRC >, + <&clock_mmss AHB_CLK_SRC>; + }; + + /*Masters*/ + + mas_ipa: mas-ipa { + cell-id = <MSM_BUS_MASTER_IPA>; + label = "mas-ipa"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <3>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_a2noc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_IPA>; + }; + + mas_cnoc_a2noc: mas-cnoc-a2noc { + cell-id = <MSM_BUS_MASTER_CNOC_A2NOC>; + label = "mas-cnoc-a2noc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_a2noc_snoc>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_CNOC_A2NOC>; + qcom,blacklist = <&slv_snoc_cnoc>; + }; + + mas_sdcc_1: mas-sdcc-1 { + cell-id = <MSM_BUS_MASTER_SDCC_1>; + label = "mas-sdcc-1"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_a2noc_snoc>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_SDCC_1>; + }; + + mas_sdcc_2: mas-sdcc-2 { + cell-id = <MSM_BUS_MASTER_SDCC_2>; + label = "mas-sdcc-2"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_a2noc_snoc>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_SDCC_2>; + }; + + mas_blsp_1: mas-blsp-1 { + cell-id = <MSM_BUS_MASTER_BLSP_1>; + label = "mas-blsp-1"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_a2noc_snoc>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_BLSP_1>; + }; + + mas_blsp_2: mas-blsp-2 { + cell-id = <MSM_BUS_MASTER_BLSP_2>; + label = "mas-blsp-2"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_a2noc_snoc>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_BLSP_2>; + }; + + mas_ufs: mas-ufs { + cell-id = <MSM_BUS_MASTER_UFS>; + label = "mas-ufs"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <4>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_a2noc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_UFS>; + }; + + mas_usb_hs: mas-usb-hs { + cell-id = <MSM_BUS_MASTER_USB_HS>; + label = "mas-usb-hs"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <1>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_a2noc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_USB_HS>; + }; + + mas_usb3: mas-usb3 { + cell-id = <MSM_BUS_MASTER_USB3>; + label = "mas-usb3"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <2>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_a2noc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_USB3>; + }; + + mas_crypto_c0: mas-crypto-c0 { + cell-id = <MSM_BUS_MASTER_CRYPTO_CORE0>; + label = "mas-crypto-c0"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,qport = <11>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_a2noc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,mas-rpm-id = <ICBID_MASTER_CRYPTO_CORE0>; + }; + + mas_gnoc_bimc: mas-gnoc-bimc { + cell-id = <MSM_BUS_MASTER_GNOC_BIMC>; + label = "mas-gnoc-bimc"; + qcom,buswidth = <4>; + qcom,agg-ports = <2>; + qcom,ap-owned; + qcom,qport = <0>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_ebi>; + qcom,prio-lvl = <0>; + qcom,prio-rd = <0>; + qcom,prio-wr = <0>; + qcom,bus-dev = <&fab_bimc>; + qcom,mas-rpm-id = <ICBID_MASTER_GNOC_BIMC>; + }; + + mas_oxili: mas-oxili { + cell-id = <MSM_BUS_MASTER_GRAPHICS_3D>; + label = "mas-oxili"; + qcom,buswidth = <4>; + qcom,agg-ports = <2>; + qcom,ap-owned; + qcom,qport = <1>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_hmss_l3 + &slv_ebi &slv_bimc_snoc>; + qcom,prio-lvl = <0>; + qcom,prio-rd = <0>; + qcom,prio-wr = <0>; + qcom,bus-dev = <&fab_bimc>; + qcom,mas-rpm-id = <ICBID_MASTER_GFX3D>; + }; + + mas_mnoc_bimc: mas-mnoc-bimc { + cell-id = <MSM_BUS_MNOC_BIMC_MAS>; + label = "mas-mnoc-bimc"; + qcom,buswidth = <4>; + qcom,agg-ports = <2>; + qcom,ap-owned; + qcom,qport = <2>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_hmss_l3 + &slv_ebi &slv_bimc_snoc>; + qcom,bus-dev = <&fab_bimc>; + qcom,mas-rpm-id = <ICBID_MASTER_MNOC_BIMC>; + }; + + mas_snoc_bimc: mas-snoc-bimc { + cell-id = <MSM_BUS_SNOC_BIMC_MAS>; + label = "mas-snoc-bimc"; + qcom,buswidth = <4>; + qcom,agg-ports = <2>; + qcom,connections = <&slv_hmss_l3 &slv_ebi>; + qcom,bus-dev = <&fab_bimc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_BIMC>; + }; + + mas_snoc_cnoc: mas-snoc-cnoc { + cell-id = <MSM_BUS_SNOC_CNOC_MAS>; + label = "mas-snoc-cnoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_clk_ctl + &slv_qdss_cfg &slv_qm_cfg + &slv_srvc_cnoc &slv_ufs_cfg + &slv_tcsr &slv_a2noc_smmu_cfg + &slv_snoc_cfg &slv_tlmm_south + &slv_mpm &slv_cnoc_mnoc_mmss_cfg + &slv_sdcc_2 &slv_sdcc_1 + &slv_spdm &slv_pmic_arb + &slv_prng &slv_mss_cfg + &slv_gpuss_cfg &slv_imem_cfg + &slv_usb3_0 &slv_a2noc_cfg + &slv_tlmm_north &slv_usb_hs + &slv_pdm &slv_tlmm_center + &slv_ahb2phy &slv_blsp_2 + &slv_blsp_1 &slv_pimem_cfg + &slv_glm &slv_message_ram + &slv_bimc_cfg &slv_cnoc_mnoc_cfg>; + qcom,bus-dev = <&fab_cnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_CNOC>; + }; + + mas_qdss_dap: mas-qdss-dap { + cell-id = <MSM_BUS_MASTER_QDSS_DAP>; + label = "mas-qdss-dap"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_clk_ctl + &slv_qdss_cfg &slv_qm_cfg + &slv_srvc_cnoc &slv_ufs_cfg + &slv_tcsr &slv_a2noc_smmu_cfg + &slv_snoc_cfg &slv_tlmm_south + &slv_mpm &slv_cnoc_mnoc_mmss_cfg + &slv_sdcc_2 &slv_sdcc_1 + &slv_spdm &slv_pmic_arb + &slv_prng &slv_mss_cfg + &slv_gpuss_cfg &slv_imem_cfg + &slv_usb3_0 &slv_a2noc_cfg + &slv_tlmm_north &slv_usb_hs + &slv_pdm &slv_tlmm_center + &slv_ahb2phy &slv_blsp_2 + &slv_blsp_1 &slv_pimem_cfg + &slv_glm &slv_message_ram + &slv_cnoc_a2noc &slv_bimc_cfg + &slv_cnoc_mnoc_cfg>; + qcom,bus-dev = <&fab_cnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_DAP>; + }; + + mas_apps_proc: mas-apps-proc { + cell-id = <MSM_BUS_MASTER_AMPSS_M0>; + label = "mas-apps-proc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_gnoc_snoc &slv_gnoc_bimc>; + qcom,bus-dev = <&fab_gnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_APPSS_PROC>; + }; + + mas_cnoc_mnoc_mmss_cfg: mas-cnoc-mnoc-mmss-cfg { + cell-id = <MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG>; + label = "mas-cnoc-mnoc-mmss-cfg"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_venus_throttle_cfg + &slv_venus_cfg &slv_camera_throttle_cfg + &slv_smmu_cfg &slv_camera_cfg &slv_csi_phy_cfg + &slv_display_throttle_cfg &slv_display_cfg + &slv_mmss_clk_cfg &slv_mnoc_mpu_cfg + &slv_misc_cfg &slv_mmss_clk_xpu_cfg>; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,mas-rpm-id = <ICBID_MASTER_CNOC_MNOC_MMSS_CFG>; + }; + + mas_cnoc_mnoc_cfg: mas-cnoc-mnoc-cfg { + cell-id = <MSM_BUS_MASTER_CNOC_MNOC_CFG>; + label = "mas-cnoc-mnoc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,connections = <&slv_srvc_mnoc>; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,mas-rpm-id = <ICBID_MASTER_CNOC_MNOC_CFG>; + }; + + mas_cpp: mas-cpp { + cell-id = <MSM_BUS_MASTER_CPP>; + label = "mas-cpp"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <4>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_CPP>; + }; + + mas_jpeg: mas-jpeg { + cell-id = <MSM_BUS_MASTER_JPEG>; + label = "mas-jpeg"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <6>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_JPEG>; + }; + + mas_mdp_p0: mas-mdp-p0 { + cell-id = <MSM_BUS_MASTER_MDP_PORT0>; + label = "mas-mdp-p0"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <0>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_MDP0>; + }; + + mas_mdp_p1: mas-mdp-p1 { + cell-id = <MSM_BUS_MASTER_MDP_PORT1>; + label = "mas-mdp-p1"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <1>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_MDP1>; + }; + + mas_venus: mas-venus { + cell-id = <MSM_BUS_MASTER_VIDEO_P0>; + label = "mas-venus"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <2>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_VIDEO>; + }; + + mas_vfe: mas-vfe { + cell-id = <MSM_BUS_MASTER_VFE>; + label = "mas-vfe"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <5>; + qcom,qos-mode = "bypass"; + qcom,connections = <&slv_mnoc_bimc>; + qcom,bus-dev = <&fab_mnoc>; + qcom,mas-rpm-id = <ICBID_MASTER_VFE>; + }; + + mas_qdss_etr: mas-qdss-etr { + cell-id = <MSM_BUS_MASTER_QDSS_ETR>; + label = "mas-qdss-etr"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <1>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pimem + &slv_imem &slv_snoc_cnoc + &slv_snoc_bimc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_ETR>; + }; + + mas_qdss_bam: mas-qdss-bam { + cell-id = <MSM_BUS_MASTER_QDSS_BAM>; + label = "mas-qdss-bam"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,qport = <0>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pimem + &slv_imem &slv_snoc_cnoc + &slv_snoc_bimc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_QDSS_BAM>; + }; + + mas_snoc_cfg: mas-snoc-cfg { + cell-id = <MSM_BUS_MASTER_SNOC_CFG>; + label = "mas-snoc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_srvc_snoc>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_SNOC_CFG>; + }; + + mas_bimc_snoc: mas-bimc-snoc { + cell-id = <MSM_BUS_BIMC_SNOC_MAS>; + label = "mas-bimc-snoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_pimem + &slv_ipa &slv_qdss_stm + &slv_lpass &slv_hmss + &slv_cdsp &slv_snoc_cnoc + &slv_wlan &slv_imem>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_BIMC_SNOC>; + }; + + mas_a2noc_snoc: mas-a2noc-snoc { + cell-id = <MSM_BUS_A2NOC_SNOC_MAS>; + label = "mas-a2noc-snoc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_pimem + &slv_ipa &slv_qdss_stm + &slv_lpass &slv_hmss + &slv_snoc_bimc &slv_cdsp + &slv_snoc_cnoc &slv_wlan + &slv_imem>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_A2NOC_SNOC>; + }; + /*Internal nodes*/ + + /*Slaves*/ + + slv_a2noc_snoc:slv-a2noc-snoc { + cell-id = <MSM_BUS_A2NOC_SNOC_SLV>; + label = "slv-a2noc-snoc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_a2noc>; + qcom,connections = <&mas_a2noc_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_A2NOC_SNOC>; + }; + + slv_ebi:slv-ebi { + cell-id = <MSM_BUS_SLAVE_EBI_CH0>; + label = "slv-ebi"; + qcom,buswidth = <4>; + qcom,agg-ports = <2>; + qcom,bus-dev = <&fab_bimc>; + qcom,slv-rpm-id = <ICBID_SLAVE_EBI1>; + }; + + slv_hmss_l3:slv-hmss-l3 { + cell-id = <MSM_BUS_SLAVE_HMSS_L3>; + label = "slv-hmss-l3"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_bimc>; + qcom,slv-rpm-id = <ICBID_SLAVE_HMSS_L3>; + }; + + slv_bimc_snoc:slv-bimc-snoc { + cell-id = <MSM_BUS_BIMC_SNOC_SLV>; + label = "slv-bimc-snoc"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_bimc>; + qcom,connections = <&mas_bimc_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_SNOC>; + }; + + slv_cnoc_a2noc:slv-cnoc-a2noc { + cell-id = <MSM_BUS_SLAVE_CNOC_A2NOC>; + label = "slv-cnoc-a2noc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,connections = <&mas_cnoc_a2noc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_A2NOC>; + }; + + slv_mpm:slv-mpm { + cell-id = <MSM_BUS_SLAVE_MPM>; + label = "slv-mpm"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_MPM>; + }; + + slv_pmic_arb:slv-pmic-arb { + cell-id = <MSM_BUS_SLAVE_PMIC_ARB>; + label = "slv-pmic-arb"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PMIC_ARB>; + }; + + slv_tlmm_north:slv-tlmm-north { + cell-id = <MSM_BUS_SLAVE_TLMM_NORTH>; + label = "slv-tlmm-north"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_NORTH>; + }; + + slv_tcsr:slv-tcsr { + cell-id = <MSM_BUS_SLAVE_TCSR>; + label = "slv-tcsr"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TCSR>; + }; + + slv_pimem_cfg:slv-pimem-cfg { + cell-id = <MSM_BUS_SLAVE_PIMEM_CFG>; + label = "slv-pimem-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PIMEM_CFG>; + }; + + slv_imem_cfg:slv-imem-cfg { + cell-id = <MSM_BUS_SLAVE_IMEM_CFG>; + label = "slv-imem-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_IMEM_CFG>; + }; + + slv_message_ram:slv-message-ram { + cell-id = <MSM_BUS_SLAVE_MESSAGE_RAM>; + label = "slv-message-ram"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_MESSAGE_RAM>; + }; + + slv_glm:slv-glm { + cell-id = <MSM_BUS_SLAVE_GLM>; + label = "slv-glm"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_GLM>; + }; + + slv_bimc_cfg:slv-bimc-cfg { + cell-id = <MSM_BUS_SLAVE_BIMC_CFG>; + label = "slv-bimc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_CFG>; + }; + + slv_prng:slv-prng { + cell-id = <MSM_BUS_SLAVE_PRNG>; + label = "slv-prng"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PRNG>; + }; + + slv_spdm:slv-spdm { + cell-id = <MSM_BUS_SLAVE_SPDM_WRAPPER>; + label = "slv-spdm"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SPDM_WRAPPER>; + }; + + slv_qdss_cfg:slv-qdss-cfg { + cell-id = <MSM_BUS_SLAVE_QDSS_CFG>; + label = "slv-qdss-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_CFG>; + }; + + slv_cnoc_mnoc_cfg:slv-cnoc-mnoc-cfg { + cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>; + label = "slv-cnoc-mnoc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,connections = <&mas_cnoc_mnoc_cfg>; + qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MNOC_CFG>; + }; + + slv_snoc_cfg:slv-snoc-cfg { + cell-id = <MSM_BUS_SLAVE_SNOC_CFG>; + label = "slv-snoc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CFG>; + }; + + slv_qm_cfg:slv-qm-cfg { + cell-id = <MSM_BUS_SLAVE_QM_CFG>; + label = "slv-qm-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QM_CFG>; + }; + + slv_clk_ctl:slv-clk-ctl { + cell-id = <MSM_BUS_SLAVE_CLK_CTL>; + label = "slv-clk-ctl"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CLK_CTL>; + }; + + slv_mss_cfg:slv-mss-cfg { + cell-id = <MSM_BUS_SLAVE_CNOC_MSS>; + label = "slv-mss-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MSS>; + }; + + slv_tlmm_south:slv-tlmm-south { + cell-id = <MSM_BUS_SLAVE_TLMM_SOUTH>; + label = "slv-tlmm-south"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_SOUTH>; + }; + + slv_ufs_cfg:slv-ufs-cfg { + cell-id = <MSM_BUS_SLAVE_UFS_CFG>; + label = "slv-ufs-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_UFS_CFG>; + }; + + slv_a2noc_cfg:slv-a2noc-cfg { + cell-id = <MSM_BUS_SLAVE_A2NOC_CFG>; + label = "slv-a2noc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_A2NOC_CFG>; + }; + + slv_a2noc_smmu_cfg:slv-a2noc-smmu-cfg { + cell-id = <MSM_BUS_SLAVE_A2NOC_SMMU_CFG>; + label = "slv-a2noc-smmu-cfg"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_A2NOC_SMMU_CFG>; + }; + + slv_gpuss_cfg:slv-gpuss-cfg { + cell-id = <MSM_BUS_SLAVE_GRAPHICS_3D_CFG>; + label = "slv-gpuss-cfg"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_GFX3D_CFG>; + }; + + slv_ahb2phy:slv-ahb2phy { + cell-id = <MSM_BUS_SLAVE_PCIE20_AHB2PHY>; + label = "slv-ahb2phy"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PCIE20_AHB2PHY>; + }; + + slv_blsp_1:slv-blsp-1 { + cell-id = <MSM_BUS_SLAVE_BLSP_1>; + label = "slv-blsp-1"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_1>; + }; + + slv_sdcc_1:slv-sdcc-1 { + cell-id = <MSM_BUS_SLAVE_SDCC_1>; + label = "slv-sdcc-1"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_1>; + }; + + slv_sdcc_2:slv-sdcc-2 { + cell-id = <MSM_BUS_SLAVE_SDCC_2>; + label = "slv-sdcc-2"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_2>; + }; + + slv_tlmm_center:slv-tlmm-center { + cell-id = <MSM_BUS_SLAVE_TLMM_CENTER>; + label = "slv-tlmm-center"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_CENTER>; + }; + + slv_blsp_2:slv-blsp-2 { + cell-id = <MSM_BUS_SLAVE_BLSP_2>; + label = "slv-blsp-2"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_2>; + }; + + slv_pdm:slv-pdm { + cell-id = <MSM_BUS_SLAVE_PDM>; + label = "slv-pdm"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PDM>; + }; + + slv_cnoc_mnoc_mmss_cfg:slv-cnoc-mnoc-mmss-cfg { + cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG>; + label = "slv-cnoc-mnoc-mmss-cfg"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,connections = <&mas_cnoc_mnoc_mmss_cfg>; + qcom,slv-rpm-id = <ICBID_SLAVE_CNOC_MNOC_MMSS_CFG>; + }; + + slv_usb_hs:slv-usb-hs { + cell-id = <MSM_BUS_SLAVE_USB_HS>; + label = "slv-usb-hs"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_USB_HS>; + }; + + slv_usb3_0:slv-usb3-0 { + cell-id = <MSM_BUS_SLAVE_USB3>; + label = "slv-usb3-0"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_USB3_0>; + }; + + slv_srvc_cnoc:slv-srvc-cnoc { + cell-id = <MSM_BUS_SLAVE_SERVICE_CNOC>; + label = "slv-srvc-cnoc"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_CNOC>; + }; + + + slv_gnoc_bimc:slv-gnoc-bimc { + cell-id = <MSM_BUS_SLAVE_GNOC_BIMC>; + label = "slv-gnoc-bimc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_gnoc>; + qcom,connections = <&mas_gnoc_bimc>; + qcom,slv-rpm-id = <ICBID_SLAVE_GNOC_BIMC>; + }; + + slv_gnoc_snoc:slv-gnoc-snoc { + cell-id = <MSM_BUS_SLAVE_GNOC_SNOC>; + label = "slv-gnoc-snoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_gnoc>; + qcom,connections = <&mas_gnoc_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_GNOC_SNOC>; + }; + + mas_gnoc_snoc: mas-gnoc-snoc { + cell-id = <MSM_BUS_MASTER_GNOC_SNOC>; + label = "mas-gnoc-snoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,connections = <&slv_pimem + &slv_ipa &slv_qdss_stm + &slv_lpass &slv_hmss + &slv_cdsp &slv_snoc_cnoc + &slv_wlan &slv_imem>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = <ICBID_MASTER_GNOC_SNOC>; + }; + + slv_camera_cfg:slv-camera-cfg { + cell-id = <MSM_BUS_SLAVE_CAMERA_CFG>; + label = "slv-camera-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_CAMERA_CFG>; + }; + + slv_camera_throttle_cfg:slv-camera-throttle-cfg { + cell-id = <MSM_BUS_SLAVE_CAMERA_THROTTLE_CFG>; + label = "slv-camera-throttle-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_CAMERA_THROTTLE_CFG>; + }; + + slv_misc_cfg:slv-misc-cfg { + cell-id = <MSM_BUS_SLAVE_MISC_CFG>; + label = "slv-misc-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_MISC_CFG>; + }; + + slv_venus_throttle_cfg:slv-venus-throttle-cfg { + cell-id = <MSM_BUS_SLAVE_VENUS_THROTTLE_CFG>; + label = "slv-venus-throttle-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_VENUS_THROTTLE_CFG>; + }; + + slv_venus_cfg:slv-venus-cfg { + cell-id = <MSM_BUS_SLAVE_VENUS_CFG>; + label = "slv-venus-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_VENUS_CFG>; + }; + + slv_mmss_clk_xpu_cfg:slv-mmss-clk-xpu-cfg { + cell-id = <MSM_BUS_SLAVE_MMSS_CLK_XPU_CFG>; + label = "slv-mmss-clk-xpu-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_CLK_XPU_CFG>; + }; + + slv_mmss_clk_cfg:slv-mmss-clk-cfg { + cell-id = <MSM_BUS_SLAVE_MMSS_CLK_CFG>; + label = "slv-mmss-clk-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_CLK_CFG>; + }; + + slv_mnoc_mpu_cfg:slv-mnoc-mpu-cfg { + cell-id = <MSM_BUS_SLAVE_MNOC_MPU_CFG>; + label = "slv-mnoc-mpu-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_MNOC_MPU_CFG>; + }; + + slv_display_cfg:slv-display-cfg { + cell-id = <MSM_BUS_SLAVE_DISPLAY_CFG>; + label = "slv-display-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_DISPLAY_CFG>; + }; + + slv_csi_phy_cfg:slv-csi-phy-cfg { + cell-id = <MSM_BUS_SLAVE_CSI_PHY_CFG>; + label = "slv-csi-phy-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_CSI_PHY_CFG>; + }; + + slv_display_throttle_cfg:slv-display-throttle-cfg { + cell-id = <MSM_BUS_SLAVE_DISPLAY_THROTTLE_CFG>; + label = "slv-display-throttle-cfg"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_DISPLAY_THROTTLE_CFG>; + }; + + slv_smmu_cfg:slv-smmu-cfg { + cell-id = <MSM_BUS_SLAVE_MMSS_SMMU_CFG>; + label = "slv-smmu-cfg"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_MMSS_SMMU_CFG>; + }; + + slv_mnoc_bimc:slv-mnoc-bimc { + cell-id = <MSM_BUS_MNOC_BIMC_SLV>; + label = "slv-mnoc-bimc"; + qcom,buswidth = <16>; + qcom,agg-ports = <2>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc>; + qcom,connections = <&mas_mnoc_bimc>; + qcom,slv-rpm-id = <ICBID_SLAVE_MNOC_BIMC>; + }; + + slv_srvc_mnoc:slv-srvc-mnoc { + cell-id = <MSM_BUS_SLAVE_SERVICE_MNOC>; + label = "slv-srvc-mnoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_mnoc_ahb>; + qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_MNOC>; + }; + + slv_hmss:slv-hmss { + cell-id = <MSM_BUS_SLAVE_APPSS>; + label = "slv-hmss"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_APPSS>; + }; + + slv_lpass:slv-lpass { + cell-id = <MSM_BUS_SLAVE_LPASS>; + label = "slv-lpass"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_LPASS>; + }; + + slv_wlan:slv-wlan { + cell-id = <MSM_BUS_SLAVE_WLAN>; + label = "slv-wlan"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_WLAN>; + }; + + slv_cdsp:slv-cdsp { + cell-id = <MSM_BUS_SLAVE_CDSP>; + label = "slv-cdsp"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_CDSP>; + }; + + slv_ipa:slv-ipa { + cell-id = <MSM_BUS_SLAVE_IPA_CFG>; + label = "slv-ipa"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_IPA_CFG>; + }; + + slv_snoc_bimc:slv-snoc-bimc { + cell-id = <MSM_BUS_SNOC_BIMC_SLV>; + label = "slv-snoc-bimc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,connections = <&mas_snoc_bimc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_BIMC>; + }; + + slv_snoc_cnoc:slv-snoc-cnoc { + cell-id = <MSM_BUS_SNOC_CNOC_SLV>; + label = "slv-snoc-cnoc"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,connections = <&mas_snoc_cnoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CNOC>; + }; + + slv_imem:slv-imem { + cell-id = <MSM_BUS_SLAVE_OCIMEM>; + label = "slv-imem"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_IMEM>; + }; + + slv_pimem:slv-pimem { + cell-id = <MSM_BUS_SLAVE_PIMEM>; + label = "slv-pimem"; + qcom,buswidth = <8>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_PIMEM>; + }; + + slv_qdss_stm:slv-qdss-stm { + cell-id = <MSM_BUS_SLAVE_QDSS_STM>; + label = "slv-qdss-stm"; + qcom,buswidth = <4>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_STM>; + }; + + slv_srvc_snoc:slv-srvc-snoc { + cell-id = <MSM_BUS_SLAVE_SERVICE_SNOC>; + label = "slv-srvc-snoc"; + qcom,buswidth = <16>; + qcom,agg-ports = <1>; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = <ICBID_SLAVE_SERVICE_SNOC>; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msmfalcon-regulator.dtsi b/arch/arm/boot/dts/qcom/msmfalcon-regulator.dtsi index 2c09774c1391..124ab341ba6b 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon-regulator.dtsi @@ -13,341 +13,348 @@ /* Stub regulators */ / { - /* PM660A S1 - VDD_APC0 supply */ - pm660_s1a: regulator-pm660-s1a { + /* PMFALCON S1 - VDD_APC0 supply */ + pmfalcon_s1a: regulator-pmfalcon-s1a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s1a"; + regulator-name = "pmfalcon_s1a"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <565000>; regulator-max-microvolt = <1170000>; }; - /* PM660A S2 + S3 = VDD_APC1 supply */ - pm660_s2a: regulator-pm660-s2a { + /* PMFALCON S2 + S3 = VDD_APC1 supply */ + pmfalcon_s2a: regulator-pmfalcon-s2a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s2a"; + regulator-name = "pmfalcon_s2a"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <565000>; regulator-max-microvolt = <1170000>; }; - pm660_s4a: regulator-pm660-s4a { + pmfalcon_s4a: regulator-pmfalcon-s4a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s4a"; + regulator-name = "pmfalcon_s4a"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <1805000>; regulator-max-microvolt = <2040000>; }; - pm660_s5a: regulator-pm660-s5a { + pmfalcon_s5a: regulator-pmfalcon-s5a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s5a"; + regulator-name = "pmfalcon_s5a"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; }; - pm660_s6a: regulator-pm660-s6a { + pmfalcon_s6a: regulator-pmfalcon-s6a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s6a"; + regulator-name = "pmfalcon_s6a"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <504000>; regulator-max-microvolt = <992000>; }; - pm660_s1b: regulator-pm660-s1b { + pmfalcon_s1b: regulator-pmfalcon-s1b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s1b"; + regulator-name = "pmfalcon_s1b"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <1125000>; regulator-max-microvolt = <1125000>; }; - pm660_s2b: regulator-pm660-s2b { + pmfalcon_s2b: regulator-pmfalcon-s2b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s2b"; + regulator-name = "pmfalcon_s2b"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; }; - /* PM660B S3 + S4 - VDD_CX supply */ - pm660_s3b_level: regulator-pm660-s3b-level { + /* PMFALCON S3 + S4 - VDD_CX supply */ + pmfalcon_s3b_level: regulator-pmfalcon-s3b-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s3b_level"; + regulator-name = "pmfalcon_s3b_level"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_s3b_floor_level: regulator-pm660-s3b-floor-level { + pmfalcon_s3b_floor_level: regulator-pmfalcon-s3b-floor-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s3b_floor_level"; + regulator-name = "pmfalcon_s3b_floor_level"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_s3b_level_ao: regulator-pm660-s3b-level-ao { + pmfalcon_s3b_level_ao: regulator-pmfalcon-s3b-level-ao { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s3b_level_ao"; + regulator-name = "pmfalcon_s3b_level_ao"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - /* PM660B S5 - VDD_MX supply */ - pm660_s5b_level: regulator-pm660-s5b-level { + /* PMFALCON S5 - VDD_MX supply */ + pmfalcon_s5b_level: regulator-pmfalcon-s5b-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s5b_level"; + regulator-name = "pmfalcon_s5b_level"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_s5b_floor_level: regulator-pm660-s5b-floor-level { + pmfalcon_s5b_floor_level: regulator-pmfalcon-s5b-floor-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s5b_floor_level"; + regulator-name = "pmfalcon_s5b_floor_level"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_s5b_level_ao: regulator-pm660-s5b-level-ao { + pmfalcon_s5b_level_ao: regulator-pmfalcon-s5b-level-ao { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_s5b_level_ao"; + regulator-name = "pmfalcon_s5b_level_ao"; qcom,hpm-min-load = <100000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_l1a: regulator-pm660-l1a { + pmfalcon_l1a: regulator-pmfalcon-l1a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l1a"; + regulator-name = "pmfalcon_l1a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1150000>; regulator-max-microvolt = <1250000>; }; - pm660_l2a: regulator-pm660-l2a { + pmfalcon_l2a: regulator-pmfalcon-l2a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l2a"; + regulator-name = "pmfalcon_l2a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <950000>; regulator-max-microvolt = <1010000>; }; - pm660_l3a: regulator-pm660-l3a { + pmfalcon_l3a: regulator-pmfalcon-l3a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l3a"; + regulator-name = "pmfalcon_l3a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <950000>; regulator-max-microvolt = <1010000>; }; /* TODO: remove if ADRASTEA CX/MX not voted from APPS */ - pm660_l5a: regulator-pm660-l5a { + pmfalcon_l5a: regulator-pmfalcon-l5a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l5a"; + regulator-name = "pmfalcon_l5a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <525000>; regulator-max-microvolt = <950000>; }; - pm660_l6a: regulator-pm660-l6a { + pmfalcon_l6a: regulator-pmfalcon-l6a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l6a"; + regulator-name = "pmfalcon_l6a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1370000>; }; - pm660_l7a: regulator-pm660-l7a { + pmfalcon_l7a: regulator-pmfalcon-l7a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l7a"; + regulator-name = "pmfalcon_l7a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; }; - pm660_l8a: regulator-pm660-l8a { + pmfalcon_l8a: regulator-pmfalcon-l8a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l8a"; + regulator-name = "pmfalcon_l8a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <1900000>; }; - pm660_l9a: regulator-pm660-l9a { + pmfalcon_l9a: regulator-pmfalcon-l9a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l9a"; + regulator-name = "pmfalcon_l9a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <1900000>; }; - pm660_l10a: regulator-pm660-l10a { + pmfalcon_l10a: regulator-pmfalcon-l10a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l10a"; + regulator-name = "pmfalcon_l10a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1780000>; regulator-max-microvolt = <1950000>; }; - pm660_l11a: regulator-pm660-l11a { + pmfalcon_l11a: regulator-pmfalcon-l11a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l11a"; + regulator-name = "pmfalcon_l11a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1780000>; regulator-max-microvolt = <1950000>; }; - pm660_l12a: regulator-pm660-l12a { + pmfalcon_l12a: regulator-pmfalcon-l12a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l12a"; + regulator-name = "pmfalcon_l12a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1780000>; regulator-max-microvolt = <1950000>; }; - pm660_l13a: regulator-pm660-l13a { + pmfalcon_l13a: regulator-pmfalcon-l13a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l13a"; + regulator-name = "pmfalcon_l13a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1750000>; regulator-max-microvolt = <1950000>; }; - pm660_l14a: regulator-pm660-l14a { + pmfalcon_l14a: regulator-pmfalcon-l14a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l14a"; + regulator-name = "pmfalcon_l14a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1710000>; regulator-max-microvolt = <1900000>; }; - pm660_l15a: regulator-pm660-l15a { + pmfalcon_l15a: regulator-pmfalcon-l15a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l15a"; + regulator-name = "pmfalcon_l15a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1650000>; regulator-max-microvolt = <2950000>; }; - pm660_l17a: regulator-pm660-l17a { + pmfalcon_l17a: regulator-pmfalcon-l17a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l17a"; + regulator-name = "pmfalcon_l17a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1650000>; regulator-max-microvolt = <2950000>; }; - pm660_l19a: regulator-pm660-l19a { + pmfalcon_l19a: regulator-pmfalcon-l19a { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l19a"; + regulator-name = "pmfalcon_l19a"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <3200000>; regulator-max-microvolt = <3400000>; }; - pm660_l1b: regulator-pm660-l1b { + pmfalcon_l1b: regulator-pmfalcon-l1b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l1b"; + regulator-name = "pmfalcon_l1b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <800000>; regulator-max-microvolt = <925000>; }; - pm660_l2b: regulator-pm660-l2b { + pmfalcon_l2b: regulator-pmfalcon-l2b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l2b"; + regulator-name = "pmfalcon_l2b"; qcom,hpm-min-load = <5000>; regulator-min-microvolt = <350000>; regulator-max-microvolt = <3100000>; }; - pm660_l3b: regulator-pm660-l3b { + pmfalcon_l3b: regulator-pmfalcon-l3b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l3b"; + regulator-name = "pmfalcon_l3b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1710000>; regulator-max-microvolt = <3600000>; }; - pm660_l4b: regulator-pm660-l4b { + pmfalcon_l4b: regulator-pmfalcon-l4b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l4b"; + regulator-name = "pmfalcon_l4b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1700000>; regulator-max-microvolt = <2950000>; }; - pm660_l5b: regulator-pm660-l5b { + pmfalcon_l5b: regulator-pmfalcon-l5b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l5b"; + regulator-name = "pmfalcon_l5b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <1721000>; regulator-max-microvolt = <3600000>; }; - pm660_l6b: regulator-pm660-l6b { + pmfalcon_l6b: regulator-pmfalcon-l6b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l6b"; + regulator-name = "pmfalcon_l6b"; qcom,hpm-min-load = <5000>; regulator-min-microvolt = <1700000>; regulator-max-microvolt = <3300000>; }; - pm660_l7b: regulator-pm660-l7b { + pmfalcon_l7b: regulator-pmfalcon-l7b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l7b"; + regulator-name = "pmfalcon_l7b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <2700000>; regulator-max-microvolt = <3125000>; }; - pm660_l8b: regulator-pm660-l8b { + pmfalcon_l8b: regulator-pmfalcon-l8b { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l8b"; + regulator-name = "pmfalcon_l8b"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <3200000>; regulator-max-microvolt = <3400000>; }; - /* PM660B L9 = VDD_SSC_CX supply */ - pm660_l9b_level: regulator-pm660-l9b-level { + /* PMFALCON L9 = VDD_SSC_CX supply */ + pmfalcon_l9b_level: regulator-pmfalcon-l9b-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l9b_level"; + regulator-name = "pmfalcon_l9b_level"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_l9b_floor_level: regulator-pm660-l9b-floor-level { + pmfalcon_l9b_floor_level: regulator-pmfalcon-l9b-floor-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l9b_floor_level"; + regulator-name = "pmfalcon_l9b_floor_level"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - /* PM660B L10 = VDD_SSC_MX supply */ - pm660_l10b_level: regulator-pm660-l10b-level { + /* PMFALCON L10 = VDD_SSC_MX supply */ + pmfalcon_l10b_level: regulator-pmfalcon-l10b-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l10b_level"; + regulator-name = "pmfalcon_l10b_level"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; - pm660_l10b_floor_level: regulator-pm660-l10b-floor-level { + pmfalcon_l10b_floor_level: regulator-pmfalcon-l10b-floor-level { compatible = "qcom,stub-regulator"; - regulator-name = "pm660_l10b_floor_level"; + regulator-name = "pmfalcon_l10b_floor_level"; qcom,hpm-min-load = <10000>; regulator-min-microvolt = <RPM_SMD_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = <RPM_SMD_REGULATOR_LEVEL_TURBO>; }; + pmfalcon_bob: regulator-pmfalcon-bob { + compatible = "qcom,stub-regulator"; + regulator-name = "pmfalcon_bob"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + /* GFX Supply */ gfx_vreg_corner: regulator-gfx-corner { compatible = "qcom,stub-regulator"; diff --git a/arch/arm/boot/dts/qcom/msmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmfalcon.dtsi index 246a6cf5371e..f5cabe910c93 100644 --- a/arch/arm/boot/dts/qcom/msmfalcon.dtsi +++ b/arch/arm/boot/dts/qcom/msmfalcon.dtsi @@ -151,19 +151,19 @@ modem_fw_mem: modem_fw_region@8ac00000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x8ac00000 0x0 0x7800000>; + reg = <0x0 0x8ac00000 0x0 0x7e00000>; }; - adsp_fw_mem: adsp_fw_region@92400000 { + adsp_fw_mem: adsp_fw_region@92a00000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x92400000 0x0 0x1e00000>; + reg = <0x0 0x92a00000 0x0 0x1e00000>; }; - cdsp_fw_mem: cdsp_fw_region@94200000 { + cdsp_fw_mem: cdsp_fw_region@94800000 { compatible = "removed-dma-pool"; no-map; - reg = <0x0 0x94200000 0x0 0x600000>; + reg = <0x0 0x94800000 0x0 0x600000>; }; venus_fw_mem: venus_fw_region { @@ -507,6 +507,13 @@ }; }; + rpm_bus: qcom,rpm-smd { + compatible = "qcom,rpm-glink"; + qcom,glink-edge = "rpm"; + rpm-channel-name = "rpm_requests"; + rpm-standalone; /* TODO: remove this after bring up */ + }; + qcom,ipc_router { compatible = "qcom,ipc_router"; qcom,node-id = <1>; @@ -541,9 +548,39 @@ qcom,xprt-version = <1>; qcom,fragmented-data; }; + + qcom,venus@cce0000 { + compatible = "qcom,pil-tz-generic"; + reg = <0xcce0000 0x4000>; + + vdd-supply = <&gdsc_venus>; + qcom,proxy-reg-names = "vdd"; + + clocks = <&clock_mmss MMSS_VIDEO_CORE_CLK>, + <&clock_mmss MMSS_VIDEO_AHB_CLK>, + <&clock_mmss MMSS_VIDEO_AXI_CLK>; + clock-names = "core_clk","iface_clk", + "bus_clk"; + qcom,proxy-clock-names = "core_clk", + "iface_clk","bus_clk"; + + qcom,msm-bus,name = "pil-venus"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <63 512 0 0>, + <63 512 0 304000>; + + qcom,pas-id = <9>; + qcom,proxy-timeout-ms = <100>; + qcom,firmware-name = "venus"; + memory-region = <&venus_fw_mem>; + status = "ok"; + }; }; #include "msmfalcon-ion.dtsi" +#include "msmfalcon-bus.dtsi" #include "msmfalcon-regulator.dtsi" #include "msm-gdsc-cobalt.dtsi" diff --git a/arch/arm/boot/dts/qcom/msmtriton.dtsi b/arch/arm/boot/dts/qcom/msmtriton.dtsi index 17198e462024..3e27fe7df6fa 100644 --- a/arch/arm/boot/dts/qcom/msmtriton.dtsi +++ b/arch/arm/boot/dts/qcom/msmtriton.dtsi @@ -136,6 +136,53 @@ soc: soc { }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + removed_region: removed_region0@85800000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0x0 0x85800000 0x0 0x3700000>; + }; + + modem_fw_mem: modem_fw_region@8ac00000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0x0 0x8ac00000 0x0 0x7e00000>; + }; + + adsp_fw_mem: adsp_fw_region@92a00000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0x0 0x92a00000 0x0 0x1e00000>; + }; + + adsp_mem: adsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x400000>; + }; + + qseecom_mem: qseecom_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1400000>; + }; + + secure_display_memory: secure_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x5c00000>; + }; + }; }; &soc { diff --git a/arch/arm64/configs/msmcortex-perf_defconfig b/arch/arm64/configs/msmcortex-perf_defconfig index c425514ddec5..08288e1b5c25 100644 --- a/arch/arm64/configs/msmcortex-perf_defconfig +++ b/arch/arm64/configs/msmcortex-perf_defconfig @@ -317,6 +317,7 @@ CONFIG_MSM_BCL_PERIPHERAL_CTL=y CONFIG_BATTERY_BCL=y CONFIG_QPNP_SMB2=y CONFIG_SMB138X_CHARGER=y +CONFIG_QPNP_QNOVO=y CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y CONFIG_LIMITS_MONITOR=y CONFIG_LIMITS_LITE_HW=y @@ -484,7 +485,6 @@ CONFIG_ARM_SMMU=y CONFIG_IOMMU_DEBUG=y CONFIG_IOMMU_DEBUG_TRACKING=y CONFIG_IOMMU_TESTS=y -CONFIG_QCOM_COMMON_LOG=y CONFIG_MSM_SMEM=y CONFIG_QPNP_HAPTIC=y CONFIG_MSM_SMD=y @@ -550,6 +550,7 @@ CONFIG_PWM_QPNP=y CONFIG_ARM_GIC_V3_ACL=y CONFIG_ANDROID=y CONFIG_ANDROID_BINDER_IPC=y +CONFIG_MSM_TZ_LOG=y CONFIG_SENSORS_SSC=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y diff --git a/arch/arm64/configs/msmcortex_defconfig b/arch/arm64/configs/msmcortex_defconfig index 27f7ac6663d6..9e2727c4fe1e 100644 --- a/arch/arm64/configs/msmcortex_defconfig +++ b/arch/arm64/configs/msmcortex_defconfig @@ -320,6 +320,7 @@ CONFIG_MSM_BCL_PERIPHERAL_CTL=y CONFIG_BATTERY_BCL=y CONFIG_QPNP_SMB2=y CONFIG_SMB138X_CHARGER=y +CONFIG_QPNP_QNOVO=y CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y CONFIG_LIMITS_MONITOR=y CONFIG_LIMITS_LITE_HW=y @@ -461,7 +462,6 @@ CONFIG_SWITCH=y CONFIG_EDAC=y CONFIG_EDAC_MM_EDAC=y CONFIG_EDAC_CORTEX_ARM64=y -CONFIG_EDAC_CORTEX_ARM64_PANIC_ON_CE=y CONFIG_EDAC_CORTEX_ARM64_PANIC_ON_UE=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_QPNP=y diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 10db9cbaf49e..c9df86d68b44 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -683,7 +683,7 @@ int armv8pmu_probe_num_events(struct arm_pmu *arm_pmu) ret = smp_call_function_any(&arm_pmu->supported_cpus, armv8pmu_read_num_pmnc_events, &arm_pmu->num_events, 1); - if (!ret) + if (ret) idle_notifier_unregister(&pmu_idle_nb->perf_cpu_idle_nb); return ret; diff --git a/drivers/clk/msm/clock-mmss-cobalt.c b/drivers/clk/msm/clock-mmss-cobalt.c index 220a8ba377ba..1a8083e74f5f 100644 --- a/drivers/clk/msm/clock-mmss-cobalt.c +++ b/drivers/clk/msm/clock-mmss-cobalt.c @@ -1113,16 +1113,16 @@ static struct rcg_clk dp_pixel_clk_src = { .parent = &ext_dp_phy_pll_vco.c, .ops = &clk_ops_rcg_dp, .flags = CLKFLAG_NO_RATE_CACHE, - VDD_DIG_FMAX_MAP3(LOWER, 148380000, LOW, 296740000, - NOMINAL, 593470000), + VDD_DIG_FMAX_MAP3(LOWER, 148380, LOW, 296740, + NOMINAL, 593470), CLK_INIT(dp_pixel_clk_src.c), }, }; static struct clk_freq_tbl ftbl_dp_link_clk_src[] = { - F_SLEW( 162000000, 324000000, ext_dp_phy_pll_link, 2, 0, 0), - F_SLEW( 270000000, 540000000, ext_dp_phy_pll_link, 2, 0, 0), - F_SLEW( 540000000, 1080000000, ext_dp_phy_pll_link, 2, 0, 0), + F_SLEW( 162000, 324000, ext_dp_phy_pll_link, 2, 0, 0), + F_SLEW( 270000, 540000, ext_dp_phy_pll_link, 2, 0, 0), + F_SLEW( 540000, 1080000, ext_dp_phy_pll_link, 2, 0, 0), F_END }; @@ -1136,8 +1136,8 @@ static struct rcg_clk dp_link_clk_src = { .dbg_name = "dp_link_clk_src", .ops = &clk_ops_rcg, .flags = CLKFLAG_NO_RATE_CACHE, - VDD_DIG_FMAX_MAP3(LOWER, 162000000, LOW, 270000000, - NOMINAL, 540000000), + VDD_DIG_FMAX_MAP3(LOWER, 162000, LOW, 270000, + NOMINAL, 540000), CLK_INIT(dp_link_clk_src.c), }, }; @@ -1149,9 +1149,9 @@ static struct rcg_clk dp_link_clk_src = { * clocks. */ static struct clk_freq_tbl ftbl_dp_crypto_clk_src[] = { - F_MM( 101250000, ext_dp_phy_pll_link, 1, 5, 16), - F_MM( 168750000, ext_dp_phy_pll_link, 1, 5, 16), - F_MM( 337500000, ext_dp_phy_pll_link, 1, 5, 16), + F_MM( 101250, ext_dp_phy_pll_link, 1, 5, 16), + F_MM( 168750, ext_dp_phy_pll_link, 1, 5, 16), + F_MM( 337500, ext_dp_phy_pll_link, 1, 5, 16), F_END }; @@ -1164,8 +1164,8 @@ static struct rcg_clk dp_crypto_clk_src = { .c = { .dbg_name = "dp_crypto_clk_src", .ops = &clk_ops_rcg_mnd, - VDD_DIG_FMAX_MAP3(LOWER, 101250000, LOW, 168750000, - NOMINAL, 337500000), + VDD_DIG_FMAX_MAP3(LOWER, 101250, LOW, 168750, + NOMINAL, 337500), CLK_INIT(dp_crypto_clk_src.c), }, }; diff --git a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt-util.c b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt-util.c index c88a5089bd60..9a080e4ee39b 100644 --- a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt-util.c +++ b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt-util.c @@ -190,9 +190,9 @@ int dp_config_vco_rate(struct dp_pll_vco_clk *vco, unsigned long rate) QSERDES_COM_CLK_SEL, 0x30); /* Different for each clock rates */ - if (rate == DP_VCO_HSCLK_RATE_1620MHz) { - pr_debug("%s: VCO rate: %lld\n", __func__, - DP_VCO_RATE_8100MHz); + if (rate == DP_VCO_HSCLK_RATE_1620MHZDIV1000) { + pr_debug("%s: VCO rate: %ld\n", __func__, + DP_VCO_RATE_8100MHZDIV1000); MDSS_PLL_REG_W(dp_res->pll_base, QSERDES_COM_SYS_CLK_CTRL, 0x02); MDSS_PLL_REG_W(dp_res->pll_base, @@ -215,9 +215,9 @@ int dp_config_vco_rate(struct dp_pll_vco_clk *vco, unsigned long rate) QSERDES_COM_LOCK_CMP2_MODE0, 0x21); MDSS_PLL_REG_W(dp_res->pll_base, QSERDES_COM_LOCK_CMP3_MODE0, 0x00); - } else if (rate == DP_VCO_HSCLK_RATE_2700MHz) { - pr_debug("%s: VCO rate: %lld\n", __func__, - DP_VCO_RATE_8100MHz); + } else if (rate == DP_VCO_HSCLK_RATE_2700MHZDIV1000) { + pr_debug("%s: VCO rate: %ld\n", __func__, + DP_VCO_RATE_8100MHZDIV1000); MDSS_PLL_REG_W(dp_res->pll_base, QSERDES_COM_SYS_CLK_CTRL, 0x06); MDSS_PLL_REG_W(dp_res->pll_base, @@ -240,9 +240,9 @@ int dp_config_vco_rate(struct dp_pll_vco_clk *vco, unsigned long rate) QSERDES_COM_LOCK_CMP2_MODE0, 0x38); MDSS_PLL_REG_W(dp_res->pll_base, QSERDES_COM_LOCK_CMP3_MODE0, 0x00); - } else if (rate == DP_VCO_HSCLK_RATE_5400MHz) { - pr_debug("%s: VCO rate: %lld\n", __func__, - DP_VCO_RATE_10800MHz); + } else if (rate == DP_VCO_HSCLK_RATE_5400MHZDIV1000) { + pr_debug("%s: VCO rate: %ld\n", __func__, + DP_VCO_RATE_10800MHZDIV1000); MDSS_PLL_REG_W(dp_res->pll_base, QSERDES_COM_SYS_CLK_CTRL, 0x06); MDSS_PLL_REG_W(dp_res->pll_base, @@ -272,8 +272,8 @@ int dp_config_vco_rate(struct dp_pll_vco_clk *vco, unsigned long rate) /* Make sure the PLL register writes are done */ wmb(); - if ((rate == DP_VCO_HSCLK_RATE_1620MHz) - || (rate == DP_VCO_HSCLK_RATE_2700MHz)) { + if ((rate == DP_VCO_HSCLK_RATE_1620MHZDIV1000) + || (rate == DP_VCO_HSCLK_RATE_2700MHZDIV1000)) { MDSS_PLL_REG_W(dp_res->phy_base, DP_PHY_VCO_DIV, 0x1); } else { @@ -713,14 +713,14 @@ unsigned long dp_vco_get_rate(struct clk *c) pr_err("%s: unsupported div. Phy_mode: %d\n", __func__, div); if (link2xclk_div == 10) { - vco_rate = DP_VCO_HSCLK_RATE_2700MHz; + vco_rate = DP_VCO_HSCLK_RATE_2700MHZDIV1000; } else { if (hsclk_div == 5) - vco_rate = DP_VCO_HSCLK_RATE_1620MHz; + vco_rate = DP_VCO_HSCLK_RATE_1620MHZDIV1000; else if (hsclk_div == 3) - vco_rate = DP_VCO_HSCLK_RATE_2700MHz; + vco_rate = DP_VCO_HSCLK_RATE_2700MHZDIV1000; else - vco_rate = DP_VCO_HSCLK_RATE_5400MHz; + vco_rate = DP_VCO_HSCLK_RATE_5400MHZDIV1000; } pr_debug("returning vco rate = %lu\n", (unsigned long)vco_rate); @@ -737,8 +737,8 @@ long dp_vco_round_rate(struct clk *c, unsigned long rate) if (rate <= vco->min_rate) rrate = vco->min_rate; - else if (rate <= DP_VCO_HSCLK_RATE_2700MHz) - rrate = DP_VCO_HSCLK_RATE_2700MHz; + else if (rate <= DP_VCO_HSCLK_RATE_2700MHZDIV1000) + rrate = DP_VCO_HSCLK_RATE_2700MHZDIV1000; else rrate = vco->max_rate; diff --git a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.c b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.c index 47b5bd7d7579..598a2e8d25de 100644 --- a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.c +++ b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.c @@ -93,8 +93,8 @@ static struct clk_mux_ops mdss_mux_ops = { }; static struct dp_pll_vco_clk dp_vco_clk = { - .min_rate = DP_VCO_HSCLK_RATE_1620MHz, - .max_rate = DP_VCO_HSCLK_RATE_5400MHz, + .min_rate = DP_VCO_HSCLK_RATE_1620MHZDIV1000, + .max_rate = DP_VCO_HSCLK_RATE_5400MHZDIV1000, .c = { .dbg_name = "dp_vco_clk", .ops = &dp_cobalt_vco_clk_ops, diff --git a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.h b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.h index d2b5d98a2d41..d89545b38e64 100644 --- a/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.h +++ b/drivers/clk/msm/mdss/mdss-dp-pll-cobalt.h @@ -155,12 +155,12 @@ #define DP_PLL_POLL_SLEEP_US 500 #define DP_PLL_POLL_TIMEOUT_US 10000 -#define DP_VCO_RATE_8100MHz 8100000000ULL -#define DP_VCO_RATE_10800MHz 10800000000ULL +#define DP_VCO_RATE_8100MHZDIV1000 8100000UL +#define DP_VCO_RATE_10800MHZDIV1000 10800000UL -#define DP_VCO_HSCLK_RATE_1620MHz 1620000000ULL -#define DP_VCO_HSCLK_RATE_2700MHz 2700000000ULL -#define DP_VCO_HSCLK_RATE_5400MHz 5400000000ULL +#define DP_VCO_HSCLK_RATE_1620MHZDIV1000 1620000UL +#define DP_VCO_HSCLK_RATE_2700MHZDIV1000 2700000UL +#define DP_VCO_HSCLK_RATE_5400MHZDIV1000 5400000UL int dp_vco_set_rate(struct clk *c, unsigned long rate); unsigned long dp_vco_get_rate(struct clk *c); diff --git a/drivers/cpuidle/lpm-levels.c b/drivers/cpuidle/lpm-levels.c index 2b0df3f0e04e..4f880fdd1478 100644 --- a/drivers/cpuidle/lpm-levels.c +++ b/drivers/cpuidle/lpm-levels.c @@ -674,6 +674,7 @@ static int cluster_configure(struct lpm_cluster *cluster, int idx, goto failed_set_mode; } + us = us + 1; do_div(us, USEC_PER_SEC/SCLK_HZ); msm_mpm_enter_sleep(us, from_idle, cpumask); } diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c index 9b42e5ae129a..3562de7fc967 100644 --- a/drivers/crypto/msm/qce50.c +++ b/drivers/crypto/msm/qce50.c @@ -94,7 +94,6 @@ enum qce_owner { struct dummy_request { struct qce_sha_req sreq; - uint8_t *in_buf; struct scatterlist sg; struct ahash_request areq; }; @@ -154,6 +153,7 @@ struct qce_device { atomic_t bunch_cmd_seq; atomic_t last_intr_seq; bool cadence_flag; + uint8_t *dummyreq_in_buf; }; static void print_notify_debug(struct sps_event_notify *notify); @@ -4351,8 +4351,6 @@ static int qce_setup_ce_sps_data(struct qce_device *pce_dev) (uintptr_t)vaddr; vaddr += pce_dev->ce_bam_info.ce_burst_size * 2; } - pce_dev->dummyreq.in_buf = (uint8_t *)vaddr; - vaddr += DUMMY_REQ_DATA_LEN; if ((vaddr - pce_dev->coh_vmem) > pce_dev->memsize || iovec_memsize < 0) panic("qce50: Not enough coherent memory. Allocate %x , need %lx\n", @@ -5887,8 +5885,8 @@ static int setup_dummy_req(struct qce_device *pce_dev) "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopqopqrpqrs"; int len = DUMMY_REQ_DATA_LEN; - memcpy(pce_dev->dummyreq.in_buf, input, len); - sg_set_buf(&pce_dev->dummyreq.sg, pce_dev->dummyreq.in_buf, len); + memcpy(pce_dev->dummyreq_in_buf, input, len); + sg_set_buf(&pce_dev->dummyreq.sg, pce_dev->dummyreq_in_buf, len); sg_mark_end(&pce_dev->dummyreq.sg); pce_dev->dummyreq.sreq.alg = QCE_HASH_SHA1; @@ -5957,6 +5955,10 @@ void *qce_open(struct platform_device *pdev, int *rc) if (pce_dev->iovec_vmem == NULL) goto err_mem; + pce_dev->dummyreq_in_buf = kzalloc(DUMMY_REQ_DATA_LEN, GFP_KERNEL); + if (pce_dev->dummyreq_in_buf == NULL) + goto err_mem; + *rc = __qce_init_clk(pce_dev); if (*rc) goto err_mem; @@ -5996,6 +5998,7 @@ err_enable_clk: __qce_deinit_clk(pce_dev); err_mem: + kfree(pce_dev->dummyreq_in_buf); kfree(pce_dev->iovec_vmem); if (pce_dev->coh_vmem) dma_free_coherent(pce_dev->pdev, pce_dev->memsize, @@ -6027,6 +6030,7 @@ int qce_close(void *handle) if (pce_dev->coh_vmem) dma_free_coherent(pce_dev->pdev, pce_dev->memsize, pce_dev->coh_vmem, pce_dev->coh_pmem); + kfree(pce_dev->dummyreq_in_buf); kfree(pce_dev->iovec_vmem); qce_disable_clk(pce_dev); diff --git a/drivers/edac/cortex_arm64_edac.c b/drivers/edac/cortex_arm64_edac.c index 223941a038fd..28397c191583 100644 --- a/drivers/edac/cortex_arm64_edac.c +++ b/drivers/edac/cortex_arm64_edac.c @@ -714,7 +714,6 @@ static void arm64_sbe_handler(struct perf_event *event, errdata.err = SBE; edac_printk(KERN_CRIT, EDAC_CPU, "ARM64 CPU ERP: Single-bit error interrupt received on CPU %d!\n", cpu); - WARN_ON(!panic_on_ce); arm64_erp_local_handler(&errdata); } #endif diff --git a/drivers/gpu/msm/a5xx_reg.h b/drivers/gpu/msm/a5xx_reg.h index cedd02987002..3b29452ce8bd 100644 --- a/drivers/gpu/msm/a5xx_reg.h +++ b/drivers/gpu/msm/a5xx_reg.h @@ -788,6 +788,9 @@ /* COUNTABLE FOR TSE PERFCOUNTER */ #define A5XX_TSE_INPUT_PRIM_NUM 0x6 +/* COUNTABLE FOR RBBM PERFCOUNTER */ +#define A5XX_RBBM_ALWAYS_COUNT 0x0 + /* GPMU POWER COUNTERS */ #define A5XX_SP_POWER_COUNTER_0_LO 0xA840 #define A5XX_SP_POWER_COUNTER_0_HI 0xA841 diff --git a/drivers/gpu/msm/adreno_perfcounter.c b/drivers/gpu/msm/adreno_perfcounter.c index 10f4577c1103..8e354d71a291 100644 --- a/drivers/gpu/msm/adreno_perfcounter.c +++ b/drivers/gpu/msm/adreno_perfcounter.c @@ -812,6 +812,11 @@ static int adreno_perfcounter_enable(struct adreno_device *adreno_dev, case KGSL_PERFCOUNTER_GROUP_ALWAYSON_PWR: _power_counter_enable_alwayson(adreno_dev, counters); break; + case KGSL_PERFCOUNTER_GROUP_RBBM: + /* The following rbbm countable is not reliable on a540 */ + if (adreno_is_a540(adreno_dev)) + if (countable == A5XX_RBBM_ALWAYS_COUNT) + return -EINVAL; default: return _perfcounter_enable_default(adreno_dev, counters, group, counter, countable); diff --git a/drivers/iio/adc/qcom-rradc.c b/drivers/iio/adc/qcom-rradc.c index ae2df4f7ff0d..a0fcad198f62 100644 --- a/drivers/iio/adc/qcom-rradc.c +++ b/drivers/iio/adc/qcom-rradc.c @@ -11,6 +11,8 @@ * GNU General Public License for more details. */ +#define pr_fmt(fmt) "RRADC: %s: " fmt, __func__ + #include <linux/iio/iio.h> #include <linux/kernel.h> #include <linux/math64.h> diff --git a/drivers/input/touchscreen/gt9xx/goodix_tool.c b/drivers/input/touchscreen/gt9xx/goodix_tool.c index c67c4c8f1207..63fad6c46836 100644 --- a/drivers/input/touchscreen/gt9xx/goodix_tool.c +++ b/drivers/input/touchscreen/gt9xx/goodix_tool.c @@ -85,7 +85,6 @@ static void tool_set_proc_name(char *procname) } snprintf(procname, 20, "gmnode%04d%02d%02d", n_year, n_month, n_day); - /* GTP_DEBUG("procname = %s", procname); */ } static s32 tool_i2c_read_no_extra(u8 *buf, u16 len) @@ -180,11 +179,11 @@ static void register_i2c_func(void) && strcmp(IC_TYPE, "GTxxx")) { tool_i2c_read = tool_i2c_read_with_extra; tool_i2c_write = tool_i2c_write_with_extra; - GTP_DEBUG("I2C function: with pre and end cmd!"); + pr_debug("I2C function: with pre and end cmd!\n"); } else { tool_i2c_read = tool_i2c_read_no_extra; tool_i2c_write = tool_i2c_write_no_extra; - GTP_INFO("I2C function: without pre and end cmd!"); + pr_info("I2C function: without pre and end cmd!\n"); } } @@ -192,7 +191,7 @@ static void unregister_i2c_func(void) { tool_i2c_read = NULL; tool_i2c_write = NULL; - GTP_INFO("I2C function: unregister i2c transfer function!"); + pr_info("I2C function: unregister i2c transfer function!\n"); } s32 init_wr_node(struct i2c_client *client) @@ -215,7 +214,7 @@ s32 init_wr_node(struct i2c_client *client) DATA_LENGTH = i * DATA_LENGTH_UINT; dev_dbg(&client->dev, "Applied memory size:%d.", DATA_LENGTH); } else { - GTP_ERROR("Apply for memory failed."); + pr_err("Apply for memory failed.\n"); return FAIL; } @@ -228,7 +227,7 @@ s32 init_wr_node(struct i2c_client *client) tool_set_proc_name(procname); goodix_proc_entry = create_proc_entry(procname, 0660, NULL); if (goodix_proc_entry == NULL) { - GTP_ERROR("Couldn't create proc entry!"); + pr_err("Couldn't create proc entry!\n"); return FAIL; } GTP_INFO("Create proc entry success!"); @@ -257,7 +256,7 @@ static u8 relation(u8 src, u8 dst, u8 rlt) case 1: ret = (src == dst) ? true : false; - GTP_DEBUG("equal:src:0x%02x dst:0x%02x ret:%d.", + pr_debug("equal:src:0x%02x dst:0x%02x ret:%d.\n", src, dst, (s32)ret); break; @@ -308,14 +307,14 @@ static u8 comfirm(void) for (i = 0; i < cmd_head.times; i++) { if (tool_i2c_read(buf, 1) <= 0) { - GTP_ERROR("Read flag data failed!"); + pr_err("Read flag data failed!\n"); return FAIL; } if (true == relation(buf[GTP_ADDR_LENGTH], cmd_head.flag_val, cmd_head.flag_relation)) { - GTP_DEBUG("value at flag addr:0x%02x.", + pr_debug("value at flag addr:0x%02x.\n", buf[GTP_ADDR_LENGTH]); - GTP_DEBUG("flag value:0x%02x.", cmd_head.flag_val); + pr_debug("flag value:0x%02x.\n", cmd_head.flag_val); break; } @@ -323,7 +322,7 @@ static u8 comfirm(void) } if (i >= cmd_head.times) { - GTP_ERROR("Didn't get the flag to continue!"); + pr_debug("Didn't get the flag to continue!\n"); return FAIL; } @@ -344,41 +343,38 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, { s32 ret = 0; - GTP_DEBUG_FUNC(); - GTP_DEBUG_ARRAY((u8 *)buff, len); - mutex_lock(&lock); ret = copy_from_user(&cmd_head, buff, CMD_HEAD_LENGTH); if (ret) { - GTP_ERROR("copy_from_user failed."); + pr_err("copy_from_user failed.\n"); ret = -EACCES; goto exit; } - GTP_DEBUG("wr :0x%02x.", cmd_head.wr); - GTP_DEBUG("flag:0x%02x.", cmd_head.flag); - GTP_DEBUG("flag addr:0x%02x%02x.", cmd_head.flag_addr[0], + pr_debug("wr :0x%02x.\n", cmd_head.wr); + pr_debug("flag:0x%02x.\n", cmd_head.flag); + pr_debug("flag addr:0x%02x%02x.\n", cmd_head.flag_addr[0], cmd_head.flag_addr[1]); - GTP_DEBUG("flag val:0x%02x.", cmd_head.flag_val); - GTP_DEBUG("flag rel:0x%02x.", cmd_head.flag_relation); - GTP_DEBUG("circle :%d.", (s32)cmd_head.circle); - GTP_DEBUG("times :%d.", (s32)cmd_head.times); - GTP_DEBUG("retry :%d.", (s32)cmd_head.retry); - GTP_DEBUG("delay :%d.", (s32)cmd_head.delay); - GTP_DEBUG("data len:%d.", (s32)cmd_head.data_len); - GTP_DEBUG("addr len:%d.", (s32)cmd_head.addr_len); - GTP_DEBUG("addr:0x%02x%02x.", cmd_head.addr[0], cmd_head.addr[1]); - GTP_DEBUG("len:%d.", (s32)len); - GTP_DEBUG("buf[20]:0x%02x.", buff[CMD_HEAD_LENGTH]); + pr_debug("flag val:0x%02x.\n", cmd_head.flag_val); + pr_debug("flag rel:0x%02x.\n", cmd_head.flag_relation); + pr_debug("circle :%d.\n", (s32)cmd_head.circle); + pr_debug("times :%d.\n", (s32)cmd_head.times); + pr_debug("retry :%d.\n", (s32)cmd_head.retry); + pr_debug("delay :%d.\n", (s32)cmd_head.delay); + pr_debug("data len:%d.\n", (s32)cmd_head.data_len); + pr_debug("addr len:%d.\n", (s32)cmd_head.addr_len); + pr_debug("addr:0x%02x%02x.\n", cmd_head.addr[0], cmd_head.addr[1]); + pr_debug("len:%d.\n", (s32)len); + pr_debug("buf[20]:0x%02x.\n", buff[CMD_HEAD_LENGTH]); if (cmd_head.data_len > (DATA_LENGTH - GTP_ADDR_LENGTH)) { - pr_err("data len %d > data buff %d, rejected!\n", + pr_debug("data len %d > data buff %d, rejected!\n", cmd_head.data_len, (DATA_LENGTH - GTP_ADDR_LENGTH)); ret = -EINVAL; goto exit; } if (cmd_head.addr_len > GTP_ADDR_LENGTH) { - pr_err(" addr len %d > data buff %d, rejected!\n", + pr_debug(" addr len %d > data buff %d, rejected!\n", cmd_head.addr_len, GTP_ADDR_LENGTH); ret = -EINVAL; goto exit; @@ -391,19 +387,14 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); if (ret) - GTP_ERROR("copy_from_user failed."); + pr_err("copy_from_user failed.\n"); memcpy(&cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len], cmd_head.addr, cmd_head.addr_len); - GTP_DEBUG_ARRAY(cmd_head.data, - cmd_head.data_len + cmd_head.addr_len); - GTP_DEBUG_ARRAY((u8 *)&buff[CMD_HEAD_LENGTH], - cmd_head.data_len); - if (cmd_head.flag == 1) { if (comfirm() == FAIL) { - GTP_ERROR("[WRITE]Comfirm fail!"); + pr_err("[WRITE]Comfirm fail!\n"); ret = -EINVAL; goto exit; } @@ -413,14 +404,11 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, if (tool_i2c_write( &cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len], cmd_head.data_len + cmd_head.addr_len) <= 0) { - GTP_ERROR("[WRITE]Write data failed!"); + pr_err("[WRITE]Write data failed!\n"); ret = -EIO; goto exit; } - GTP_DEBUG_ARRAY( - &cmd_head.data[GTP_ADDR_LENGTH - cmd_head.addr_len], - cmd_head.data_len + cmd_head.addr_len); if (cmd_head.delay) msleep(cmd_head.delay); @@ -431,10 +419,10 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, ret = copy_from_user(&cmd_head.data[0], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); if (ret) - GTP_ERROR("copy_from_user failed."); + pr_err("copy_from_user failed.\n"); if (cmd_head.data_len > sizeof(IC_TYPE)) { - pr_err("<<-GTP->> data len %d > data buff %d, rejected!\n", + pr_debug("<<-GTP->> data len %d > data buff %d, rejected!\n", cmd_head.data_len, sizeof(IC_TYPE)); ret = -EINVAL; goto exit; @@ -473,13 +461,13 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, ret = copy_from_user(&cmd_head.data[GTP_ADDR_LENGTH], &buff[CMD_HEAD_LENGTH], cmd_head.data_len); if (ret) - GTP_DEBUG("copy_from_user failed."); + pr_debug("copy_from_user failed.\n"); if (cmd_head.data[GTP_ADDR_LENGTH]) { - GTP_DEBUG("gtp enter rawdiff."); + pr_debug("gtp enter rawdiff.\n"); ts->gtp_rawdiff_mode = true; } else { ts->gtp_rawdiff_mode = false; - GTP_DEBUG("gtp leave rawdiff."); + pr_debug("gtp leave rawdiff.\n"); } ret = CMD_HEAD_LENGTH; goto exit; @@ -495,7 +483,7 @@ static s32 goodix_tool_write(struct file *filp, const char __user *buff, show_len = 0; total_len = 0; if (cmd_head.data_len + 1 > DATA_LENGTH) { - pr_err("<<-GTP->> data len %d > data buff %d, rejected!\n", + pr_debug("<<-GTP->> data len %d > data buff %d, rejected!\n", cmd_head.data_len + 1, DATA_LENGTH); ret = -EINVAL; goto exit; @@ -530,7 +518,6 @@ static s32 goodix_tool_read(char *page, char **start, off_t off, int count, int *eof, void *data) { s32 ret; - GTP_DEBUG_FUNC(); mutex_lock(&lock); if (cmd_head.wr % 2) { @@ -544,7 +531,7 @@ static s32 goodix_tool_read(char *page, char **start, off_t off, int count, if (cmd_head.flag == 1) { if (comfirm() == FAIL) { - GTP_ERROR("[READ]Comfirm fail!"); + pr_err("[READ]Comfirm fail!\n"); ret = -EINVAL; goto exit; } @@ -554,9 +541,9 @@ static s32 goodix_tool_read(char *page, char **start, off_t off, int count, memcpy(cmd_head.data, cmd_head.addr, cmd_head.addr_len); - GTP_DEBUG("[CMD HEAD DATA] ADDR:0x%02x%02x.", cmd_head.data[0], + pr_debug("[CMD HEAD DATA] ADDR:0x%02x%02x.\n", cmd_head.data[0], cmd_head.data[1]); - GTP_DEBUG("[CMD HEAD ADDR] ADDR:0x%02x%02x.", cmd_head.addr[0], + pr_debug("[CMD HEAD ADDR] ADDR:0x%02x%02x.\n", cmd_head.addr[0], cmd_head.addr[1]); if (cmd_head.delay) @@ -572,16 +559,13 @@ static s32 goodix_tool_read(char *page, char **start, off_t off, int count, data_len -= len; if (tool_i2c_read(cmd_head.data, len) <= 0) { - GTP_ERROR("[READ]Read data failed!"); + pr_err("[READ]Read data failed!\n"); ret = -EINVAL; goto exit; } memcpy(&page[loc], &cmd_head.data[GTP_ADDR_LENGTH], len); loc += len; - - GTP_DEBUG_ARRAY(&cmd_head.data[GTP_ADDR_LENGTH], len); - GTP_DEBUG_ARRAY(page, len); } } else if (cmd_head.wr == 2) { /* memcpy(page, "gt8", cmd_head.data_len); @@ -589,7 +573,7 @@ static s32 goodix_tool_read(char *page, char **start, off_t off, int count, * page[5] = 0; */ - GTP_DEBUG("Return ic type:%s len:%d.", page, + pr_debug("Return ic type:%s len:%d.\n", page, (s32)cmd_head.data_len); ret = cmd_head.data_len; goto exit; diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.c b/drivers/input/touchscreen/gt9xx/gt9xx.c index 6c3747108d75..bc0ff0e4e7ac 100644 --- a/drivers/input/touchscreen/gt9xx/gt9xx.c +++ b/drivers/input/touchscreen/gt9xx/gt9xx.c @@ -77,19 +77,13 @@ #if GTP_HAVE_TOUCH_KEY static const u16 touch_key_array[] = {KEY_MENU, KEY_HOMEPAGE, KEY_BACK}; -#if GTP_DEBUG_ON -static const int key_codes[] = { - KEY_HOME, KEY_BACK, KEY_MENU, KEY_SEARCH -}; -static const char *const key_names[] = { - "Key_Home", "Key_Back", "Key_Menu", "Key_Search" -}; -#endif #endif static void gtp_reset_guitar(struct goodix_ts_data *ts, int ms); static void gtp_int_sync(struct goodix_ts_data *ts, int ms); static int gtp_i2c_test(struct i2c_client *client); +static int goodix_power_off(struct goodix_ts_data *ts); +static int goodix_power_on(struct goodix_ts_data *ts); #if defined(CONFIG_FB) static int fb_notifier_callback(struct notifier_block *self, @@ -493,30 +487,19 @@ static void goodix_ts_work_func(struct work_struct *work) memcpy(&point_data[12], &buf[2], 8 * (touch_num - 1)); } -#if GTP_HAVE_TOUCH_KEY + key_value = point_data[3 + 8 * touch_num]; if (key_value || pre_key) { - for (i = 0; i < ARRAY_SIZE(touch_key_array); i++) { -#if GTP_DEBUG_ON - for (ret = 0; ret < 4; ++ret) { - if (key_codes[ret] == touch_key_array[i]) { - GTP_DEBUG("Key: %s %s", - key_names[ret], - (key_value & (0x01 << i)) - ? "Down" : "Up"); - break; - } - } -#endif - + for (i = 0; i < ts->pdata->num_button; i++) { input_report_key(ts->input_dev, - touch_key_array[i], key_value & (0x01<<i)); + ts->pdata->button_map[i], + key_value & (0x01<<i)); } touch_num = 0; pre_touch = 0; } -#endif + pre_key = key_value; #if GTP_WITH_PEN @@ -754,7 +737,7 @@ Input: ts: private data. Output: Executive outcomes. - 1: succeed, otherwise failed. + >0: succeed, otherwise failed. *******************************************************/ static s8 gtp_enter_sleep(struct goodix_ts_data *ts) { @@ -765,12 +748,28 @@ static s8 gtp_enter_sleep(struct goodix_ts_data *ts) (u8)GTP_REG_SLEEP, 5}; ret = gpio_direction_output(ts->pdata->irq_gpio, 0); + if (ret) + dev_err(&ts->client->dev, + "GTP sleep: Cannot reconfig gpio %d.\n", + ts->pdata->irq_gpio); + if (ts->pdata->enable_power_off) { + ret = gpio_direction_output(ts->pdata->reset_gpio, 0); + if (ret) + dev_err(&ts->client->dev, + "GTP sleep: Cannot reconfig gpio %d.\n", + ts->pdata->reset_gpio); + ret = goodix_power_off(ts); + if (ret) { + dev_err(&ts->client->dev, "GTP power off failed.\n"); + return 0; + } + return 1; + } usleep(5000); while (retry++ < GTP_I2C_RETRY_5) { ret = gtp_i2c_write(ts->client, i2c_control_buf, 3); - if (ret > 0) { - dev_dbg(&ts->client->dev, - "GTP enter sleep!"); + if (ret == 1) { + dev_dbg(&ts->client->dev, "GTP enter sleep!"); return ret; } msleep(20); @@ -778,7 +777,7 @@ static s8 gtp_enter_sleep(struct goodix_ts_data *ts) dev_err(&ts->client->dev, "GTP send sleep cmd failed.\n"); return ret; } -#endif +#endif /* !GTP_SLIDE_WAKEUP */ /******************************************************* Function: @@ -794,17 +793,36 @@ static s8 gtp_wakeup_sleep(struct goodix_ts_data *ts) u8 retry = 0; s8 ret = -1; -#if GTP_POWER_CTRL_SLEEP - gtp_reset_guitar(ts, 20); + if (ts->pdata->enable_power_off) { + ret = gpio_direction_output(ts->pdata->irq_gpio, 0); + if (ret) + dev_err(&ts->client->dev, + "GTP wakeup: Cannot reconfig gpio %d.\n", + ts->pdata->irq_gpio); + ret = gpio_direction_output(ts->pdata->reset_gpio, 0); + if (ret) + dev_err(&ts->client->dev, + "GTP wakeup: Cannot reconfig gpio %d.\n", + ts->pdata->reset_gpio); + ret = goodix_power_on(ts); + if (ret) { + dev_err(&ts->client->dev, "GTP power on failed.\n"); + return 0; + } + + gtp_reset_guitar(ts, 20); + + ret = gtp_send_cfg(ts); + if (ret <= 0) { + dev_err(&ts->client->dev, + "GTP wakeup sleep failed.\n"); + return ret; + } - ret = gtp_send_cfg(ts); - if (ret > 0) { dev_dbg(&ts->client->dev, - "Wakeup sleep send config success."); - return 1; - } -#else - while (retry++ < GTP_I2C_RETRY_10) { + "Wakeup sleep send config success."); + } else { +err_retry: #if GTP_SLIDE_WAKEUP /* wakeup not by slide */ if (doze_status != DOZE_WAKEUP) @@ -821,7 +839,7 @@ static s8 gtp_wakeup_sleep(struct goodix_ts_data *ts) } #endif ret = gtp_i2c_test(ts->client); - if (ret > 0) { + if (ret == 2) { dev_dbg(&ts->client->dev, "GTP wakeup sleep."); #if (!GTP_SLIDE_WAKEUP) if (chip_gt9xxs == 0) { @@ -835,10 +853,10 @@ static s8 gtp_wakeup_sleep(struct goodix_ts_data *ts) return ret; } gtp_reset_guitar(ts, 20); + if (retry++ < GTP_I2C_RETRY_10) + goto err_retry; + dev_err(&ts->client->dev, "GTP wakeup sleep failed.\n"); } -#endif - - dev_err(&ts->client->dev, "GTP wakeup sleep failed.\n"); return ret; } #endif /* !CONFIG_HAS_EARLYSUSPEND && !CONFIG_FB*/ @@ -1051,9 +1069,7 @@ static int gtp_check_product_id(struct i2c_client *client) dev_info(&client->dev, "Goodix Product ID = %s\n", product_id); - if (!IS_ERR(ts->pdata->product_id)) - ret = strcmp(product_id, ts->pdata->product_id); - + ret = strcmp(product_id, ts->pdata->product_id); if (ret != 0) return -EINVAL; @@ -1232,12 +1248,11 @@ static int gtp_request_input_dev(struct goodix_ts_data *ts) /* in case of "out of memory" */ input_mt_init_slots(ts->input_dev, 10, 0); -#if GTP_HAVE_TOUCH_KEY - for (index = 0; index < ARRAY_SIZE(touch_key_array); index++) { + for (index = 0; index < ts->pdata->num_button; index++) { input_set_capability(ts->input_dev, - EV_KEY, touch_key_array[index]); + EV_KEY, ts->pdata->button_map[index]); } -#endif + #if GTP_SLIDE_WAKEUP input_set_capability(ts->input_dev, EV_KEY, KEY_POWER); @@ -1305,6 +1320,12 @@ static int goodix_power_on(struct goodix_ts_data *ts) { int ret; + if (ts->power_on) { + dev_info(&ts->client->dev, + "Device already power on\n"); + return 0; + } + if (!IS_ERR(ts->avdd)) { ret = reg_set_optimum_mode_check(ts->avdd, GOODIX_VDD_LOAD_MAX_UA); @@ -1371,6 +1392,7 @@ static int goodix_power_on(struct goodix_ts_data *ts) } } + ts->power_on = true; return 0; err_enable_vcc_i2c: @@ -1389,6 +1411,7 @@ err_set_vtg_vdd: regulator_disable(ts->avdd); err_enable_avdd: err_set_opt_avdd: + ts->power_on = false; return ret; } @@ -1402,6 +1425,12 @@ static int goodix_power_off(struct goodix_ts_data *ts) { int ret; + if (!ts->power_on) { + dev_info(&ts->client->dev, + "Device already power off\n"); + return 0; + } + if (!IS_ERR(ts->vcc_i2c)) { ret = regulator_set_voltage(ts->vcc_i2c, 0, GOODIX_I2C_VTG_MAX_UV); @@ -1434,6 +1463,7 @@ static int goodix_power_off(struct goodix_ts_data *ts) "Regulator avdd disable failed ret=%d\n", ret); } + ts->power_on = false; return 0; } @@ -1486,6 +1516,50 @@ static int goodix_power_deinit(struct goodix_ts_data *ts) return 0; } +static ssize_t gtp_fw_name_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct goodix_ts_data *ts = dev_get_drvdata(dev); + + if (!strlen(ts->fw_name)) + return snprintf(buf, GTP_FW_NAME_MAXSIZE - 1, + "No fw name has been given."); + else + return snprintf(buf, GTP_FW_NAME_MAXSIZE - 1, + "%s\n", ts->fw_name); +} + +static ssize_t gtp_fw_name_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct goodix_ts_data *ts = dev_get_drvdata(dev); + + if (size > GTP_FW_NAME_MAXSIZE - 1) { + dev_err(dev, "FW name size exceeds the limit."); + return -EINVAL; + } + + strlcpy(ts->fw_name, buf, size); + if (ts->fw_name[size-1] == '\n') + ts->fw_name[size-1] = '\0'; + + return size; +} + +static DEVICE_ATTR(fw_name, (S_IRUGO | S_IWUSR | S_IWGRP), + gtp_fw_name_show, + gtp_fw_name_store); + +static struct attribute *gtp_attrs[] = { + &dev_attr_fw_name.attr, + NULL +}; + +static const struct attribute_group gtp_attr_grp = { + .attrs = gtp_attrs, +}; + static int goodix_ts_get_dt_coords(struct device *dev, char *name, struct goodix_ts_platform_data *pdata) { @@ -1549,6 +1623,9 @@ static int goodix_parse_dt(struct device *dev, pdata->no_force_update = of_property_read_bool(np, "goodix,no-force-update"); + + pdata->enable_power_off = of_property_read_bool(np, + "goodix,enable-power-off"); /* reset, irq gpio info */ pdata->reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &pdata->reset_gpio_flags); @@ -1562,8 +1639,17 @@ static int goodix_parse_dt(struct device *dev, rc = of_property_read_string(np, "goodix,product-id", &pdata->product_id); - if (rc < 0 || strlen(pdata->product_id) > GTP_PRODUCT_ID_MAXSIZE) - return rc; + if (rc && (rc != -EINVAL)) { + dev_err(dev, "Failed to parse product_id."); + return -EINVAL; + } + + rc = of_property_read_string(np, "goodix,fw_name", + &pdata->fw_name); + if (rc && (rc != -EINVAL)) { + dev_err(dev, "Failed to parse firmware name.\n"); + return -EINVAL; + } prop = of_find_property(np, "goodix,button-map", NULL); if (prop) { @@ -1578,6 +1664,9 @@ static int goodix_parse_dt(struct device *dev, dev_err(dev, "Unable to read key codes\n"); return rc; } + pdata->num_button = num_buttons; + memcpy(pdata->button_map, button_map, + pdata->num_button * sizeof(u32)); } read_cfg_num = 0; @@ -1670,6 +1759,7 @@ static int goodix_ts_probe(struct i2c_client *client, spin_lock_init(&ts->irq_lock); i2c_set_clientdata(client, ts); ts->gtp_rawdiff_mode = 0; + ts->power_on = false; ret = gtp_request_io_port(ts); if (ret) { @@ -1697,12 +1787,16 @@ static int goodix_ts_probe(struct i2c_client *client, goto exit_power_off; } + if (pdata->fw_name) + strlcpy(ts->fw_name, pdata->fw_name, + strlen(pdata->fw_name) + 1); + #if GTP_AUTO_UPDATE ret = gup_init_update_proc(ts); if (ret < 0) { dev_err(&client->dev, "GTP Create firmware update thread error.\n"); - goto exit_free_io_port; + goto exit_power_off; } #endif @@ -1719,7 +1813,9 @@ static int goodix_ts_probe(struct i2c_client *client, dev_err(&client->dev, "GTP request input dev failed.\n"); goto exit_free_inputdev; } + input_set_drvdata(ts->input_dev, ts); + mutex_init(&ts->lock); #if defined(CONFIG_FB) ts->fb_notif.notifier_call = fb_notifier_callback; ret = fb_register_client(&ts->fb_notif); @@ -1762,9 +1858,16 @@ static int goodix_ts_probe(struct i2c_client *client, #if GTP_ESD_PROTECT gtp_esd_switch(client, SWITCH_ON); #endif + ret = sysfs_create_group(&client->dev.kobj, >p_attr_grp); + if (ret < 0) { + dev_err(&client->dev, "sys file creation failed.\n"); + goto exit_free_irq; + } + init_done = true; return 0; exit_free_irq: + mutex_destroy(&ts->lock); #if defined(CONFIG_FB) if (fb_unregister_client(&ts->fb_notif)) dev_err(&client->dev, @@ -1813,6 +1916,8 @@ static int goodix_ts_remove(struct i2c_client *client) { struct goodix_ts_data *ts = i2c_get_clientdata(client); + sysfs_remove_group(&ts->input_dev->dev.kobj, >p_attr_grp); + #if defined(CONFIG_FB) if (fb_unregister_client(&ts->fb_notif)) dev_err(&client->dev, @@ -1820,6 +1925,7 @@ static int goodix_ts_remove(struct i2c_client *client) #elif defined(CONFIG_HAS_EARLYSUSPEND) unregister_early_suspend(&ts->early_suspend); #endif + mutex_destroy(&ts->lock); #if GTP_CREATE_WR_NODE uninit_wr_node(); @@ -1869,10 +1975,12 @@ Input: Output: None. *******************************************************/ -static void goodix_ts_suspend(struct goodix_ts_data *ts) +static int goodix_ts_suspend(struct device *dev) { - int ret = -1, i; + struct goodix_ts_data *ts = dev_get_drvdata(dev); + int ret = 0, i; + mutex_lock(&ts->lock); #if GTP_ESD_PROTECT ts->gtp_is_suspend = 1; gtp_esd_switch(ts->client, SWITCH_OFF); @@ -1893,12 +2001,15 @@ static void goodix_ts_suspend(struct goodix_ts_data *ts) ret = gtp_enter_sleep(ts); #endif - if (ret < 0) + if (ret <= 0) dev_err(&ts->client->dev, "GTP early suspend failed.\n"); /* to avoid waking up while not sleeping, * delay 48 + 10ms to ensure reliability */ msleep(58); + mutex_unlock(&ts->lock); + + return ret; } /******************************************************* @@ -1909,17 +2020,19 @@ Input: Output: None. *******************************************************/ -static void goodix_ts_resume(struct goodix_ts_data *ts) +static int goodix_ts_resume(struct device *dev) { - int ret = -1; + struct goodix_ts_data *ts = dev_get_drvdata(dev); + int ret = 0; + mutex_lock(&ts->lock); ret = gtp_wakeup_sleep(ts); #if GTP_SLIDE_WAKEUP doze_status = DOZE_DISABLED; #endif - if (ret < 0) + if (ret <= 0) dev_err(&ts->client->dev, "GTP resume failed.\n"); if (ts->use_irq) @@ -1932,6 +2045,9 @@ static void goodix_ts_resume(struct goodix_ts_data *ts) ts->gtp_is_suspend = 0; gtp_esd_switch(ts->client, SWITCH_ON); #endif + mutex_unlock(&ts->lock); + + return ret; } #if defined(CONFIG_FB) @@ -1947,9 +2063,9 @@ static int fb_notifier_callback(struct notifier_block *self, ts && ts->client) { blank = evdata->data; if (*blank == FB_BLANK_UNBLANK) - goodix_ts_resume(ts); + goodix_ts_resume(&ts->client->dev); else if (*blank == FB_BLANK_POWERDOWN) - goodix_ts_suspend(ts); + goodix_ts_suspend(&ts->client->dev); } return 0; @@ -1968,7 +2084,8 @@ static void goodix_ts_early_suspend(struct early_suspend *h) struct goodix_ts_data *ts; ts = container_of(h, struct goodix_ts_data, early_suspend); - goodix_ts_suspend(ts); + goodix_ts_suspend(&ts->client->dev); + return; } /* @@ -2119,6 +2236,9 @@ static void gtp_esd_check_func(struct work_struct *work) } #endif +static SIMPLE_DEV_PM_OPS(goodix_ts_dev_pm_ops, goodix_ts_suspend, + goodix_ts_resume); + static const struct i2c_device_id goodix_ts_id[] = { { GTP_I2C_NAME, 0 }, { } @@ -2141,6 +2261,9 @@ static struct i2c_driver goodix_ts_driver = { .name = GTP_I2C_NAME, .owner = THIS_MODULE, .of_match_table = goodix_match_table, +#if CONFIG_PM + .pm = &goodix_ts_dev_pm_ops, +#endif }, }; @@ -2177,7 +2300,7 @@ static void __exit goodix_ts_exit(void) i2c_del_driver(&goodix_ts_driver); } -late_initcall(goodix_ts_init); +module_init(goodix_ts_init); module_exit(goodix_ts_exit); MODULE_DESCRIPTION("GTP Series Driver"); diff --git a/drivers/input/touchscreen/gt9xx/gt9xx.h b/drivers/input/touchscreen/gt9xx/gt9xx.h index 843e3d6c05b2..56e561ab3925 100644 --- a/drivers/input/touchscreen/gt9xx/gt9xx.h +++ b/drivers/input/touchscreen/gt9xx/gt9xx.h @@ -33,6 +33,7 @@ #include <linux/regulator/consumer.h> #include <linux/firmware.h> #include <linux/debugfs.h> +#include <linux/mutex.h> #if defined(CONFIG_FB) #include <linux/notifier.h> @@ -42,13 +43,17 @@ #define GOODIX_SUSPEND_LEVEL 1 #endif +#define MAX_BUTTONS 4 #define GOODIX_MAX_CFG_GROUP 6 +#define GTP_FW_NAME_MAXSIZE 50 + struct goodix_ts_platform_data { int irq_gpio; u32 irq_gpio_flags; int reset_gpio; u32 reset_gpio_flags; const char *product_id; + const char *fw_name; u32 x_max; u32 y_max; u32 x_min; @@ -59,8 +64,11 @@ struct goodix_ts_platform_data { u32 panel_maxy; bool no_force_update; bool i2c_pull_up; + bool enable_power_off; size_t config_data_len[GOODIX_MAX_CFG_GROUP]; u8 *config_data[GOODIX_MAX_CFG_GROUP]; + u32 button_map[MAX_BUTTONS]; + u8 num_button; }; struct goodix_ts_data { spinlock_t irq_lock; @@ -70,6 +78,7 @@ struct goodix_ts_data { struct hrtimer timer; struct workqueue_struct *goodix_wq; struct work_struct work; + struct delayed_work goodix_update_work; s32 irq_is_disabled; s32 use_irq; u16 abs_x_max; @@ -86,6 +95,8 @@ struct goodix_ts_data { u8 fixed_cfg; u8 esd_running; u8 fw_error; + bool power_on; + struct mutex lock; struct regulator *avdd; struct regulator *vdd; struct regulator *vcc_i2c; @@ -104,7 +115,6 @@ extern u16 total_len; #define GTP_CHANGE_X2Y 0 #define GTP_DRIVER_SEND_CFG 1 #define GTP_HAVE_TOUCH_KEY 1 -#define GTP_POWER_CTRL_SLEEP 0 /* auto updated by .bin file as default */ #define GTP_AUTO_UPDATE 0 @@ -117,14 +127,11 @@ extern u16 total_len; #define GTP_ESD_PROTECT 0 #define GTP_WITH_PEN 0 +/* This cannot work when enable-power-off is on */ #define GTP_SLIDE_WAKEUP 0 /* double-click wakeup, function together with GTP_SLIDE_WAKEUP */ #define GTP_DBL_CLK_WAKEUP 0 -#define GTP_DEBUG_ON 0 -#define GTP_DEBUG_ARRAY_ON 0 -#define GTP_DEBUG_FUNC_ON 0 - /*************************** PART2:TODO define *******************************/ /* STEP_1(REQUIRED): Define Configuration Information Group(s) */ /* Sensor_ID Map: */ @@ -190,39 +197,6 @@ extern u16 total_len; #define RESOLUTION_LOC 3 #define TRIGGER_LOC 8 -/* Log define */ -#define GTP_DEBUG(fmt, arg...) do {\ - if (GTP_DEBUG_ON) {\ - pr_debug("<<-GTP-DEBUG->> [%d]"fmt"\n",\ - __LINE__, ##arg); } \ - } while (0) - -#define GTP_DEBUG_ARRAY(array, num) do {\ - s32 i; \ - u8 *a = array; \ - if (GTP_DEBUG_ARRAY_ON) {\ - pr_debug("<<-GTP-DEBUG-ARRAY->>\n");\ - for (i = 0; i < (num); i++) { \ - pr_debug("%02x ", (a)[i]);\ - if ((i + 1) % 10 == 0) { \ - pr_debug("\n");\ - } \ - } \ - pr_debug("\n");\ - } \ - } while (0) - -#define GTP_DEBUG_FUNC() do {\ - if (GTP_DEBUG_FUNC_ON)\ - pr_debug("<<-GTP-FUNC->> Func:%s@Line:%d\n",\ - __func__, __LINE__);\ - } while (0) - -#define GTP_SWAP(x, y) do {\ - typeof(x) z = x;\ - x = y;\ - y = z;\ - } while (0) /*****************************End of Part III********************************/ void gtp_esd_switch(struct i2c_client *client, int on); diff --git a/drivers/input/touchscreen/gt9xx/gt9xx_update.c b/drivers/input/touchscreen/gt9xx/gt9xx_update.c index 9fcf7f0bef86..c991bfd3ffdf 100644 --- a/drivers/input/touchscreen/gt9xx/gt9xx_update.c +++ b/drivers/input/touchscreen/gt9xx/gt9xx_update.c @@ -31,7 +31,6 @@ * 2. support firmware header array update. * By Meta, 2013/03/11 */ -#include <linux/kthread.h> #include "gt9xx.h" #if GTP_HEADER_FW_UPDATE @@ -126,8 +125,6 @@ s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len) }, }; - GTP_DEBUG_FUNC(); - while (retries < 5) { ret = i2c_transfer(client->adapter, msgs, 2); if (ret == 2) @@ -166,8 +163,6 @@ s32 gup_i2c_write(struct i2c_client *client, u8 *buf, s32 len) .buf = buf, }; - GTP_DEBUG_FUNC(); - while (retries < 5) { ret = i2c_transfer(client->adapter, &msg, 1); if (ret == 1) @@ -215,25 +210,23 @@ static s32 gup_init_panel(struct goodix_ts_data *ts) &sensor_id, 1); if (ret == SUCCESS) { if (sensor_id >= 0x06) { - GTP_ERROR( - "Invalid sensor_id(0x%02X), No Config Sent!", - sensor_id); + pr_err("Invalid sensor_id(0x%02X), No Config Sent!\n", + sensor_id); return -EINVAL; } } else { - GTP_ERROR("Failed to get sensor_id, No config sent!"); + pr_err("Failed to get sensor_id, No config sent!\n"); return -EINVAL; } } - GTP_DEBUG("Sensor_ID: %d", sensor_id); + pr_debug("Sensor_ID: %d\n", sensor_id); ts->gtp_cfg_len = cfg_info_len[sensor_id]; if (ts->gtp_cfg_len < GTP_CONFIG_MIN_LENGTH) { - GTP_ERROR("Sensor_ID(%d) matches with NULL or INVALID CONFIG", - " GROUP! NO Config Sent! You need to check you header", - " file CFG_GROUP section!", sensor_id); + pr_err("Sensor_ID(%d) matches with NULL or INVALID CONFIG GROUP! NO Config Sent! You need to check you header file CFG_GROUP section!\n", + sensor_id); return -EINVAL; } @@ -241,8 +234,8 @@ static s32 gup_init_panel(struct goodix_ts_data *ts) &opr_buf[0], 1); if (ret == SUCCESS) { - GTP_DEBUG("CFG_GROUP%d Config Version: %d, IC Config Version:", - " %d", sensor_id+1, send_cfg_buf[sensor_id][0], opr_buf[0]); + pr_debug("CFG_GROUP%d Config Version: %d, IC Config Version: %d\n", + sensor_id+1, send_cfg_buf[sensor_id][0], opr_buf[0]); send_cfg_buf[sensor_id][0] = opr_buf[0]; ts->fixed_cfg = 0; @@ -253,13 +246,11 @@ static s32 gup_init_panel(struct goodix_ts_data *ts) * send_cfg_buf[sensor_id][0] = 0x00; * ts->fixed_cfg = 0; * } else { *** treated as fixed config, not send config *** - * GTP_INFO("Ic fixed config with config version(%d)", + * pr_info("Ic fixed config with config version(%d)", * opr_buf[0]); * ts->fixed_cfg = 1; * } */ - } else { - GTP_ERROR("Failed to get ic config version!No config sent!"); return -EINVAL; } @@ -267,7 +258,7 @@ static s32 gup_init_panel(struct goodix_ts_data *ts) memcpy(&config[GTP_ADDR_LENGTH], send_cfg_buf[sensor_id], ts->gtp_cfg_len); - GTP_DEBUG("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x", + pr_debug("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x\n", ts->abs_x_max, ts->abs_y_max, ts->int_trigger_type); config[RESOLUTION_LOC] = (u8)GTP_MAX_WIDTH; @@ -286,10 +277,9 @@ static s32 gup_init_panel(struct goodix_ts_data *ts) config[ts->gtp_cfg_len] = (~check_sum) + 1; - GTP_DEBUG_FUNC(); ret = gtp_send_cfg(ts->client); if (ret < 0) - GTP_ERROR("Send config error."); + pr_err("Send config error.\n"); msleep(20); return 0; @@ -308,7 +298,7 @@ static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8 *msg, s32 len) break; if (i >= 5) { - GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]); + pr_err("Read data from 0x%02x%02x failed!\n", msg[0], msg[1]); return FAIL; } @@ -329,7 +319,7 @@ static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val) break; if (i >= 5) { - GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]); + pr_err("Set data to 0x%02x%02x failed!\n", msg[0], msg[1]); return FAIL; } @@ -347,7 +337,7 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client) ret = gtp_i2c_read_dbl_check(client, GUP_REG_HW_INFO, &buf[GTP_ADDR_LENGTH], 4); if (ret == FAIL) { - GTP_ERROR("[get_ic_fw_msg]get hw_info failed,exit"); + pr_err("[get_ic_fw_msg]get hw_info failed,exit\n"); return FAIL; } @@ -356,7 +346,7 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client) for (i = 0; i < 4; i++) update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i]; - GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x", + pr_debug("IC Hardware info:%02x%02x%02x%02x\n", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1], update_msg.ic_fw_msg.hw_info[2], @@ -366,31 +356,31 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client) for (retry = 0; retry < 2; retry++) { ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1); if (ret == FAIL) { - GTP_ERROR("Read firmware message fail."); + pr_err("Read firmware message fail.\n"); return ret; } update_msg.force_update = buf[GTP_ADDR_LENGTH]; if ((update_msg.force_update != 0xBE) && (!retry)) { - GTP_INFO("The check sum in ic is error."); - GTP_INFO("The IC will be updated by force."); + pr_info("The check sum in ic is error.\n"); + pr_info("The IC will be updated by force.\n"); continue; } break; } - GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update); + pr_debug("IC force update flag:0x%x\n", update_msg.force_update); /* step3:get pid & vid */ ret = gtp_i2c_read_dbl_check(client, GUP_REG_PID_VID, &buf[GTP_ADDR_LENGTH], 6); if (ret == FAIL) { - GTP_ERROR("[get_ic_fw_msg]get pid & vid failed,exit"); + pr_err("[get_ic_fw_msg]get pid & vid failed,exit\n"); return FAIL; } memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid)); memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4); - GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid); + pr_debug("IC Product id:%s\n", update_msg.ic_fw_msg.pid); /* GT9XX PID MAPPING * |-----FLASH-----RAM-----| @@ -405,7 +395,7 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client) */ if (update_msg.ic_fw_msg.pid[0] != 0) { if (!memcmp(update_msg.ic_fw_msg.pid, "9111", 4)) { - GTP_DEBUG("IC Mapping Product id:%s", + pr_debug("IC Mapping Product id:%s\n", update_msg.ic_fw_msg.pid); memcpy(update_msg.ic_fw_msg.pid, "9110P", 5); } @@ -413,7 +403,7 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client) update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH + 4] + (buf[GTP_ADDR_LENGTH + 5] << 8); - GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid); + pr_debug("IC version id:%04x\n", update_msg.ic_fw_msg.vid); return SUCCESS; } @@ -441,25 +431,25 @@ s32 gup_enter_update_mode(struct i2c_client *client) /* step4:Hold ss51 & dsp */ ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); if (ret <= 0) { - GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + pr_debug("Hold ss51 & dsp I2C error,retry:%d\n", retry); continue; } /* step5:Confirm hold */ ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1); if (ret <= 0) { - GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry); + pr_debug("Hold ss51 & dsp I2C error,retry:%d\n", retry); continue; } if (rd_buf[GTP_ADDR_LENGTH] == 0x0C) { - GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS"); + pr_debug("Hold ss51 & dsp confirm SUCCESS\n"); break; } - GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", + pr_debug("Hold ss51 & dsp confirm 0x4180 failed,value:%d\n", rd_buf[GTP_ADDR_LENGTH]); } if (retry >= 200) { - GTP_ERROR("Enter update Hold ss51 failed."); + pr_err("Enter update Hold ss51 failed.\n"); return FAIL; } @@ -474,7 +464,7 @@ void gup_leave_update_mode(void) { GTP_GPIO_AS_INT(GTP_INT_PORT); - GTP_DEBUG("[leave_update_mode]reset chip."); + pr_debug("[leave_update_mode]reset chip.\n"); gtp_reset_guitar(i2c_connect_client, 20); } @@ -504,38 +494,37 @@ static u8 gup_enter_update_judge(st_fw_head *fw_head) u16_tmp = fw_head->vid; fw_head->vid = (u16)(u16_tmp>>8) + (u16)(u16_tmp<<8); - GTP_DEBUG("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0], + pr_debug("FILE HARDWARE INFO:%02x%02x%02x%02x\n", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]); - TP_DEBUG("FILE PID:%s", fw_head->pid); - TP_DEBUG("FILE VID:%04x", fw_head->vid); + pr_debug("FILE PID:%s\n", fw_head->pid); + pr_debug("FILE VID:%04x\n", fw_head->vid); - TP_DEBUG("IC HARDWARE INFO:%02x%02x%02x%02x", + pr_debug("IC HARDWARE INFO:%02x%02x%02x%02x\n", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1], update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]); - TP_DEBUG("IC PID:%s", update_msg.ic_fw_msg.pid); - TP_DEBUG("IC VID:%04x", update_msg.ic_fw_msg.vid); + pr_debug("IC PID:%s\n", update_msg.ic_fw_msg.pid); + pr_debug("IC VID:%04x\n", update_msg.ic_fw_msg.vid); /* First two conditions */ if (!memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info, sizeof(update_msg.ic_fw_msg.hw_info))) { - GTP_DEBUG("Get the same hardware info."); + pr_debug("Get the same hardware info.\n"); if (update_msg.force_update != 0xBE) { - GTP_INFO("FW chksum error,need enter update."); + pr_info("FW chksum error,need enter update.\n"); return SUCCESS; } /* 20130523 start */ if (strlen(update_msg.ic_fw_msg.pid) < 3) { - GTP_INFO("Illegal IC pid, need enter update"); + pr_info("Illegal IC pid, need enter update\n"); return SUCCESS; } for (i = 0; i < 3; i++) { if ((update_msg.ic_fw_msg.pid[i] < 0x30) || (update_msg.ic_fw_msg.pid[i] > 0x39)) { - GTP_INFO("Illegal IC pid, out of ", - "bound, need enter update"); + pr_info("Illegal IC pid, out of bound, need enter update\n"); return SUCCESS; } } @@ -546,22 +535,22 @@ static u8 gup_enter_update_judge(st_fw_head *fw_head) (!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4)) || (!memcmp(fw_head->pid, "91XX", 4))) { if (!memcmp(fw_head->pid, "91XX", 4)) - GTP_DEBUG("Force none same pid update mode."); + pr_debug("Force none same pid update mode.\n"); else - GTP_DEBUG("Get the same pid."); + pr_debug("Get the same pid.\n"); /* The third condition */ if (fw_head->vid > update_msg.ic_fw_msg.vid) { - GTP_INFO("Need enter update."); + pr_info("Need enter update."); return SUCCESS; } - GTP_ERROR("Don't meet the third condition."); - GTP_ERROR("File VID <= Ic VID, update aborted!"); + pr_err("Don't meet the third condition.\n"); + pr_err("File VID <= Ic VID, update aborted!\n"); } else { - GTP_ERROR("File PID != Ic PID, update aborted!"); + pr_err("File PID != Ic PID, update aborted!\n"); } } else { - GTP_ERROR("Different Hardware, update aborted!"); + pr_err("Different Hardware, update aborted!\n"); } return FAIL; @@ -598,7 +587,7 @@ static s8 gup_update_config(struct i2c_client *client) u8 pid[8]; if (update_msg.cfg_file == NULL) { - GTP_ERROR("[update_cfg]No need to upgrade config!"); + pr_err("[update_cfg]No need to upgrade config!\n"); return FAIL; } file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, @@ -606,11 +595,11 @@ static s8 gup_update_config(struct i2c_client *client) ret = gup_get_ic_msg(client, GUP_REG_PID_VID, pid, 6); if (ret == FAIL) { - GTP_ERROR("[update_cfg]Read product id & version id fail."); + pr_err("[update_cfg]Read product id & version id fail.\n"); return FAIL; } pid[5] = '\0'; - GTP_DEBUG("update cfg get pid:%s", &pid[GTP_ADDR_LENGTH]); + pr_debug("update cfg get pid:%s\n", &pid[GTP_ADDR_LENGTH]); chip_cfg_len = 186; if (!memcmp(&pid[GTP_ADDR_LENGTH], "968", 3) || @@ -618,10 +607,10 @@ static s8 gup_update_config(struct i2c_client *client) !memcmp(&pid[GTP_ADDR_LENGTH], "960", 3)) { chip_cfg_len = 228; } - GTP_DEBUG("[update_cfg]config file len:%d", file_len); - GTP_DEBUG("[update_cfg]need config len:%d", chip_cfg_len); + pr_debug("[update_cfg]config file len:%d\n", file_len); + pr_debug("[update_cfg]need config len:%d\n", chip_cfg_len); if ((file_len+5) < chip_cfg_len*5) { - GTP_ERROR("Config length error"); + pr_err("Config length error"); return -EINVAL; } @@ -640,15 +629,15 @@ static s8 gup_update_config(struct i2c_client *client) update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET); - GTP_DEBUG("[update_cfg]Read config from file."); + pr_debug("[update_cfg]Read config from file.\n"); ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file, (char *)pre_buf, file_len, &update_msg.cfg_file->f_pos); if (ret < 0) { - GTP_ERROR("[update_cfg]Read config file failed."); + pr_err("[update_cfg]Read config file failed.\n"); return ret; } - GTP_DEBUG("[update_cfg]Delete illegal character."); + pr_debug("[update_cfg]Delete illegal character.\n"); for (i = 0, count = 0; i < file_len; i++) { if (pre_buf[i] == ' ' || pre_buf[i] == '\r' || pre_buf[i] == '\n') @@ -656,7 +645,7 @@ static s8 gup_update_config(struct i2c_client *client) buf[count++] = pre_buf[i]; } - GTP_DEBUG("[update_cfg]Ascii to hex."); + pr_debug("[update_cfg]Ascii to hex.\n"); file_config[0] = GTP_REG_CONFIG_DATA >> 8; file_config[1] = GTP_REG_CONFIG_DATA & 0xff; for (i = 0, file_cfg_len = GTP_ADDR_LENGTH; i < count; i + = 5) { @@ -669,13 +658,13 @@ static s8 gup_update_config(struct i2c_client *client) if ((high == 0xFF) || (low == 0xFF)) { ret = 0; - GTP_ERROR("[update_cfg]Illegal config file."); + pr_err("[update_cfg]Illegal config file.\n"); return ret; } file_config[file_cfg_len++] = (high<<4) + low; } else { ret = 0; - GTP_ERROR("[update_cfg]Illegal config file."); + pr_err("[update_cfg]Illegal config file.\n"); return ret; } } @@ -687,17 +676,14 @@ static s8 gup_update_config(struct i2c_client *client) * file_config[chip_cfg_len+1] = 0x01; */ - GTP_DEBUG("config:"); - GTP_DEBUG_ARRAY(file_config+2, file_cfg_len); - i = 0; while (i++ < 5) { ret = gup_i2c_write(client, file_config, file_cfg_len); if (ret > 0) { - GTP_INFO("[update_cfg]Send config SUCCESS."); + pr_info("[update_cfg]Send config SUCCESS.\n"); break; } - GTP_ERROR("[update_cfg]Send config i2c error."); + pr_err("[update_cfg]Send config i2c error.\n"); } return ret; @@ -713,13 +699,13 @@ static u8 gup_check_fs_mounted(char *path_name) err = kern_path("/", LOOKUP_FOLLOW, &root_path); if (err) { - GTP_DEBUG("\"/\" NOT Mounted: %d", err); + pr_debug("\"/\" NOT Mounted: %d\n", err); return FAIL; } err = kern_path(path_name, LOOKUP_FOLLOW, &path); if (err) { - GTP_DEBUG("/data/ NOT Mounted: %d", err); + pr_debug("/data/ NOT Mounted: %d\n", err); return FAIL; } @@ -742,26 +728,26 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, u8 buf[FW_HEAD_LENGTH]; if (path) { - GTP_DEBUG("Update File path:%s, %d", path, strlen(path)); + pr_debug("Update File path:%s, %d\n", path, strlen(path)); update_msg.file = file_open(path, O_RDONLY, 0); if (IS_ERR(update_msg.file)) { - GTP_ERROR("Open update file(%s) error!", path); + pr_err("Open update file(%s) error!\n", path); return FAIL; } } else { #if GTP_HEADER_FW_UPDATE for (i = 0; i < (GUP_SEARCH_FILE_TIMES); i++) { - GTP_DEBUG("Waiting for /data mounted [%d]", i); + pr_debug("Waiting for /data mounted [%d]\n", i); if (gup_check_fs_mounted("/data") == SUCCESS) { - GTP_DEBUG("/data Mounted!"); + pr_debug("/data Mounted!\n"); break; } msleep(3000); } if (i >= (GUP_SEARCH_FILE_TIMES)) { - GTP_ERROR("Wait for /data mounted timeout!"); + pr_err("Wait for /data mounted timeout!\n"); return FAIL; } @@ -770,25 +756,24 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, O_RDONLY, 0); if (IS_ERR(update_msg.cfg_file)) { - GTP_DEBUG("%s is unavailable", CONFIG_FILE_PATH_1); + pr_debug("%s is unavailable\n", CONFIG_FILE_PATH_1); } else { - GTP_INFO("Update Config File: %s", CONFIG_FILE_PATH_1); + pr_info("Update Config File: %s\n", CONFIG_FILE_PATH_1); ret = gup_update_config(client); if (ret <= 0) - GTP_ERROR("Update config failed."); + pr_err("Update config failed.\n"); filp_close(update_msg.cfg_file, NULL); } if (sizeof(header_fw_array) < (FW_HEAD_LENGTH+FW_SECTION_LENGTH *4 + FW_DSP_ISP_LENGTH+FW_DSP_LENGTH + FW_BOOT_LENGTH)) { - GTP_ERROR("INVALID header_fw_array, check your ", - "gt9xx_firmware.h file!"); + pr_err("INVALID header_fw_array, check your gt9xx_firmware.h file!\n"); return FAIL; } update_msg.file = file_open(UPDATE_FILE_PATH_2, O_CREAT | O_RDWR, 0666); if ((IS_ERR(update_msg.file))) { - GTP_ERROR("Failed to Create file: %s for fw_header!", + pr_err("Failed to Create file: %s for fw_header!\n", UPDATE_FILE_PATH_2); return FAIL; } @@ -819,8 +804,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, searching_file = 1; for (i = 0; i < GUP_SEARCH_FILE_TIMES; i++) { if (searching_file == 0) { - GTP_INFO(".bin/.cfg update file search ", - "forcely terminated!"); + pr_info(".bin/.cfg update file search forcely terminated!\n"); return FAIL; } if (i % 2) { @@ -839,7 +823,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, update_msg.file = file_open(search_update_path, O_RDONLY, 0); if (!IS_ERR(update_msg.file)) { - GTP_DEBUG("Find the bin file"); + pr_debug("Find the bin file\n"); got_file_flag |= 0x0F; } } @@ -847,7 +831,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, update_msg.cfg_file = file_open(search_cfg_path, O_RDONLY, 0); if (!IS_ERR(update_msg.cfg_file)) { - GTP_DEBUG("Find the cfg file"); + pr_debug("Find the cfg file\n"); got_file_flag |= 0xF0; } } @@ -857,7 +841,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, break; i += 4; } - GTP_DEBUG("%3d:Searching %s %s file...", i, + pr_debug("%3d:Searching %s %s file...\n", i, (got_file_flag & 0x0F) ? "" : "bin", (got_file_flag & 0xF0) ? "" : "cfg"); @@ -867,22 +851,22 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, searching_file = 0; if (!got_file_flag) { - GTP_ERROR("Can't find update file."); + pr_err("Can't find update file.\n"); goto load_failed; } if (got_file_flag & 0xF0) { - GTP_DEBUG("Got the update config file."); + pr_debug("Got the update config file.\n"); ret = gup_update_config(client); if (ret <= 0) - GTP_ERROR("Update config failed."); + pr_err("Update config failed.\n"); filp_close(update_msg.cfg_file, NULL); msleep(500); /* waiting config to be stored in FLASH. */ } if (got_file_flag & 0x0F) { - GTP_DEBUG("Got the update firmware file."); + pr_debug("Got the update firmware file.\n"); } else { - GTP_ERROR("No need to upgrade firmware."); + pr_err("No need to upgrade firmware.\n"); goto load_failed; } #endif @@ -897,7 +881,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, ret = update_msg.file->f_op->read(update_msg.file, (char *)buf, FW_HEAD_LENGTH, &update_msg.file->f_pos); if (ret < 0) { - GTP_ERROR("Read firmware head in update file error."); + pr_err("Read firmware head in update file error.\n"); goto load_failed; } memcpy(fw_head, buf, FW_HEAD_LENGTH); @@ -911,17 +895,16 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, ret = update_msg.file->f_op->read(update_msg.file, (char *)buf, 2, &update_msg.file->f_pos); if (ret < 0) { - GTP_ERROR("Read firmware file error."); + pr_err("Read firmware file error.\n"); goto load_failed; } - /* GTP_DEBUG("BUF[0]:%x", buf[0]); */ temp = (buf[0]<<8) + buf[1]; fw_checksum += temp; } - GTP_DEBUG("firmware checksum:%x", fw_checksum&0xFFFF); + pr_debug("firmware checksum:%x\n", fw_checksum&0xFFFF); if (fw_checksum & 0xFFFF) { - GTP_ERROR("Illegal firmware file."); + pr_err("Illegal firmware file.\n"); goto load_failed; } @@ -964,10 +947,10 @@ static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH]; u8 retry = 0; - GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length/1024), + pr_debug("Begin burn %dk data to addr 0x%x\n", (total_length/1024), start_addr); while (burn_length < total_length) { - GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length); + pr_debug("B/T:%04d/%04d", burn_length, total_length); frame_length = ((total_length - burn_length) > PACK_SIZE) ? PACK_SIZE : (total_length - burn_length); wr_buf[0] = (u8)(burn_addr>>8); @@ -981,33 +964,26 @@ static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, ret = gup_i2c_write(client, wr_buf, GTP_ADDR_LENGTH + frame_length); if (ret <= 0) { - GTP_ERROR("Write frame data i2c error."); + pr_err("Write frame data i2c error.\n"); continue; } ret = gup_i2c_read(client, rd_buf, GTP_ADDR_LENGTH + frame_length); if (ret <= 0) { - GTP_ERROR("Read back frame data i2c error."); + pr_err("Read back frame data i2c error.\n"); continue; } if (memcmp(&wr_buf[GTP_ADDR_LENGTH], &rd_buf[GTP_ADDR_LENGTH], frame_length)) { - GTP_ERROR("Check frame data fail,not equal."); - GTP_DEBUG("write array:"); - GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH], - frame_length); - GTP_DEBUG("read array:"); - GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], - frame_length); + pr_err("Check frame data fail,not equal.\n"); continue; } else { - /* GTP_DEBUG("Check frame data success."); */ break; } } if (retry >= MAX_FRAME_CHECK_TIME) { - GTP_ERROR("Burn frame data time out,exit."); + pr_err("Burn frame data time out,exit.\n"); return FAIL; } burn_length += frame_length; @@ -1021,7 +997,7 @@ static u8 gup_load_section_file(u8 *buf, u16 offset, u16 length) s32 ret = 0; if (update_msg.file == NULL) { - GTP_ERROR("cannot find update file,load section file fail."); + pr_err("cannot find update file,load section file fail.\n"); return FAIL; } update_msg.file->f_pos = FW_HEAD_LENGTH + offset; @@ -1029,7 +1005,7 @@ static u8 gup_load_section_file(u8 *buf, u16 offset, u16 length) ret = update_msg.file->f_op->read(update_msg.file, (char *)buf, length, &update_msg.file->f_pos); if (ret < 0) { - GTP_ERROR("Read update file fail."); + pr_err("Read update file fail.\n"); return FAIL; } @@ -1050,24 +1026,20 @@ static u8 gup_recall_check(struct i2c_client *client, u8 *chk_src, ? PACK_SIZE : (chk_length - recall_length); ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length); if (ret <= 0) { - GTP_ERROR("recall i2c error,exit"); + pr_err("recall i2c error,exit\n"); return FAIL; } if (memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length], frame_length)) { - GTP_ERROR("Recall frame data fail,not equal."); - GTP_DEBUG("chk_src array:"); - GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length); - GTP_DEBUG("recall array:"); - GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length); + pr_err("Recall frame data fail,not equal.\n"); return FAIL; } recall_length += frame_length; recall_addr += frame_length; } - GTP_DEBUG("Recall check %dk firmware success.", (chk_length/1024)); + pr_debug("Recall check %dk firmware success.\n", (chk_length/1024)); return SUCCESS; } @@ -1081,14 +1053,14 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, /* step1:hold ss51 & dsp */ ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail."); + pr_err("[burn_fw_section]hold ss51 & dsp fail.\n"); return FAIL; } /* step2:set scramble */ ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]set scramble fail."); + pr_err("[burn_fw_section]set scramble fail.\n"); return FAIL; } @@ -1096,7 +1068,7 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]select bank %d fail.", + pr_err("[burn_fw_section]select bank %d fail.\n", (bank_cmd >> 4)&0x0F); return FAIL; } @@ -1104,21 +1076,21 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, /* step4:enable accessing code */ ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]enable accessing code fail."); + pr_err("[burn_fw_section]enable accessing code fail.\n"); return FAIL; } /* step5:burn 8k fw section */ ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_section]burn fw_section fail."); + pr_err("[burn_fw_section]burn fw_section fail.\n"); return FAIL; } /* step6:hold ss51 & release dsp */ ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail."); + pr_err("[burn_fw_section]hold ss51 & release dsp fail.\n"); return FAIL; } /* must delay */ @@ -1127,27 +1099,24 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, /* step7:send burn cmd to move data to flash from sram */ ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd&0x0f); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]send burn cmd fail."); + pr_err("[burn_fw_section]send burn cmd fail.\n"); return FAIL; } - GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......"); + pr_debug("[burn_fw_section]Wait for the burn is complete......\n"); do { ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]Get burn state fail"); + pr_err("[burn_fw_section]Get burn state fail\n"); return FAIL; } msleep(20); - /* GTP_DEBUG("[burn_fw_section]Get burn state:%d.", - * rd_buf[GTP_ADDR_LENGTH]); - */ } while (rd_buf[GTP_ADDR_LENGTH]); /* step8:select bank */ ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4)&0x0F); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]select bank %d fail.", + pr_err("[burn_fw_section]select bank %d fail.\n", (bank_cmd >> 4)&0x0F); return FAIL; } @@ -1155,7 +1124,7 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, /* step9:enable accessing code */ ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]enable accessing code fail."); + pr_err("[burn_fw_section]enable accessing code fail.\n"); return FAIL; } @@ -1163,14 +1132,14 @@ static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, ret = gup_recall_check(client, fw_section, start_addr, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_section]recall check 8k firmware fail."); + pr_err("[burn_fw_section]recall check 8k firmware fail.\n"); return FAIL; } /* step11:disable accessing code */ ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_fw_section]disable accessing code fail."); + pr_err("[burn_fw_section]disable accessing code fail.\n"); return FAIL; } @@ -1183,101 +1152,101 @@ static u8 gup_burn_dsp_isp(struct i2c_client *client) u8 *fw_dsp_isp = NULL; u8 retry = 0; - GTP_DEBUG("[burn_dsp_isp]Begin burn dsp isp---->>"); + pr_debug("[burn_dsp_isp]Begin burn dsp isp---->>\n"); /* step1:alloc memory */ - GTP_DEBUG("[burn_dsp_isp]step1:alloc memory"); + pr_debug("[burn_dsp_isp]step1:alloc memory\n"); while (retry++ < 5) { fw_dsp_isp = devm_kzalloc(&client->dev, FW_DSP_ISP_LENGTH, GFP_KERNEL); if (fw_dsp_isp == NULL) { continue; } else { - GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.", + pr_info("[burn_dsp_isp]Alloc %dk byte memory success.\n", (FW_DSP_ISP_LENGTH/1024)); break; } } if (retry == 5) { - GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit."); + pr_err("[burn_dsp_isp]Alloc memory fail,exit.\n"); return FAIL; } /* step2:load dsp isp file data */ - GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data"); + pr_debug("[burn_dsp_isp]step2:load dsp isp file data\n"); ret = gup_load_section_file(fw_dsp_isp, (4 * FW_SECTION_LENGTH + FW_DSP_LENGTH + FW_BOOT_LENGTH), FW_DSP_ISP_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail."); + pr_err("[burn_dsp_isp]load firmware dsp_isp fail.\n"); return FAIL; } /* step3:disable wdt,clear cache enable */ - GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable"); + pr_debug("[burn_dsp_isp]step3:disable wdt,clear cache enable\n"); ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]disable wdt fail."); + pr_err("[burn_dsp_isp]disable wdt fail.\n"); return FAIL; } ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]clear cache enable fail."); + pr_err("[burn_dsp_isp]clear cache enable fail.\n"); return FAIL; } /* step4:hold ss51 & dsp */ - GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp"); + pr_debug("[burn_dsp_isp]step4:hold ss51 & dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail."); + pr_err("[burn_dsp_isp]hold ss51 & dsp fail.\n"); return FAIL; } /* step5:set boot from sram */ - GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram"); + pr_debug("[burn_dsp_isp]step5:set boot from sram\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]set boot from sram fail."); + pr_err("[burn_dsp_isp]set boot from sram fail.\n"); return FAIL; } /* step6:software reboot */ - GTP_DEBUG("[burn_dsp_isp]step6:software reboot"); + pr_debug("[burn_dsp_isp]step6:software reboot\n"); ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]software reboot fail."); + pr_err("[burn_dsp_isp]software reboot fail.\n"); return FAIL; } /* step7:select bank2 */ - GTP_DEBUG("[burn_dsp_isp]step7:select bank2"); + pr_debug("[burn_dsp_isp]step7:select bank2\n"); ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]select bank2 fail."); + pr_err("[burn_dsp_isp]select bank2 fail.\n"); return FAIL; } /* step8:enable accessing code */ - GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code"); + pr_debug("[burn_dsp_isp]step8:enable accessing code\n"); ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]enable accessing code fail."); + pr_err("[burn_dsp_isp]enable accessing code fail.\n"); return FAIL; } /* step9:burn 4k dsp_isp */ - GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp"); + pr_debug("[burn_dsp_isp]step9:burn 4k dsp_isp\n"); ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail."); + pr_err("[burn_dsp_isp]burn dsp_isp fail.\n"); return FAIL; } /* step10:set scramble */ - GTP_DEBUG("[burn_dsp_isp]step10:set scramble"); + pr_debug("[burn_dsp_isp]step10:set scramble\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_dsp_isp]set scramble fail."); + pr_err("[burn_dsp_isp]set scramble fail.\n"); return FAIL; } @@ -1290,98 +1259,98 @@ static u8 gup_burn_fw_ss51(struct i2c_client *client) u8 retry = 0; s32 ret = 0; - GTP_DEBUG("[burn_fw_ss51]Begin burn ss51 firmware---->>"); + pr_debug("[burn_fw_ss51]Begin burn ss51 firmware---->>\n"); /* step1:alloc memory */ - GTP_DEBUG("[burn_fw_ss51]step1:alloc memory"); + pr_debug("[burn_fw_ss51]step1:alloc memory\n"); while (retry++ < 5) { fw_ss51 = devm_kzalloc(&client->dev, FW_SECTION_LENGTH, GFP_KERNEL); if (fw_ss51 == NULL) { continue; } else { - GTP_INFO("[burn_fw_ss51]Alloc %dk byte memory success.", + pr_info("[burn_fw_ss51]Alloc %dk byte memory success.\n", (FW_SECTION_LENGTH/1024)); break; } } if (retry == 5) { - GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit."); + pr_err("[burn_fw_ss51]Alloc memory fail,exit.\n"); return FAIL; } /* step2:load ss51 firmware section 1 file data */ - GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data"); + pr_debug("[burn_fw_ss51]step2:load ss51 firmware section 1 file data\n"); ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail."); + pr_err("[burn_fw_ss51]load ss51 firmware section 1 fail.\n"); return FAIL; } /* step3:clear control flag */ - GTP_DEBUG("[burn_fw_ss51]step3:clear control flag"); + pr_debug("[burn_fw_ss51]step3:clear control flag\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_fw_ss51]clear control flag fail."); + pr_err("[burn_fw_ss51]clear control flag fail.\n"); return FAIL; } /* step4:burn ss51 firmware section 1 */ - GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1"); + pr_debug("[burn_fw_ss51]step4:burn ss51 firmware section 1\n"); ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail."); + pr_err("[burn_fw_ss51]burn ss51 firmware section 1 fail.\n"); return FAIL; } /* step5:load ss51 firmware section 2 file data */ - GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data"); + pr_debug("[burn_fw_ss51]step5:load ss51 firmware section 2 file data\n"); ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail."); + pr_err("[burn_fw_ss51]load ss51 firmware section 2 fail.\n"); return FAIL; } /* step6:burn ss51 firmware section 2 */ - GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2"); + pr_debug("[burn_fw_ss51]step6:burn ss51 firmware section 2\n"); ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail."); + pr_err("[burn_fw_ss51]burn ss51 firmware section 2 fail.\n"); return FAIL; } /* step7:load ss51 firmware section 3 file data */ - GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data"); + pr_debug("[burn_fw_ss51]step7:load ss51 firmware section 3 file data\n"); ret = gup_load_section_file(fw_ss51, 2*FW_SECTION_LENGTH, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail."); + pr_err("[burn_fw_ss51]load ss51 firmware section 3 fail.\n"); return FAIL; } /* step8:burn ss51 firmware section 3 */ - GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3"); + pr_debug("[burn_fw_ss51]step8:burn ss51 firmware section 3\n"); ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail."); + pr_err("[burn_fw_ss51]burn ss51 firmware section 3 fail.\n"); return FAIL; } /* step9:load ss51 firmware section 4 file data */ - GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data"); + pr_debug("[burn_fw_ss51]step9:load ss51 firmware section 4 file data\n"); ret = gup_load_section_file(fw_ss51, 3*FW_SECTION_LENGTH, FW_SECTION_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail."); + pr_err("[burn_fw_ss51]load ss51 firmware section 4 fail.\n"); return FAIL; } /* step10:burn ss51 firmware section 4 */ - GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4"); + pr_debug("[burn_fw_ss51]step10:burn ss51 firmware section 4\n"); ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14); if (ret == FAIL) { - GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail."); + pr_err("[burn_fw_ss51]burn ss51 firmware section 4 fail.\n"); return FAIL; } @@ -1395,101 +1364,97 @@ static u8 gup_burn_fw_dsp(struct i2c_client *client) u8 retry = 0; u8 rd_buf[5]; - GTP_DEBUG("[burn_fw_dsp]Begin burn dsp firmware---->>"); + pr_debug("[burn_fw_dsp]Begin burn dsp firmware---->>\n"); /* step1:alloc memory */ - GTP_DEBUG("[burn_fw_dsp]step1:alloc memory"); + pr_debug("[burn_fw_dsp]step1:alloc memory\n"); while (retry++ < 5) { fw_dsp = devm_kzalloc(&client->dev, FW_DSP_LENGTH, GFP_KERNEL); if (fw_dsp == NULL) { continue; } else { - GTP_INFO("[burn_fw_dsp]Alloc %dk byte memory success.", + pr_info("[burn_fw_dsp]Alloc %dk byte memory success.\n", (FW_SECTION_LENGTH/1024)); break; } } if (retry == 5) { - GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit."); + pr_err("[burn_fw_dsp]Alloc memory fail,exit.\n"); return FAIL; } /* step2:load firmware dsp */ - GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp"); + pr_debug("[burn_fw_dsp]step2:load firmware dsp\n"); ret = gup_load_section_file(fw_dsp, 4*FW_SECTION_LENGTH, FW_DSP_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_dsp]load firmware dsp fail."); + pr_err("[burn_fw_dsp]load firmware dsp fail.\n"); return ret; } /* step3:select bank3 */ - GTP_DEBUG("[burn_fw_dsp]step3:select bank3"); + pr_debug("[burn_fw_dsp]step3:select bank3\n"); ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]select bank3 fail."); + pr_err("[burn_fw_dsp]select bank3 fail.\n"); return FAIL; } /* Step4:hold ss51 & dsp */ - GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp"); + pr_debug("[burn_fw_dsp]step4:hold ss51 & dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail."); + pr_err("[burn_fw_dsp]hold ss51 & dsp fail.\n"); return FAIL; } /* step5:set scramble */ - GTP_DEBUG("[burn_fw_dsp]step5:set scramble"); + pr_debug("[burn_fw_dsp]step5:set scramble\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]set scramble fail."); + pr_err("[burn_fw_dsp]set scramble fail.\n"); return FAIL; } /* step6:release ss51 & dsp */ - GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp"); + pr_debug("[burn_fw_dsp]step6:release ss51 & dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail."); + pr_err("[burn_fw_dsp]release ss51 & dsp fail.\n"); return FAIL; } /* must delay */ msleep(20); /* step7:burn 4k dsp firmware */ - GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware"); + pr_debug("[burn_fw_dsp]step7:burn 4k dsp firmware\n"); ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_dsp]burn fw_section fail."); + pr_err("[burn_fw_dsp]burn fw_section fail.\n"); return ret; } /* step8:send burn cmd to move data to flash from sram */ - GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash", - "from sram"); + pr_debug("[burn_fw_dsp]step8:send burn cmd to move data to flash from sram\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]send burn cmd fail."); + pr_err("[burn_fw_dsp]send burn cmd fail.\n"); return ret; } - GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......"); + pr_debug("[burn_fw_dsp]Wait for the burn is complete......\n"); do { ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); if (ret <= 0) { - GTP_ERROR("[burn_fw_dsp]Get burn state fail"); + pr_err("[burn_fw_dsp]Get burn state fail\n"); return ret; } msleep(20); - /* GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.", - * rd_buf[GTP_ADDR_LENGTH]); - */ } while (rd_buf[GTP_ADDR_LENGTH]); /* step9:recall check 4k dsp firmware */ - GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware"); + pr_debug("[burn_fw_dsp]step9:recall check 4k dsp firmware\n"); ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail."); + pr_err("[burn_fw_dsp]recall check 4k dsp firmware fail.\n"); return ret; } @@ -1503,119 +1468,115 @@ static u8 gup_burn_fw_boot(struct i2c_client *client) u8 retry = 0; u8 rd_buf[5]; - GTP_DEBUG("[burn_fw_boot]Begin burn bootloader firmware---->>"); + pr_debug("[burn_fw_boot]Begin burn bootloader firmware---->>\n"); /* step1:Alloc memory */ - GTP_DEBUG("[burn_fw_boot]step1:Alloc memory"); + pr_debug("[burn_fw_boot]step1:Alloc memory\n"); while (retry++ < 5) { fw_boot = devm_kzalloc(&client->dev, FW_BOOT_LENGTH, GFP_KERNEL); if (fw_boot == NULL) { continue; } else { - GTP_INFO("[burn_fw_boot]Alloc %dk byte memory success.", + pr_info("[burn_fw_boot]Alloc %dk byte memory success.\n", (FW_BOOT_LENGTH/1024)); break; } } if (retry == 5) { - GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit."); + pr_err("[burn_fw_boot]Alloc memory fail,exit.\n"); return FAIL; } /* step2:load firmware bootloader */ - GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader"); + pr_debug("[burn_fw_boot]step2:load firmware bootloader\n"); ret = gup_load_section_file(fw_boot, (4 * FW_SECTION_LENGTH + FW_DSP_LENGTH), FW_BOOT_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_boot]load firmware dsp fail."); + pr_err("[burn_fw_boot]load firmware dsp fail.\n"); return ret; } /* step3:hold ss51 & dsp */ - GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp"); + pr_debug("[burn_fw_boot]step3:hold ss51 & dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail."); + pr_err("[burn_fw_boot]hold ss51 & dsp fail.\n"); return FAIL; } /* step4:set scramble */ - GTP_DEBUG("[burn_fw_boot]step4:set scramble"); + pr_debug("[burn_fw_boot]step4:set scramble\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]set scramble fail."); + pr_err("[burn_fw_boot]set scramble fail.\n"); return FAIL; } /* step5:release ss51 & dsp */ - GTP_DEBUG("[burn_fw_boot]step5:release ss51 & dsp"); + pr_debug("[burn_fw_boot]step5:release ss51 & dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail."); + pr_err("[burn_fw_boot]release ss51 & dsp fail.\n"); return FAIL; } /* must delay */ msleep(20); /* step6:select bank3 */ - GTP_DEBUG("[burn_fw_boot]step6:select bank3"); + pr_debug("[burn_fw_boot]step6:select bank3\n"); ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]select bank3 fail."); + pr_err("[burn_fw_boot]select bank3 fail.\n"); return FAIL; } /* step7:burn 2k bootloader firmware */ - GTP_DEBUG("[burn_fw_boot]step7:burn 2k bootloader firmware"); + pr_debug("[burn_fw_boot]step7:burn 2k bootloader firmware\n"); ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_boot]burn fw_section fail."); + pr_err("[burn_fw_boot]burn fw_section fail.\n"); return ret; } /* step7:send burn cmd to move data to flash from sram */ - GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to", - "flash from sram"); + pr_debug("[burn_fw_boot]step7:send burn cmd to move data to flash from sram\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]send burn cmd fail."); + pr_err("[burn_fw_boot]send burn cmd fail.\n"); return ret; } - GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......"); + pr_debug("[burn_fw_boot]Wait for the burn is complete......\n"); do { ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]Get burn state fail"); + pr_err("[burn_fw_boot]Get burn state fail\n"); return ret; } msleep(20); - /* GTP_DEBUG("[burn_fw_boot]Get burn state:%d.", - * rd_buf[GTP_ADDR_LENGTH]); - */ } while (rd_buf[GTP_ADDR_LENGTH]); /* step8:recall check 2k bootloader firmware */ - GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware"); + pr_debug("[burn_fw_boot]step8:recall check 2k bootloader firmware\n"); ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH); if (ret == FAIL) { - GTP_ERROR("[burn_fw_boot]recall check 4k dsp firmware fail."); + pr_err("[burn_fw_boot]recall check 4k dsp firmware fail.\n"); return ret; } /* step9:enable download DSP code */ - GTP_DEBUG("[burn_fw_boot]step9:enable download DSP code "); + pr_debug("[burn_fw_boot]step9:enable download DSP code\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]enable download DSP code fail."); + pr_err("[burn_fw_boot]enable download DSP code fail.\n"); return FAIL; } /* step10:release ss51 & hold dsp */ - GTP_DEBUG("[burn_fw_boot]step10:release ss51 & hold dsp"); + pr_debug("[burn_fw_boot]step10:release ss51 & hold dsp\n"); ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08); if (ret <= 0) { - GTP_ERROR("[burn_fw_boot]release ss51 & hold dsp fail."); + pr_err("[burn_fw_boot]release ss51 & hold dsp fail.\n"); return FAIL; } @@ -1629,7 +1590,7 @@ s32 gup_update_proc(void *dir) st_fw_head fw_head; struct goodix_ts_data *ts = NULL; - GTP_DEBUG("[update_proc]Begin update ......"); + pr_debug("[update_proc]Begin update ......\n"); show_len = 1; total_len = 100; @@ -1642,7 +1603,7 @@ s32 gup_update_proc(void *dir) if (searching_file) { /* exit .bin update file searching */ searching_file = 0; - GTP_INFO("Exiting searching .bin update file..."); + pr_info("Exiting searching .bin update file...\n"); /* wait for auto update quitted completely */ while ((show_len != 200) && (show_len != 100)) msleep(100); @@ -1651,20 +1612,20 @@ s32 gup_update_proc(void *dir) update_msg.file = NULL; ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8 *)dir); if (ret == FAIL) { - GTP_ERROR("[update_proc]check update file fail."); + pr_err("[update_proc]check update file fail.\n"); goto file_fail; } /* gtp_reset_guitar(i2c_connect_client, 20); */ ret = gup_get_ic_fw_msg(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]get ic message fail."); + pr_err("[update_proc]get ic message fail.\n"); goto file_fail; } ret = gup_enter_update_judge(&fw_head); if (ret == FAIL) { - GTP_ERROR("[update_proc]Check *.bin file fail."); + pr_err("[update_proc]Check *.bin file fail.\n"); goto file_fail; } @@ -1675,7 +1636,7 @@ s32 gup_update_proc(void *dir) #endif ret = gup_enter_update_mode(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]enter update mode fail."); + pr_err("[update_proc]enter update mode fail.\n"); goto update_fail; } @@ -1684,53 +1645,53 @@ s32 gup_update_proc(void *dir) total_len = 100; ret = gup_burn_dsp_isp(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]burn dsp isp fail."); + pr_err("[update_proc]burn dsp isp fail.\n"); continue; } show_len += 10; ret = gup_burn_fw_ss51(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]burn ss51 firmware fail."); + pr_err("[update_proc]burn ss51 firmware fail.\n"); continue; } show_len += 40; ret = gup_burn_fw_dsp(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]burn dsp firmware fail."); + pr_err("[update_proc]burn dsp firmware fail.\n"); continue; } show_len += 20; ret = gup_burn_fw_boot(i2c_connect_client); if (ret == FAIL) { - GTP_ERROR("[update_proc]burn bootloader fw fail."); + pr_err("[update_proc]burn bootloader fw fail.\n"); continue; } show_len += 10; - GTP_INFO("[update_proc]UPDATE SUCCESS."); + pr_info("[update_proc]UPDATE SUCCESS.\n"); break; } if (retry >= 5) { - GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL."); + pr_err("[update_proc]retry timeout,UPDATE FAIL.\n"); goto update_fail; } - GTP_DEBUG("[update_proc]leave update mode."); + pr_debug("[update_proc]leave update mode.\n"); gup_leave_update_mode(); msleep(100); - /* GTP_DEBUG("[update_proc]send config."); + /* * ret = gtp_send_cfg(i2c_connect_client); * if(ret < 0) { - * GTP_ERROR("[update_proc]send config fail."); + * pr_err("[update_proc]send config fail."); * } */ if (ts->fw_error) { - GTP_INFO("firmware error auto update, resent config!"); + pr_info("firmware error auto update, resent config!\n"); gup_init_panel(ts); } show_len = 100; @@ -1761,17 +1722,20 @@ file_fail: return FAIL; } +static void gup_update_work(struct work_struct *work) +{ + if (gup_update_proc(NULL) == FAIL) + pr_err("Goodix update work fail\n"); +} + #if GTP_AUTO_UPDATE u8 gup_init_update_proc(struct goodix_ts_data *ts) { - struct task_struct *thread = NULL; + dev_dbg(&ts->client->dev, "Ready to run update work\n"); - GTP_INFO("Ready to run update thread."); - thread = kthread_run(gup_update_proc, (void *)NULL, "guitar_update"); - if (IS_ERR(thread)) { - GTP_ERROR("Failed to create update thread.\n"); - return -EINVAL; - } + INIT_DELAYED_WORK(&ts->goodix_update_work, gup_update_work); + schedule_delayed_work(&ts->goodix_update_work, + msecs_to_jiffies(3000)); return 0; } diff --git a/drivers/iommu/msm_dma_iommu_mapping.c b/drivers/iommu/msm_dma_iommu_mapping.c index a035ebd5af7e..334f4e95c068 100644 --- a/drivers/iommu/msm_dma_iommu_mapping.c +++ b/drivers/iommu/msm_dma_iommu_mapping.c @@ -358,10 +358,12 @@ int msm_dma_unmap_all_for_dev(struct device *dev) meta_node = rb_first(root); while (meta_node) { struct msm_iommu_map *iommu_map; + struct msm_iommu_map *iommu_map_next; meta = rb_entry(meta_node, struct msm_iommu_meta, node); mutex_lock(&meta->lock); - list_for_each_entry(iommu_map, &meta->iommu_maps, lnode) + list_for_each_entry_safe(iommu_map, iommu_map_next, + &meta->iommu_maps, lnode) if (iommu_map->dev == dev) if (!kref_put(&iommu_map->ref, msm_iommu_map_release)) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 0608e08b4427..50c8c92d575d 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -199,7 +199,7 @@ static void gic_poke_irq(struct irq_data *d, u32 offset) rwp_wait = gic_dist_wait_for_rwp; } - writel_relaxed(mask, base + offset + (gic_irq(d) / 32) * 4); + writel_relaxed_no_log(mask, base + offset + (gic_irq(d) / 32) * 4); rwp_wait(); } diff --git a/drivers/leds/leds-qpnp-flash-v2.c b/drivers/leds/leds-qpnp-flash-v2.c index 2f7529814cd9..0cae5d2e5263 100644 --- a/drivers/leds/leds-qpnp-flash-v2.c +++ b/drivers/leds/leds-qpnp-flash-v2.c @@ -594,7 +594,7 @@ static int qpnp_flash_led_calc_max_current(struct qpnp_flash_led *led) avail_flash_ua, ocv_uv, ibat_now, rbatt_uohm, led->trigger_lmh); return min(FLASH_LED_MAX_TOTAL_CURRENT_MA, - (int)(avail_flash_ua / MCONV)); + (int)(div64_s64(avail_flash_ua, MCONV))); } static int qpnp_flash_led_calc_thermal_current_lim(struct qpnp_flash_led *led) diff --git a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c index 8da079d9d0c8..d6bb18522e0c 100644 --- a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c +++ b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.c @@ -542,6 +542,28 @@ int msm_camera_put_clk_info_and_rates(struct platform_device *pdev, } EXPORT_SYMBOL(msm_camera_put_clk_info_and_rates); +/* Get reset info from DT */ +int msm_camera_get_reset_info(struct platform_device *pdev, + struct reset_control **micro_iface_reset) +{ + if (!pdev || !micro_iface_reset) + return -EINVAL; + + if (of_property_match_string(pdev->dev.of_node, "reset-names", + "micro_iface_reset")) { + pr_err("err: Reset property not found\n"); + return -EINVAL; + } + + *micro_iface_reset = devm_reset_control_get + (&pdev->dev, "micro_iface_reset"); + if (IS_ERR(*micro_iface_reset)) + return PTR_ERR(*micro_iface_reset); + + return 0; +} +EXPORT_SYMBOL(msm_camera_get_reset_info); + /* Get regulators from DT */ int msm_camera_get_regulator_info(struct platform_device *pdev, struct msm_cam_regulator **vdd_info, diff --git a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h index b4494d4d6bab..0e9d26bebe30 100644 --- a/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h +++ b/drivers/media/platform/msm/camera_v2/common/cam_soc_api.h @@ -21,6 +21,7 @@ #include <linux/regulator/consumer.h> #include <linux/interrupt.h> #include <linux/slab.h> +#include <linux/reset.h> #include <soc/qcom/camera2.h> enum cam_bus_client { @@ -187,6 +188,21 @@ int msm_camera_clk_enable(struct device *dev, long msm_camera_clk_set_rate(struct device *dev, struct clk *clk, long clk_rate); + +/** + * @brief : Gets reset info + * + * This function extracts the reset information for a specific + * platform device + * + * @param pdev : platform device to get reset information + * @param micro_iface_reset : Pointer to populate the reset names + * + * @return Status of operation. Negative in case of error. Zero otherwise. + */ + +int msm_camera_get_reset_info(struct platform_device *pdev, + struct reset_control **micro_iface_reset); /** * @brief : Sets flags of a clock * diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c index f4add41c85c9..3ac4c3af3208 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.c @@ -4017,11 +4017,20 @@ static int cpp_probe(struct platform_device *pdev) } } + rc = msm_camera_get_reset_info(pdev, + &cpp_dev->micro_iface_reset); + if (rc < 0) { + cpp_dev->micro_iface_reset = NULL; + pr_err("%s: failed to get micro_iface_reset\n", + __func__); + goto get_reg_err; + } + rc = msm_camera_get_regulator_info(pdev, &cpp_dev->cpp_vdd, &cpp_dev->num_reg); if (rc < 0) { pr_err("%s: failed to get the regulators\n", __func__); - goto get_reg_err; + goto get_reset_err; } msm_cpp_fetch_dt_params(cpp_dev); @@ -4104,6 +4113,8 @@ static int cpp_probe(struct platform_device *pdev) cpp_probe_init_error: media_entity_cleanup(&cpp_dev->msm_sd.sd.entity); msm_sd_unregister(&cpp_dev->msm_sd); +get_reset_err: + reset_control_put(cpp_dev->micro_iface_reset); get_reg_err: msm_camera_put_clk_info(pdev, &cpp_dev->clk_info, &cpp_dev->cpp_clk, cpp_dev->num_clks); @@ -4161,6 +4172,9 @@ static int cpp_device_remove(struct platform_device *dev) msm_camera_unregister_bus_client(CAM_BUS_CLIENT_CPP); mutex_destroy(&cpp_dev->mutex); kfree(cpp_dev->work); + + reset_control_put(cpp_dev->micro_iface_reset); + destroy_workqueue(cpp_dev->timer_wq); kfree(cpp_dev->cpp_clk); kfree(cpp_dev); diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h index 1784e27b1e37..d5abe0202717 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp.h @@ -211,6 +211,7 @@ struct cpp_device { struct clk **cpp_clk; struct msm_cam_clk_info *clk_info; size_t num_clks; + struct reset_control *micro_iface_reset; struct msm_cam_regulator *cpp_vdd; int num_reg; struct mutex mutex; diff --git a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c index ee52284e3ae3..2c313016bc90 100644 --- a/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c +++ b/drivers/media/platform/msm/camera_v2/pproc/cpp/msm_cpp_soc.c @@ -103,20 +103,11 @@ static int cpp_get_clk_freq_tbl(struct clk *clk, struct cpp_hw_info *hw_info, int msm_cpp_set_micro_clk(struct cpp_device *cpp_dev) { - uint32_t msm_micro_iface_idx; int rc; - msm_micro_iface_idx = msm_cpp_get_clock_index(cpp_dev, - "micro_iface_clk"); - if (msm_micro_iface_idx < 0) { - pr_err("Fail to get clock index\n"); - return -EINVAL; - } - - rc = clk_reset(cpp_dev->cpp_clk[msm_micro_iface_idx], - CLK_RESET_ASSERT); + rc = reset_control_assert(cpp_dev->micro_iface_reset); if (rc) { - pr_err("%s:micro_iface_clk assert failed\n", + pr_err("%s:micro_iface_reset assert failed\n", __func__); return -EINVAL; } @@ -129,10 +120,9 @@ int msm_cpp_set_micro_clk(struct cpp_device *cpp_dev) */ usleep_range(1000, 1200); - rc = clk_reset(cpp_dev->cpp_clk[msm_micro_iface_idx], - CLK_RESET_DEASSERT); + rc = reset_control_deassert(cpp_dev->micro_iface_reset); if (rc) { - pr_err("%s:micro_iface_clk de-assert failed\n", __func__); + pr_err("%s:micro_iface_reset de-assert failed\n", __func__); return -EINVAL; } diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_core.c b/drivers/media/platform/msm/sde/rotator/sde_rotator_core.c index 3e5cbdecfba4..041a8219e145 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_core.c +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_core.c @@ -278,6 +278,10 @@ static void sde_rotator_footswitch_ctrl(struct sde_rot_mgr *mgr, bool on) SDEROT_EVTLOG(on); SDEROT_DBG("%s: rotator regulators", on ? "Enable" : "Disable"); + + if (mgr->ops_hw_pre_pmevent) + mgr->ops_hw_pre_pmevent(mgr, on); + ret = sde_rot_enable_vreg(mgr->module_power.vreg_config, mgr->module_power.num_vreg, on); if (ret) { @@ -286,10 +290,13 @@ static void sde_rotator_footswitch_ctrl(struct sde_rot_mgr *mgr, bool on) return; } + if (mgr->ops_hw_post_pmevent) + mgr->ops_hw_post_pmevent(mgr, on); + mgr->regulator_enable = on; } -static int sde_rotator_clk_ctrl(struct sde_rot_mgr *mgr, int enable) +int sde_rotator_clk_ctrl(struct sde_rot_mgr *mgr, int enable) { struct clk *clk; int ret = 0; diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_core.h b/drivers/media/platform/msm/sde/rotator/sde_rotator_core.h index 8659d361be07..aa17341de7c2 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_core.h +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_core.h @@ -293,6 +293,8 @@ struct sde_rot_mgr { void (*ops_hw_free)(struct sde_rot_mgr *mgr, struct sde_rot_hw_resource *hw); int (*ops_hw_init)(struct sde_rot_mgr *mgr); + void (*ops_hw_pre_pmevent)(struct sde_rot_mgr *mgr, bool pmon); + void (*ops_hw_post_pmevent)(struct sde_rot_mgr *mgr, bool pmon); void (*ops_hw_destroy)(struct sde_rot_mgr *mgr); ssize_t (*ops_hw_show_caps)(struct sde_rot_mgr *mgr, struct device_attribute *attr, char *buf, ssize_t len); @@ -405,6 +407,8 @@ int sde_rotator_validate_request(struct sde_rot_mgr *rot_dev, struct sde_rot_file_private *ctx, struct sde_rot_entry_container *req); +int sde_rotator_clk_ctrl(struct sde_rot_mgr *mgr, int enable); + static inline void sde_rot_mgr_lock(struct sde_rot_mgr *mgr) { mutex_lock(&mgr->lock); diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c index e9d2dd5ec972..d2bc76874c48 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3.c @@ -271,6 +271,7 @@ static int sde_hw_rotator_pending_swts(struct sde_hw_rotator *rot, SDEROT_DBG("ts:0x%x, queue_id:%d, swts:0x%x, pending:%d\n", ctx->timestamp, ctx->q_id, swts, pending); + SDEROT_EVTLOG(ctx->timestamp, swts, ctx->q_id, ts_diff); return pending; } @@ -1240,6 +1241,94 @@ static void sde_hw_rotator_swtc_destroy(struct sde_hw_rotator *rot) } /* + * sde_hw_rotator_pre_pmevent - SDE rotator core will call this before a + * PM event occurs + * @mgr: Pointer to rotator manager + * @pmon: Boolean indicate an on/off power event + */ +void sde_hw_rotator_pre_pmevent(struct sde_rot_mgr *mgr, bool pmon) +{ + struct sde_hw_rotator *rot; + u32 l_ts, h_ts, swts, hwts; + u32 rotsts, regdmasts; + + /* + * Check last HW timestamp with SW timestamp before power off event. + * If there is a mismatch, that will be quite possible the rotator HW + * is either hang or not finishing last submitted job. In that case, + * it is best to do a timeout eventlog to capture some good events + * log data for analysis. + */ + if (!pmon && mgr && mgr->hw_data) { + rot = mgr->hw_data; + h_ts = atomic_read(&rot->timestamp[ROT_QUEUE_HIGH_PRIORITY]); + l_ts = atomic_read(&rot->timestamp[ROT_QUEUE_LOW_PRIORITY]); + + /* contruct the combined timstamp */ + swts = (h_ts & SDE_REGDMA_SWTS_MASK) | + ((l_ts & SDE_REGDMA_SWTS_MASK) << + SDE_REGDMA_SWTS_SHIFT); + + /* Need to turn on clock to access rotator register */ + sde_rotator_clk_ctrl(mgr, true); + hwts = SDE_ROTREG_READ(rot->mdss_base, REGDMA_TIMESTAMP_REG); + regdmasts = SDE_ROTREG_READ(rot->mdss_base, + REGDMA_CSR_REGDMA_BLOCK_STATUS); + rotsts = SDE_ROTREG_READ(rot->mdss_base, ROTTOP_STATUS); + + SDEROT_DBG( + "swts:0x%x, hwts:0x%x, regdma-sts:0x%x, rottop-sts:0x%x\n", + swts, hwts, regdmasts, rotsts); + SDEROT_EVTLOG(swts, hwts, regdmasts, rotsts); + + if ((swts != hwts) && ((regdmasts & REGDMA_BUSY) || + (rotsts & ROT_STATUS_MASK))) { + SDEROT_ERR( + "Mismatch SWTS with HWTS: swts:0x%x, hwts:0x%x, regdma-sts:0x%x, rottop-sts:0x%x\n", + swts, hwts, regdmasts, rotsts); + SDEROT_EVTLOG_TOUT_HANDLER("rot", "vbif_dbg_bus", + "panic"); + } + + /* Turn off rotator clock after checking rotator registers */ + sde_rotator_clk_ctrl(mgr, false); + } +} + +/* + * sde_hw_rotator_post_pmevent - SDE rotator core will call this after a + * PM event occurs + * @mgr: Pointer to rotator manager + * @pmon: Boolean indicate an on/off power event + */ +void sde_hw_rotator_post_pmevent(struct sde_rot_mgr *mgr, bool pmon) +{ + struct sde_hw_rotator *rot; + u32 l_ts, h_ts, swts; + + /* + * After a power on event, the rotator HW is reset to default setting. + * It is necessary to synchronize the SW timestamp with the HW. + */ + if (pmon && mgr && mgr->hw_data) { + rot = mgr->hw_data; + h_ts = atomic_read(&rot->timestamp[ROT_QUEUE_HIGH_PRIORITY]); + l_ts = atomic_read(&rot->timestamp[ROT_QUEUE_LOW_PRIORITY]); + + /* contruct the combined timstamp */ + swts = (h_ts & SDE_REGDMA_SWTS_MASK) | + ((l_ts & SDE_REGDMA_SWTS_MASK) << + SDE_REGDMA_SWTS_SHIFT); + + SDEROT_DBG("swts:0x%x, h_ts:0x%x, l_ts;0x%x\n", + swts, h_ts, l_ts); + SDEROT_EVTLOG(swts, h_ts, l_ts); + rot->reset_hw_ts = true; + rot->last_hw_ts = swts; + } +} + +/* * sde_hw_rotator_destroy - Destroy hw rotator and free allocated resources * @mgr: Pointer to rotator manager */ @@ -1455,6 +1544,15 @@ static int sde_hw_rotator_config(struct sde_rot_hw_resource *hw, return -EINVAL; } + if (rot->reset_hw_ts) { + SDEROT_EVTLOG(rot->last_hw_ts); + SDE_ROTREG_WRITE(rot->mdss_base, REGDMA_TIMESTAMP_REG, + rot->last_hw_ts); + /* ensure write is issued to the rotator HW */ + wmb(); + rot->reset_hw_ts = false; + } + flags = (item->flags & SDE_ROTATION_FLIP_LR) ? SDE_ROT_FLAG_FLIP_LR : 0; flags |= (item->flags & SDE_ROTATION_FLIP_UD) ? @@ -1511,7 +1609,8 @@ static int sde_hw_rotator_config(struct sde_rot_hw_resource *hw, &entry->dst_buf); } - SDEROT_EVTLOG(flags, item->input.width, item->input.height, + SDEROT_EVTLOG(ctx->timestamp, flags, + item->input.width, item->input.height, item->output.width, item->output.height, entry->src_buf.p[0].addr, entry->dst_buf.p[0].addr); @@ -1715,6 +1814,7 @@ static int sde_rotator_hw_rev_init(struct sde_hw_rotator *rot) mdata->regdump = sde_rot_r3_regdump; mdata->regdump_size = ARRAY_SIZE(sde_rot_r3_regdump); + SDE_ROTREG_WRITE(rot->mdss_base, REGDMA_TIMESTAMP_REG, 0); return 0; } @@ -2174,6 +2274,8 @@ int sde_rotator_r3_init(struct sde_rot_mgr *mgr) mgr->ops_hw_create_debugfs = sde_rotator_r3_create_debugfs; mgr->ops_hw_get_pixfmt = sde_hw_rotator_get_pixfmt; mgr->ops_hw_is_valid_pixfmt = sde_hw_rotator_is_valid_pixfmt; + mgr->ops_hw_pre_pmevent = sde_hw_rotator_pre_pmevent; + mgr->ops_hw_post_pmevent = sde_hw_rotator_post_pmevent; ret = sde_hw_rotator_parse_dt(mgr->hw_data, mgr->pdev); if (ret) diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_hwio.h b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_hwio.h index 3267e4418b3a..a748b87a231a 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_hwio.h +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_hwio.h @@ -250,9 +250,10 @@ /* General defines */ #define ROT_DONE_MASK 0x1 #define ROT_DONE_CLEAR 0x1 -#define ROT_BUSY_BIT BIT(1) +#define ROT_BUSY_BIT BIT(0) #define ROT_ERROR_BIT BIT(8) #define ROT_STATUS_MASK (ROT_BUSY_BIT | ROT_ERROR_BIT) +#define REGDMA_BUSY BIT(0) #define REGDMA_EN 0x1 #define REGDMA_SECURE_EN BIT(8) #define REGDMA_HALT BIT(16) diff --git a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h index b95f838f463b..91ac3d0371fa 100644 --- a/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h +++ b/drivers/media/platform/msm/sde/rotator/sde_rotator_r3_internal.h @@ -270,6 +270,8 @@ struct sde_hw_rotator { spinlock_t rotisr_lock; bool dbgmem; + bool reset_hw_ts; + u32 last_hw_ts; }; /** diff --git a/drivers/mfd/wcd9xxx-core.c b/drivers/mfd/wcd9xxx-core.c index 981d372277ee..5bcd0db929b3 100644 --- a/drivers/mfd/wcd9xxx-core.c +++ b/drivers/mfd/wcd9xxx-core.c @@ -1219,6 +1219,11 @@ static int wcd9xxx_slim_probe(struct slim_device *slim) intf_type = wcd9xxx_get_intf_type(); + if (!slim) { + ret = -EINVAL; + goto err; + } + if (intf_type == WCD9XXX_INTERFACE_TYPE_I2C) { dev_dbg(&slim->dev, "%s:Codec is detected in I2C mode\n", __func__); diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c index bd554667de96..644178a0cdfc 100644 --- a/drivers/misc/qseecom.c +++ b/drivers/misc/qseecom.c @@ -7146,8 +7146,10 @@ static int qseecom_open(struct inode *inode, struct file *file) atomic_set(&data->ioctl_count, 0); data->sglistinfo_ptr = kzalloc(SGLISTINFO_TABLE_SIZE, GFP_KERNEL); - if (!(data->sglistinfo_ptr)) + if (!(data->sglistinfo_ptr)) { + kzfree(data); return -ENOMEM; + } return ret; } @@ -8011,8 +8013,10 @@ static int qseecom_check_whitelist_feature(void) qseecom.whitelist_support = true; ret = 0; } else { - pr_err("Failed to check whitelist: ret = %d, result = 0x%x\n", + pr_info("Check whitelist with ret = %d, result = 0x%x\n", ret, resp.result); + qseecom.whitelist_support = false; + ret = 0; } kfree(buf); return ret; diff --git a/drivers/net/wireless/cnss/cnss_pci.c b/drivers/net/wireless/cnss/cnss_pci.c index 5d9329168699..1e3c3829c1c7 100644 --- a/drivers/net/wireless/cnss/cnss_pci.c +++ b/drivers/net/wireless/cnss/cnss_pci.c @@ -3452,6 +3452,9 @@ int cnss_pm_runtime_request(struct device *dev, case CNSS_PM_REQUEST_RESUME: ret = pm_request_resume(dev); break; + case CNSS_PM_GET_NORESUME: + pm_runtime_get_noresume(dev); + break; default: ret = -EINVAL; break; diff --git a/drivers/pci/host/pci-msm.c b/drivers/pci/host/pci-msm.c index 3f186137e730..87f4b641201c 100644 --- a/drivers/pci/host/pci-msm.c +++ b/drivers/pci/host/pci-msm.c @@ -31,6 +31,7 @@ #include <linux/types.h> #include <linux/of_gpio.h> #include <linux/clk/msm-clk.h> +#include <linux/reset.h> #include <linux/msm-bus.h> #include <linux/msm-bus-board.h> #include <linux/debugfs.h> @@ -298,7 +299,7 @@ #define MAX_PROP_SIZE 32 #define MAX_RC_NAME_LEN 15 #define MSM_PCIE_MAX_VREG 4 -#define MSM_PCIE_MAX_CLK 13 +#define MSM_PCIE_MAX_CLK 9 #define MSM_PCIE_MAX_PIPE_CLK 1 #define MAX_RC_NUM 3 #define MAX_DEVICE_NUM 20 @@ -312,6 +313,9 @@ #define PCIE_CLEAR 0xDEADBEEF #define PCIE_LINK_DOWN 0xFFFFFFFF +#define MSM_PCIE_MAX_RESET 4 +#define MSM_PCIE_MAX_PIPE_RESET 1 + #define MSM_PCIE_MSI_PHY 0xa0000000 #define PCIE20_MSI_CTRL_ADDR (0x820) #define PCIE20_MSI_CTRL_UPPER_ADDR (0x824) @@ -496,6 +500,13 @@ struct msm_pcie_vreg_info_t { bool required; }; +/* reset info structure */ +struct msm_pcie_reset_info_t { + struct reset_control *hdl; + char *name; + bool required; +}; + /* clock info structure */ struct msm_pcie_clk_info_t { struct clk *hdl; @@ -552,6 +563,8 @@ struct msm_pcie_dev_t { struct msm_pcie_res_info_t res[MSM_PCIE_MAX_RES]; struct msm_pcie_irq_info_t irq[MSM_PCIE_MAX_IRQ]; struct msm_pcie_irq_info_t msi[MSM_PCIE_MAX_MSI]; + struct msm_pcie_reset_info_t reset[MSM_PCIE_MAX_RESET]; + struct msm_pcie_reset_info_t pipe_reset[MSM_PCIE_MAX_PIPE_RESET]; void __iomem *parf; void __iomem *phy; @@ -707,6 +720,43 @@ static struct msm_pcie_gpio_info_t msm_pcie_gpio_info[MSM_PCIE_MAX_GPIO] = { {"qcom,ep-gpio", 0, 1, 1, 0, 0} }; +/* resets */ +static struct msm_pcie_reset_info_t +msm_pcie_reset_info[MAX_RC_NUM][MSM_PCIE_MAX_RESET] = { + { + {NULL, "pcie_phy_reset", false}, + {NULL, "pcie_phy_com_reset", false}, + {NULL, "pcie_phy_nocsr_com_phy_reset", false}, + {NULL, "pcie_0_phy_reset", false} + }, + { + {NULL, "pcie_phy_reset", false}, + {NULL, "pcie_phy_com_reset", false}, + {NULL, "pcie_phy_nocsr_com_phy_reset", false}, + {NULL, "pcie_1_phy_reset", false} + }, + { + {NULL, "pcie_phy_reset", false}, + {NULL, "pcie_phy_com_reset", false}, + {NULL, "pcie_phy_nocsr_com_phy_reset", false}, + {NULL, "pcie_2_phy_reset", false} + } +}; + +/* pipe reset */ +static struct msm_pcie_reset_info_t +msm_pcie_pipe_reset_info[MAX_RC_NUM][MSM_PCIE_MAX_PIPE_RESET] = { + { + {NULL, "pcie_0_phy_pipe_reset", false} + }, + { + {NULL, "pcie_1_phy_pipe_reset", false} + }, + { + {NULL, "pcie_2_phy_pipe_reset", false} + } +}; + /* clocks */ static struct msm_pcie_clk_info_t msm_pcie_clk_info[MAX_RC_NUM][MSM_PCIE_MAX_CLK] = { @@ -719,11 +769,7 @@ static struct msm_pcie_clk_info_t {NULL, "pcie_0_ldo", 0, false, true}, {NULL, "pcie_0_smmu_clk", 0, false, false}, {NULL, "pcie_phy_cfg_ahb_clk", 0, false, false}, - {NULL, "pcie_phy_aux_clk", 0, false, false}, - {NULL, "pcie_phy_reset", 0, false, false}, - {NULL, "pcie_phy_com_reset", 0, false, false}, - {NULL, "pcie_phy_nocsr_com_phy_reset", 0, false, false}, - {NULL, "pcie_0_phy_reset", 0, false, true} + {NULL, "pcie_phy_aux_clk", 0, false, false} }, { {NULL, "pcie_1_ref_clk_src", 0, false, false}, @@ -734,11 +780,7 @@ static struct msm_pcie_clk_info_t {NULL, "pcie_1_ldo", 0, false, true}, {NULL, "pcie_1_smmu_clk", 0, false, false}, {NULL, "pcie_phy_cfg_ahb_clk", 0, false, false}, - {NULL, "pcie_phy_aux_clk", 0, false, false}, - {NULL, "pcie_phy_reset", 0, false, false}, - {NULL, "pcie_phy_com_reset", 0, false, false}, - {NULL, "pcie_phy_nocsr_com_phy_reset", 0, false, false}, - {NULL, "pcie_1_phy_reset", 0, false, true} + {NULL, "pcie_phy_aux_clk", 0, false, false} }, { {NULL, "pcie_2_ref_clk_src", 0, false, false}, @@ -749,11 +791,7 @@ static struct msm_pcie_clk_info_t {NULL, "pcie_2_ldo", 0, false, true}, {NULL, "pcie_2_smmu_clk", 0, false, false}, {NULL, "pcie_phy_cfg_ahb_clk", 0, false, false}, - {NULL, "pcie_phy_aux_clk", 0, false, false}, - {NULL, "pcie_phy_reset", 0, false, false}, - {NULL, "pcie_phy_com_reset", 0, false, false}, - {NULL, "pcie_phy_nocsr_com_phy_reset", 0, false, false}, - {NULL, "pcie_2_phy_reset", 0, false, true} + {NULL, "pcie_phy_aux_clk", 0, false, false} } }; @@ -3282,7 +3320,7 @@ static struct pci_ops msm_pcie_ops = { static int msm_pcie_gpio_init(struct msm_pcie_dev_t *dev) { - int rc, i; + int rc = 0, i; struct msm_pcie_gpio_info_t *info; PCIE_DBG(dev, "RC%d\n", dev->rc_idx); @@ -3431,6 +3469,7 @@ static int msm_pcie_clk_init(struct msm_pcie_dev_t *dev) { int i, rc = 0; struct msm_pcie_clk_info_t *info; + struct msm_pcie_reset_info_t *reset_info; PCIE_DBG(dev, "RC%d: entry\n", dev->rc_idx); @@ -3474,9 +3513,6 @@ static int msm_pcie_clk_init(struct msm_pcie_dev_t *dev) if (!info->hdl) continue; - if (i >= MSM_PCIE_MAX_CLK - (dev->common_phy ? 4 : 1)) - clk_reset(info->hdl, CLK_RESET_DEASSERT); - if (info->config_mem) msm_pcie_config_clock_mem(dev, info); @@ -3519,6 +3555,21 @@ static int msm_pcie_clk_init(struct msm_pcie_dev_t *dev) regulator_disable(dev->gdsc); } + for (i = 0; i < MSM_PCIE_MAX_RESET; i++) { + reset_info = &dev->reset[i]; + if (reset_info->hdl) { + rc = reset_control_deassert(reset_info->hdl); + if (rc) + PCIE_ERR(dev, + "PCIe: RC%d failed to deassert reset for %s.\n", + dev->rc_idx, reset_info->name); + else + PCIE_DBG2(dev, + "PCIe: RC%d successfully deasserted reset for %s.\n", + dev->rc_idx, reset_info->name); + } + } + PCIE_DBG(dev, "RC%d: exit\n", dev->rc_idx); return rc; @@ -3562,6 +3613,7 @@ static int msm_pcie_pipe_clk_init(struct msm_pcie_dev_t *dev) { int i, rc = 0; struct msm_pcie_clk_info_t *info; + struct msm_pcie_reset_info_t *pipe_reset_info; PCIE_DBG(dev, "RC%d: entry\n", dev->rc_idx); @@ -3571,7 +3623,6 @@ static int msm_pcie_pipe_clk_init(struct msm_pcie_dev_t *dev) if (!info->hdl) continue; - clk_reset(info->hdl, CLK_RESET_DEASSERT); if (info->config_mem) msm_pcie_config_clock_mem(dev, info); @@ -3608,6 +3659,22 @@ static int msm_pcie_pipe_clk_init(struct msm_pcie_dev_t *dev) clk_disable_unprepare(dev->pipeclk[i].hdl); } + for (i = 0; i < MSM_PCIE_MAX_PIPE_RESET; i++) { + pipe_reset_info = &dev->pipe_reset[i]; + if (pipe_reset_info->hdl) { + rc = reset_control_deassert( + pipe_reset_info->hdl); + if (rc) + PCIE_ERR(dev, + "PCIe: RC%d failed to deassert pipe reset for %s.\n", + dev->rc_idx, pipe_reset_info->name); + else + PCIE_DBG2(dev, + "PCIe: RC%d successfully deasserted pipe reset for %s.\n", + dev->rc_idx, pipe_reset_info->name); + } + } + PCIE_DBG(dev, "RC%d: exit\n", dev->rc_idx); return rc; @@ -3945,6 +4012,8 @@ static int msm_pcie_get_resources(struct msm_pcie_dev_t *dev, struct msm_pcie_res_info_t *res_info; struct msm_pcie_irq_info_t *irq_info; struct msm_pcie_irq_info_t *msi_info; + struct msm_pcie_reset_info_t *reset_info; + struct msm_pcie_reset_info_t *pipe_reset_info; char prop_name[MAX_PROP_SIZE]; const __be32 *prop; u32 *clkfreq = NULL; @@ -4161,6 +4230,54 @@ static int msm_pcie_get_resources(struct msm_pcie_dev_t *dev, } } + for (i = 0; i < MSM_PCIE_MAX_RESET; i++) { + reset_info = &dev->reset[i]; + + reset_info->hdl = devm_reset_control_get(&pdev->dev, + reset_info->name); + + if (IS_ERR(reset_info->hdl)) { + if (reset_info->required) { + PCIE_DBG(dev, + "Reset %s isn't available:%ld\n", + reset_info->name, + PTR_ERR(reset_info->hdl)); + + ret = PTR_ERR(reset_info->hdl); + reset_info->hdl = NULL; + goto out; + } else { + PCIE_DBG(dev, "Ignoring Reset %s\n", + reset_info->name); + reset_info->hdl = NULL; + } + } + } + + for (i = 0; i < MSM_PCIE_MAX_PIPE_RESET; i++) { + pipe_reset_info = &dev->pipe_reset[i]; + + pipe_reset_info->hdl = devm_reset_control_get(&pdev->dev, + pipe_reset_info->name); + + if (IS_ERR(pipe_reset_info->hdl)) { + if (pipe_reset_info->required) { + PCIE_DBG(dev, + "Pipe Reset %s isn't available:%ld\n", + pipe_reset_info->name, + PTR_ERR(pipe_reset_info->hdl)); + + ret = PTR_ERR(pipe_reset_info->hdl); + pipe_reset_info->hdl = NULL; + goto out; + } else { + PCIE_DBG(dev, "Ignoring Pipe Reset %s\n", + pipe_reset_info->name); + pipe_reset_info->hdl = NULL; + } + } + } + dev->bus_scale_table = msm_bus_cl_get_pdata(pdev); if (!dev->bus_scale_table) { PCIE_DBG(dev, "PCIe: No bus scale table for RC%d (%s)\n", @@ -6052,6 +6169,11 @@ static int msm_pcie_probe(struct platform_device *pdev) sizeof(msm_pcie_irq_info)); memcpy(msm_pcie_dev[rc_idx].msi, msm_pcie_msi_info, sizeof(msm_pcie_msi_info)); + memcpy(msm_pcie_dev[rc_idx].reset, msm_pcie_reset_info[rc_idx], + sizeof(msm_pcie_reset_info[rc_idx])); + memcpy(msm_pcie_dev[rc_idx].pipe_reset, + msm_pcie_pipe_reset_info[rc_idx], + sizeof(msm_pcie_pipe_reset_info[rc_idx])); msm_pcie_dev[rc_idx].shadow_en = true; for (i = 0; i < PCIE_CONF_SPACE_DW; i++) msm_pcie_dev[rc_idx].rc_shadow[i] = PCIE_CLEAR; diff --git a/drivers/phy/phy-qcom-ufs.c b/drivers/phy/phy-qcom-ufs.c index b2c58430785a..e0cab3a683d6 100644 --- a/drivers/phy/phy-qcom-ufs.c +++ b/drivers/phy/phy-qcom-ufs.c @@ -191,27 +191,20 @@ ufs_qcom_phy_init_clks(struct phy *generic_phy, struct ufs_qcom_phy *phy_common) { int err; - struct ufs_qcom_phy *phy = get_ufs_qcom_phy(generic_phy); - err = ufs_qcom_phy_clk_get(generic_phy, "tx_iface_clk", - &phy_common->tx_iface_clk); /* * tx_iface_clk does not exist in newer version of ufs-phy HW, * so don't return error if it is not found */ - if (err) - dev_dbg(phy->dev, "%s: failed to get tx_iface_clk\n", - __func__); + __ufs_qcom_phy_clk_get(generic_phy, "tx_iface_clk", + &phy_common->tx_iface_clk, false); - err = ufs_qcom_phy_clk_get(generic_phy, "rx_iface_clk", - &phy_common->rx_iface_clk); /* * rx_iface_clk does not exist in newer version of ufs-phy HW, * so don't return error if it is not found */ - if (err) - dev_dbg(phy->dev, "%s: failed to get rx_iface_clk\n", - __func__); + __ufs_qcom_phy_clk_get(generic_phy, "rx_iface_clk", + &phy_common->rx_iface_clk, false); err = ufs_qcom_phy_clk_get(generic_phy, "ref_clk_src", &phy_common->ref_clk_src); diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.c b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.c index d68a2ce3c041..bf8a5ade04bd 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.c @@ -111,6 +111,12 @@ static struct msg_desc ipa3_init_modem_driver_cmplt_resp_desc = { .ei_array = ipa3_init_modem_driver_cmplt_resp_msg_data_v01_ei, }; +static struct msg_desc ipa3_install_fltr_rule_req_ex_desc = { + .max_msg_len = QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01, + .msg_id = QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01, + .ei_array = ipa3_install_fltr_rule_req_ex_msg_data_v01_ei, +}; + static int ipa3_handle_indication_req(void *req_h, void *req) { struct ipa_indication_reg_req_msg_v01 *indication_req; @@ -299,6 +305,10 @@ static int ipa3_a5_svc_req_desc_cb(unsigned int msg_id, *req_desc = &ipa3_install_fltr_rule_req_desc; rc = sizeof(struct ipa_install_fltr_rule_req_msg_v01); break; + case QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01: + *req_desc = &ipa3_install_fltr_rule_req_ex_desc; + rc = sizeof(struct ipa_install_fltr_rule_req_ex_msg_v01); + break; case QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_V01: *req_desc = &ipa3_filter_installed_notif_req_desc; rc = sizeof(struct ipa_fltr_installed_notif_req_msg_v01); @@ -623,6 +633,49 @@ int ipa3_qmi_filter_request_send(struct ipa_install_fltr_rule_req_msg_v01 *req) resp.resp.error, "ipa_install_filter"); } +/* sending filter-install-request to modem*/ +int ipa3_qmi_filter_request_ex_send( + struct ipa_install_fltr_rule_req_ex_msg_v01 *req) +{ + struct ipa_install_fltr_rule_resp_ex_msg_v01 resp; + struct msg_desc req_desc, resp_desc; + int rc; + + /* check if the filter rules from IPACM is valid */ + if (req->filter_spec_ex_list_len == 0) { + IPAWANDBG("IPACM pass zero rules to Q6\n"); + } else { + IPAWANDBG("IPACM pass %u rules to Q6\n", + req->filter_spec_ex_list_len); + } + + /* cache the qmi_filter_request */ + memcpy(&(ipa3_qmi_ctx->ipa_install_fltr_rule_req_ex_msg_cache[ + ipa3_qmi_ctx->num_ipa_install_fltr_rule_req_ex_msg]), + req, sizeof(struct ipa_install_fltr_rule_req_ex_msg_v01)); + ipa3_qmi_ctx->num_ipa_install_fltr_rule_req_ex_msg++; + ipa3_qmi_ctx->num_ipa_install_fltr_rule_req_ex_msg %= 10; + + req_desc.max_msg_len = + QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01; + req_desc.msg_id = QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01; + req_desc.ei_array = ipa3_install_fltr_rule_req_ex_msg_data_v01_ei; + + memset(&resp, 0, sizeof(struct ipa_install_fltr_rule_resp_ex_msg_v01)); + resp_desc.max_msg_len = + QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_MAX_MSG_LEN_V01; + resp_desc.msg_id = QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_V01; + resp_desc.ei_array = ipa3_install_fltr_rule_resp_ex_msg_data_v01_ei; + + rc = qmi_send_req_wait(ipa_q6_clnt, &req_desc, + req, + sizeof(struct ipa_install_fltr_rule_req_ex_msg_v01), + &resp_desc, &resp, sizeof(resp), + QMI_SEND_REQ_TIMEOUT_MS); + return ipa3_check_qmi_response(rc, + QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01, resp.resp.result, + resp.resp.error, "ipa_install_filter"); +} int ipa3_qmi_enable_force_clear_datapath_send( struct ipa_enable_force_clear_datapath_req_msg_v01 *req) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.h b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.h index 0f641204cc77..e0126ec392c3 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.h +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service.h @@ -73,6 +73,9 @@ u32 q6_ul_filter_rule_hdl[MAX_NUM_Q6_RULE]; int num_ipa_install_fltr_rule_req_msg; struct ipa_install_fltr_rule_req_msg_v01 ipa_install_fltr_rule_req_msg_cache[MAX_NUM_QMI_RULE_CACHE]; +int num_ipa_install_fltr_rule_req_ex_msg; +struct ipa_install_fltr_rule_req_ex_msg_v01 + ipa_install_fltr_rule_req_ex_msg_cache[MAX_NUM_QMI_RULE_CACHE]; int num_ipa_fltr_installed_notif_req_msg; struct ipa_fltr_installed_notif_req_msg_v01 ipa_fltr_installed_notif_req_msg_cache[MAX_NUM_QMI_RULE_CACHE]; @@ -115,6 +118,8 @@ extern struct elem_info ipa3_stop_data_usage_quota_req_msg_data_v01_ei[]; extern struct elem_info ipa3_stop_data_usage_quota_resp_msg_data_v01_ei[]; extern struct elem_info ipa3_init_modem_driver_cmplt_req_msg_data_v01_ei[]; extern struct elem_info ipa3_init_modem_driver_cmplt_resp_msg_data_v01_ei[]; +extern struct elem_info ipa3_install_fltr_rule_req_ex_msg_data_v01_ei[]; +extern struct elem_info ipa3_install_fltr_rule_resp_ex_msg_data_v01_ei[]; /** * struct ipa3_rmnet_context - IPA rmnet context @@ -140,6 +145,9 @@ void ipa3_qmi_service_exit(void); int ipa3_qmi_filter_request_send( struct ipa_install_fltr_rule_req_msg_v01 *req); +int ipa3_qmi_filter_request_ex_send( + struct ipa_install_fltr_rule_req_ex_msg_v01 *req); + /* sending filter-installed-notify-request to modem*/ int ipa3_qmi_filter_notify_send(struct ipa_fltr_installed_notif_req_msg_v01 *req); @@ -209,6 +217,12 @@ static inline int ipa3_qmi_filter_request_send( return -EPERM; } +static inline int ipa3_qmi_filter_request_ex_send( + struct ipa_install_fltr_rule_req_ex_msg_v01 *req) +{ + return -EPERM; +} + /* sending filter-installed-notify-request to modem*/ static inline int ipa3_qmi_filter_notify_send( struct ipa_fltr_installed_notif_req_msg_v01 *req) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service_v01.c b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service_v01.c index 6907811c7ab6..6a5cb4891c02 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service_v01.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_qmi_service_v01.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -2744,3 +2744,182 @@ struct elem_info ipa3_stop_data_usage_quota_resp_msg_data_v01_ei[] = { .tlv_type = QMI_COMMON_TLV_TYPE, }, }; + +struct elem_info ipa3_install_fltr_rule_req_ex_msg_data_v01_ei[] = { + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + filter_spec_ex_list_valid), + }, + { + .data_type = QMI_DATA_LEN, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + filter_spec_ex_list_len), + }, + { + .data_type = QMI_STRUCT, + .elem_len = QMI_IPA_MAX_FILTERS_EX_V01, + .elem_size = sizeof(struct + ipa_filter_spec_ex_type_v01), + .is_array = VAR_LEN_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + filter_spec_ex_list), + .ei_array = ipa_filter_spec_ex_type_data_v01_ei, + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x11, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + source_pipe_index_valid), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = 1, + .elem_size = sizeof(uint32_t), + .is_array = NO_ARRAY, + .tlv_type = 0x11, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + source_pipe_index), + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x12, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + num_ipv4_filters_valid), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = 1, + .elem_size = sizeof(uint32_t), + .is_array = NO_ARRAY, + .tlv_type = 0x12, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + num_ipv4_filters), + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x13, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + num_ipv6_filters_valid), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = 1, + .elem_size = sizeof(uint32_t), + .is_array = NO_ARRAY, + .tlv_type = 0x13, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + num_ipv6_filters), + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x14, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + xlat_filter_indices_list_valid), + }, + { + .data_type = QMI_DATA_LEN, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x14, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + xlat_filter_indices_list_len), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = QMI_IPA_MAX_FILTERS_EX_V01, + .elem_size = sizeof(uint32_t), + .is_array = VAR_LEN_ARRAY, + .tlv_type = 0x14, + .offset = offsetof( + struct ipa_install_fltr_rule_req_ex_msg_v01, + xlat_filter_indices_list), + }, + { + .data_type = QMI_EOTI, + .is_array = NO_ARRAY, + .tlv_type = QMI_COMMON_TLV_TYPE, + }, +}; + +struct elem_info ipa3_install_fltr_rule_resp_ex_msg_data_v01_ei[] = { + { + .data_type = QMI_STRUCT, + .elem_len = 1, + .elem_size = sizeof(struct qmi_response_type_v01), + .is_array = NO_ARRAY, + .tlv_type = 0x02, + .offset = offsetof( + struct ipa_install_fltr_rule_resp_ex_msg_v01, + resp), + .ei_array = get_qmi_response_type_v01_ei(), + }, + { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_resp_ex_msg_v01, + rule_id_valid), + }, + { + .data_type = QMI_DATA_LEN, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_resp_ex_msg_v01, + rule_id_len), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = QMI_IPA_MAX_FILTERS_EX_V01, + .elem_size = sizeof(uint32_t), + .is_array = VAR_LEN_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct ipa_install_fltr_rule_resp_ex_msg_v01, + rule_id), + }, + { + .data_type = QMI_EOTI, + .is_array = NO_ARRAY, + .tlv_type = QMI_COMMON_TLV_TYPE, + }, +}; diff --git a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa_fd_ioctl.c b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa_fd_ioctl.c index 80b07ab79163..92636cba0f1c 100644 --- a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa_fd_ioctl.c +++ b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa_fd_ioctl.c @@ -97,6 +97,31 @@ static long ipa3_wan_ioctl(struct file *filp, } break; + case WAN_IOC_ADD_FLT_RULE_EX: + IPAWANDBG("device %s got WAN_IOC_ADD_FLT_RULE_EX :>>>\n", + DRIVER_NAME); + pyld_sz = sizeof(struct ipa_install_fltr_rule_req_ex_msg_v01); + param = kzalloc(pyld_sz, GFP_KERNEL); + if (!param) { + retval = -ENOMEM; + break; + } + if (copy_from_user(param, (u8 *)arg, pyld_sz)) { + retval = -EFAULT; + break; + } + if (ipa3_qmi_filter_request_ex_send( + (struct ipa_install_fltr_rule_req_ex_msg_v01 *)param)) { + IPAWANDBG("IPACM->Q6 add filter rule failed\n"); + retval = -EFAULT; + break; + } + if (copy_to_user((u8 *)arg, param, pyld_sz)) { + retval = -EFAULT; + break; + } + break; + case WAN_IOC_ADD_FLT_RULE_INDEX: IPAWANDBG("device %s got WAN_IOC_ADD_FLT_RULE_INDEX :>>>\n", DRIVER_NAME); diff --git a/drivers/power/qcom-charger/fg-memif.c b/drivers/power/qcom-charger/fg-memif.c index 087223d708da..c271b24adfc4 100644 --- a/drivers/power/qcom-charger/fg-memif.c +++ b/drivers/power/qcom-charger/fg-memif.c @@ -499,8 +499,10 @@ out: return rc; } - if (retry_once) + if (retry_once) { + retry_once = false; goto retry; + } return rc; } diff --git a/drivers/power/qcom-charger/qpnp-smb2.c b/drivers/power/qcom-charger/qpnp-smb2.c index a7dd0bfc66ad..7caa9548308a 100644 --- a/drivers/power/qcom-charger/qpnp-smb2.c +++ b/drivers/power/qcom-charger/qpnp-smb2.c @@ -392,7 +392,11 @@ static int smb2_usb_get_prop(struct power_supply *psy, rc = -EINVAL; break; } - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", psp, rc); + return -ENODATA; + } + return 0; } static int smb2_usb_set_prop(struct power_supply *psy, @@ -506,8 +510,11 @@ static int smb2_dc_get_prop(struct power_supply *psy, default: return -EINVAL; } - - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", psp, rc); + return -ENODATA; + } + return 0; } static int smb2_dc_set_prop(struct power_supply *psy, @@ -633,8 +640,11 @@ static int smb2_batt_get_prop(struct power_supply *psy, pr_err("batt power supply prop %d not supported\n", psp); return -EINVAL; } - - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", psp, rc); + return -ENODATA; + } + return 0; } static int smb2_batt_set_prop(struct power_supply *psy, diff --git a/drivers/power/qcom-charger/smb138x-charger.c b/drivers/power/qcom-charger/smb138x-charger.c index a77b0bbc193c..5b4e7bcccdce 100644 --- a/drivers/power/qcom-charger/smb138x-charger.c +++ b/drivers/power/qcom-charger/smb138x-charger.c @@ -184,8 +184,11 @@ static int smb138x_usb_get_prop(struct power_supply *psy, pr_err("get prop %d is not supported\n", prop); return -EINVAL; } - - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", prop, rc); + return -ENODATA; + } + return 0; } static int smb138x_usb_set_prop(struct power_supply *psy, @@ -305,12 +308,14 @@ static int smb138x_batt_get_prop(struct power_supply *psy, rc = smblib_get_prop_charger_temp_max(chg, val); break; default: - pr_err("batt power supply get prop %d not supported\n", - prop); + pr_err("batt power supply get prop %d not supported\n", prop); return -EINVAL; } - - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", prop, rc); + return -ENODATA; + } + return 0; } static int smb138x_batt_set_prop(struct power_supply *psy, @@ -436,8 +441,11 @@ static int smb138x_parallel_get_prop(struct power_supply *psy, prop); return -EINVAL; } - - return rc; + if (rc < 0) { + pr_debug("Couldn't get prop %d rc = %d\n", prop, rc); + return -ENODATA; + } + return 0; } static int smb138x_parallel_set_prop(struct power_supply *psy, diff --git a/drivers/regulator/cpr3-regulator.c b/drivers/regulator/cpr3-regulator.c index 232373092746..cd02debc37aa 100644 --- a/drivers/regulator/cpr3-regulator.c +++ b/drivers/regulator/cpr3-regulator.c @@ -3362,7 +3362,8 @@ static int cpr3_regulator_measure_aging(struct cpr3_controller *ctrl, if (rc) { cpr3_err(ctrl, "failed to clear CPR4 configuration,rc=%d\n", rc); - goto cleanup; + kfree(quot_delta_results); + return rc; } } diff --git a/drivers/soc/qcom/common_log.c b/drivers/soc/qcom/common_log.c index d2d877ef427b..f4c69d624342 100644 --- a/drivers/soc/qcom/common_log.c +++ b/drivers/soc/qcom/common_log.c @@ -23,7 +23,6 @@ #define PMIC_DUMP_DATA_LEN 4096 #define VSENSE_DUMP_DATA_LEN 4096 #define RPM_DUMP_DATA_LEN (160 * 1024) -#define SCAN_DUMP_DATA_LEN (256 * 1024) void register_misc_dump(void) { @@ -154,38 +153,6 @@ err0: } } -void register_scan_dump(void) -{ - static void *dump_addr; - int ret; - struct msm_dump_entry dump_entry; - struct msm_dump_data *dump_data; - - if (MSM_DUMP_MAJOR(msm_dump_table_version()) > 1) { - dump_data = kzalloc(sizeof(struct msm_dump_data), GFP_KERNEL); - if (!dump_data) - return; - dump_addr = kzalloc(SCAN_DUMP_DATA_LEN, GFP_KERNEL); - if (!dump_addr) - goto err0; - - dump_data->addr = virt_to_phys(dump_addr); - dump_data->len = SCAN_DUMP_DATA_LEN; - dump_entry.id = MSM_DUMP_DATA_SCANDUMP; - dump_entry.addr = virt_to_phys(dump_data); - ret = msm_dump_data_register(MSM_DUMP_TABLE_APPS, &dump_entry); - if (ret) { - pr_err("Registering scandump region failed\n"); - goto err1; - } - return; -err1: - kfree(dump_addr); -err0: - kfree(dump_data); - } -} - static void __init common_log_register_log_buf(void) { char **log_bufp; @@ -257,7 +224,6 @@ static int __init msm_common_log_init(void) register_pmic_dump(); register_vsense_dump(); register_rpm_dump(); - register_scan_dump(); return 0; } late_initcall(msm_common_log_init); diff --git a/drivers/soc/qcom/icnss.c b/drivers/soc/qcom/icnss.c index e56030e3b116..583856e6b3e1 100644 --- a/drivers/soc/qcom/icnss.c +++ b/drivers/soc/qcom/icnss.c @@ -43,11 +43,20 @@ #include <soc/qcom/subsystem_notif.h> #include <soc/qcom/service-locator.h> #include <soc/qcom/service-notifier.h> +#include <soc/qcom/socinfo.h> #include "wlan_firmware_service_v01.h" +#ifdef CONFIG_ICNSS_DEBUG +unsigned long qmi_timeout = 3000; +module_param(qmi_timeout, ulong, 0600); + +#define WLFW_TIMEOUT_MS qmi_timeout +#else #define WLFW_TIMEOUT_MS 3000 +#endif #define WLFW_SERVICE_INS_ID_V01 0 +#define WLFW_CLIENT_ID 0x4b4e454c #define MAX_PROP_SIZE 32 #define NUM_LOG_PAGES 10 #define NUM_REG_LOG_PAGES 4 @@ -1733,6 +1742,8 @@ static int wlfw_ind_register_send_sync_msg(void) memset(&req, 0, sizeof(req)); memset(&resp, 0, sizeof(resp)); + req.client_id_valid = 1; + req.client_id = WLFW_CLIENT_ID; req.fw_ready_enable_valid = 1; req.fw_ready_enable = 1; req.msa_ready_enable_valid = 1; @@ -3281,6 +3292,12 @@ int icnss_smmu_map(struct device *dev, } EXPORT_SYMBOL(icnss_smmu_map); +unsigned int icnss_socinfo_get_serial_number(struct device *dev) +{ + return socinfo_get_serial_number(); +} +EXPORT_SYMBOL(icnss_socinfo_get_serial_number); + static int icnss_bw_vote(struct icnss_priv *priv, int index) { int ret = 0; diff --git a/drivers/soc/qcom/ipc_router_glink_xprt.c b/drivers/soc/qcom/ipc_router_glink_xprt.c index 791221971e1c..1f36dd0ba07e 100644 --- a/drivers/soc/qcom/ipc_router_glink_xprt.c +++ b/drivers/soc/qcom/ipc_router_glink_xprt.c @@ -43,8 +43,14 @@ if (ipc_router_glink_xprt_debug_mask) \ #define MIN_FRAG_SZ (IPC_ROUTER_HDR_SIZE + sizeof(union rr_control_msg)) #define IPC_RTR_XPRT_NAME_LEN (2 * GLINK_NAME_SIZE) #define PIL_SUBSYSTEM_NAME_LEN 32 -#define DEFAULT_NUM_INTENTS 5 -#define DEFAULT_RX_INTENT_SIZE 2048 + +#define MAX_NUM_LO_INTENTS 5 +#define MAX_NUM_MD_INTENTS 3 +#define MAX_NUM_HI_INTENTS 2 +#define LO_RX_INTENT_SIZE 2048 +#define MD_RX_INTENT_SIZE 8192 +#define HI_RX_INTENT_SIZE (17 * 1024) + /** * ipc_router_glink_xprt - IPC Router's GLINK XPRT structure * @list: IPC router's GLINK XPRT list. @@ -82,6 +88,9 @@ struct ipc_router_glink_xprt { unsigned xprt_version; unsigned xprt_option; bool disable_pil_loading; + uint32_t cur_lo_intents_cnt; + uint32_t cur_md_intents_cnt; + uint32_t cur_hi_intents_cnt; }; struct ipc_router_glink_xprt_work { @@ -340,7 +349,7 @@ static void glink_xprt_read_data(struct work_struct *work) } D("%s %zu bytes @ %p\n", __func__, rx_work->iovec_size, rx_work->iovec); - if (rx_work->iovec_size <= DEFAULT_RX_INTENT_SIZE) + if (rx_work->iovec_size <= HI_RX_INTENT_SIZE) reuse_intent = true; pkt = glink_xprt_copy_data(rx_work); @@ -369,9 +378,14 @@ static void glink_xprt_open_event(struct work_struct *work) IPC_ROUTER_XPRT_EVENT_OPEN, NULL); D("%s: Notified IPC Router of %s OPEN\n", __func__, glink_xprtp->xprt.name); - for (i = 0; i < DEFAULT_NUM_INTENTS; i++) + glink_xprtp->cur_lo_intents_cnt = 0; + glink_xprtp->cur_md_intents_cnt = 0; + glink_xprtp->cur_hi_intents_cnt = 0; + for (i = 0; i < MAX_NUM_LO_INTENTS; i++) { glink_queue_rx_intent(glink_xprtp->ch_hndl, (void *)glink_xprtp, - DEFAULT_RX_INTENT_SIZE); + LO_RX_INTENT_SIZE); + glink_xprtp->cur_lo_intents_cnt++; + } kfree(xprt_work); } @@ -392,13 +406,32 @@ static void glink_xprt_close_event(struct work_struct *work) static void glink_xprt_qrx_intent_worker(struct work_struct *work) { + size_t sz; struct queue_rx_intent_work *qrx_intent_work = container_of(work, struct queue_rx_intent_work, work); struct ipc_router_glink_xprt *glink_xprtp = qrx_intent_work->glink_xprtp; + uint32_t *cnt = NULL; + int ret; + + sz = qrx_intent_work->intent_size; + if (sz <= MD_RX_INTENT_SIZE) { + if (glink_xprtp->cur_md_intents_cnt >= MAX_NUM_MD_INTENTS) + goto qrx_intent_worker_out; + sz = MD_RX_INTENT_SIZE; + cnt = &glink_xprtp->cur_md_intents_cnt; + } else if (sz <= HI_RX_INTENT_SIZE) { + if (glink_xprtp->cur_hi_intents_cnt >= MAX_NUM_HI_INTENTS) + goto qrx_intent_worker_out; + sz = HI_RX_INTENT_SIZE; + cnt = &glink_xprtp->cur_hi_intents_cnt; + } - glink_queue_rx_intent(glink_xprtp->ch_hndl, (void *)glink_xprtp, - qrx_intent_work->intent_size); + ret = glink_queue_rx_intent(glink_xprtp->ch_hndl, (void *)glink_xprtp, + sz); + if (!ret && cnt) + (*cnt)++; +qrx_intent_worker_out: kfree(qrx_intent_work); } @@ -468,7 +501,7 @@ static bool glink_xprt_notify_rx_intent_req(void *handle, const void *priv, struct ipc_router_glink_xprt *glink_xprtp = (struct ipc_router_glink_xprt *)priv; - if (sz <= DEFAULT_RX_INTENT_SIZE) + if (sz <= LO_RX_INTENT_SIZE) return true; qrx_intent_work = kmalloc(sizeof(struct queue_rx_intent_work), diff --git a/drivers/soc/qcom/memshare/msm_memshare.c b/drivers/soc/qcom/memshare/msm_memshare.c index e1e91f56526d..00cc5e12709b 100644 --- a/drivers/soc/qcom/memshare/msm_memshare.c +++ b/drivers/soc/qcom/memshare/msm_memshare.c @@ -26,6 +26,7 @@ #include "heap_mem_ext_v01.h" #include <soc/qcom/secure_buffer.h> +#include <soc/qcom/ramdump.h> /* Macros */ #define MEMSHARE_DEV_NAME "memshare" @@ -37,6 +38,7 @@ static void mem_share_svc_recv_msg(struct work_struct *work); static DECLARE_DELAYED_WORK(work_recv_msg, mem_share_svc_recv_msg); static struct workqueue_struct *mem_share_svc_workqueue; static uint64_t bootup_request; +static void *memshare_ramdump_dev[MAX_CLIENTS]; /* Memshare Driver Structure */ struct memshare_driver { @@ -114,9 +116,51 @@ static struct msg_desc mem_share_svc_size_query_resp_desc = { .ei_array = mem_query_size_resp_msg_data_v01_ei, }; +/* + * This API creates ramdump dev handlers + * for each of the memshare clients. + * These dev handlers will be used for + * extracting the ramdump for loaned memory + * segments. + */ + +static int mem_share_configure_ramdump(void) +{ + char client_name[18] = "memshare_"; + char *clnt = NULL; + + switch (num_clients) { + case 0: + clnt = "GPS"; + break; + case 1: + clnt = "FTM"; + break; + case 2: + clnt = "DIAG"; + break; + default: + pr_info("memshare: no memshare clients registered\n"); + return -EINVAL; + } + + snprintf(client_name, 18, "memshare_%s", clnt); + + memshare_ramdump_dev[num_clients] = create_ramdump_device(client_name, + NULL); + if (IS_ERR_OR_NULL(memshare_ramdump_dev[num_clients])) { + pr_err("memshare: %s: Unable to create memshare ramdump device.\n", + __func__); + memshare_ramdump_dev[num_clients] = NULL; + return -ENOMEM; + } + + return 0; +} + static int check_client(int client_id, int proc, int request) { - int i = 0; + int i = 0, rc; int found = DHMS_MEM_CLIENT_INVALID; for (i = 0; i < MAX_CLIENTS; i++) { @@ -127,7 +171,7 @@ static int check_client(int client_id, int proc, int request) } } if ((found == DHMS_MEM_CLIENT_INVALID) && !request) { - pr_debug("No registered client, adding a new client\n"); + pr_debug("memshare: No registered client, adding a new client\n"); /* Add a new client */ for (i = 0; i < MAX_CLIENTS; i++) { if (memblock[i].client_id == DHMS_MEM_CLIENT_INVALID) { @@ -136,6 +180,16 @@ static int check_client(int client_id, int proc, int request) memblock[i].guarantee = 0; memblock[i].peripheral = proc; found = i; + + if (!memblock[i].file_created) { + rc = mem_share_configure_ramdump(); + if (rc) + pr_err("In %s, Cannot create ramdump for client: %d\n", + __func__, client_id); + else + memblock[i].file_created = 1; + } + break; } } @@ -190,10 +244,75 @@ void initialize_client(void) memblock[i].memory_type = MEMORY_CMA; memblock[i].free_memory = 0; memblock[i].hyp_mapping = 0; + memblock[i].file_created = 0; } dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); } +/* + * This API initializes the ramdump segments + * with the physical address and size of + * the memshared clients. Extraction of ramdump + * is skipped if memshare client is not alloted + * This calls the ramdump api in extracting the + * ramdump in elf format. + */ + +static int mem_share_do_ramdump(void) +{ + int i = 0, ret; + char *client_name = NULL; + + for (i = 0; i < num_clients; i++) { + + struct ramdump_segment *ramdump_segments_tmp = NULL; + + switch (i) { + case 0: + client_name = "GPS"; + break; + case 1: + client_name = "FTM"; + break; + case 2: + client_name = "DIAG"; + break; + default: + pr_info("memshare: no memshare clients registered\n"); + break; + } + + if (!memblock[i].alloted) { + pr_err("memshare:%s memblock is not alloted\n", + client_name); + continue; + } + + ramdump_segments_tmp = kcalloc(1, + sizeof(struct ramdump_segment), + GFP_KERNEL); + if (!ramdump_segments_tmp) + return -ENOMEM; + + ramdump_segments_tmp[0].size = memblock[i].size; + ramdump_segments_tmp[0].address = memblock[i].phy_addr; + + pr_debug("memshare: %s:%s client:phy_address = %llx, size = %d\n", + __func__, client_name, + (unsigned long long) memblock[i].phy_addr, memblock[i].size); + + ret = do_elf_ramdump(memshare_ramdump_dev[i], + ramdump_segments_tmp, 1); + if (ret < 0) { + pr_err("memshare: Unable to dump: %d\n", ret); + kfree(ramdump_segments_tmp); + return ret; + } + kfree(ramdump_segments_tmp); + } + return 0; +} + static int modem_notifier_cb(struct notifier_block *this, unsigned long code, void *_cmd) { @@ -202,8 +321,10 @@ static int modem_notifier_cb(struct notifier_block *this, unsigned long code, u32 source_vmlist[2] = {VMID_HLOS, VMID_MSS_MSA}; int dest_vmids[1] = {VMID_HLOS}; int dest_perms[1] = {PERM_READ|PERM_WRITE}; + struct notif_data *notifdata = NULL; mutex_lock(&memsh_drv->mem_share); + switch (code) { case SUBSYS_BEFORE_SHUTDOWN: @@ -260,6 +381,22 @@ static int modem_notifier_cb(struct notifier_block *this, unsigned long code, bootup_request++; break; + case SUBSYS_RAMDUMP_NOTIFICATION: + if (_cmd) + notifdata = (struct notif_data *) _cmd; + else + break; + + if (!(notifdata->enable_ramdump)) { + pr_info("In %s, Ramdump collection is disabled\n", + __func__); + } else { + ret = mem_share_do_ramdump(); + if (ret) + pr_err("Ramdump collection failed\n"); + } + break; + default: pr_debug("Memshare: code: %lu\n", code); break; @@ -800,6 +937,9 @@ static int memshare_child_probe(struct platform_device *pdev) memblock[num_clients].size = size; memblock[num_clients].client_id = client_id; + /* + * Memshare allocation for guaranteed clients + */ if (memblock[num_clients].guarantee) { rc = memshare_alloc(memsh_child->dev, memblock[num_clients].size, @@ -812,6 +952,21 @@ static int memshare_child_probe(struct platform_device *pdev) memblock[num_clients].alloted = 1; } + /* + * call for creating ramdump dev handlers for + * memshare clients + */ + + if (!memblock[num_clients].file_created) { + rc = mem_share_configure_ramdump(); + if (rc) + pr_err("In %s, cannot collect dumps for client id: %d\n", + __func__, + memblock[num_clients].client_id); + else + memblock[num_clients].file_created = 1; + } + num_clients++; return 0; diff --git a/drivers/soc/qcom/memshare/msm_memshare.h b/drivers/soc/qcom/memshare/msm_memshare.h index 68a143907976..398907532977 100644 --- a/drivers/soc/qcom/memshare/msm_memshare.h +++ b/drivers/soc/qcom/memshare/msm_memshare.h @@ -51,6 +51,9 @@ struct mem_blocks { uint8_t free_memory; /* Need Hypervisor mapping*/ uint8_t hyp_mapping; + /* Status flag which checks if ramdump file is created*/ + int file_created; + }; int memshare_alloc(struct device *dev, diff --git a/drivers/soc/qcom/service-notifier.c b/drivers/soc/qcom/service-notifier.c index 81dde8ca1ae8..981f78491ecf 100644 --- a/drivers/soc/qcom/service-notifier.c +++ b/drivers/soc/qcom/service-notifier.c @@ -386,7 +386,8 @@ static void root_service_service_arrive(struct work_struct *work) mutex_unlock(¬if_add_lock); } -static void root_service_service_exit(struct qmi_client_info *data) +static void root_service_service_exit(struct qmi_client_info *data, + enum pd_subsys_state state) { struct service_notif_info *service_notif = NULL; int rc; @@ -401,7 +402,7 @@ static void root_service_service_exit(struct qmi_client_info *data) if (service_notif->instance_id == data->instance_id) { rc = service_notif_queue_notification(service_notif, SERVREG_NOTIF_SERVICE_STATE_DOWN_V01, - NULL); + &state); if (rc & NOTIFY_STOP_MASK) pr_err("Notifier callback aborted for %s with error %d\n", service_notif->service_path, rc); @@ -425,7 +426,7 @@ static void root_service_exit_work(struct work_struct *work) { struct qmi_client_info *data = container_of(work, struct qmi_client_info, svc_exit); - root_service_service_exit(data); + root_service_service_exit(data, UNKNOWN); } static int service_event_notify(struct notifier_block *this, @@ -456,10 +457,15 @@ static int ssr_event_notify(struct notifier_block *this, { struct qmi_client_info *info = container_of(this, struct qmi_client_info, ssr_notifier); + struct notif_data *notif = data; switch (code) { case SUBSYS_BEFORE_SHUTDOWN: - pr_debug("Root PD service Down (SSR notification)\n"); - root_service_service_exit(info); + pr_debug("Root PD DOWN(SSR notification), crashed?%d\n", + notif->crashed); + if (notif->crashed) + root_service_service_exit(info, CRASHED); + else + root_service_service_exit(info, SHUTDOWN); break; default: break; diff --git a/drivers/soc/qcom/spss_utils.c b/drivers/soc/qcom/spss_utils.c index 9f799dfd9003..e54819b4837b 100644 --- a/drivers/soc/qcom/spss_utils.c +++ b/drivers/soc/qcom/spss_utils.c @@ -97,9 +97,9 @@ static ssize_t test_fuse_state_show(struct device *dev, } if (is_test_fuse_set) - ret = snprintf(buf, PAGE_SIZE, "%s\n", "test"); + ret = snprintf(buf, PAGE_SIZE, "%s", "test"); else - ret = snprintf(buf, PAGE_SIZE, "%s\n", "prod"); + ret = snprintf(buf, PAGE_SIZE, "%s", "prod"); return ret; } @@ -280,7 +280,7 @@ static int __init spss_init(void) { int ret = 0; - pr_info("spss-utils driver Ver 1.0 12-Sep-2016.\n"); + pr_info("spss-utils driver Ver 1.1 18-Sep-2016.\n"); ret = platform_driver_register(&spss_driver); if (ret) diff --git a/drivers/soc/qcom/subsys-pil-tz.c b/drivers/soc/qcom/subsys-pil-tz.c index 6a1a87ead6e4..ae175e176aa3 100644 --- a/drivers/soc/qcom/subsys-pil-tz.c +++ b/drivers/soc/qcom/subsys-pil-tz.c @@ -518,8 +518,7 @@ err: static void disable_unprepare_clocks(struct clk **clks, int clk_count) { int i; - - for (i = 0; i < clk_count; i++) + for (i = --clk_count; i >= 0; i--) clk_disable_unprepare(clks[i]); } diff --git a/drivers/soc/qcom/subsystem_restart.c b/drivers/soc/qcom/subsystem_restart.c index 76d941ceb77e..015e60ac622c 100644 --- a/drivers/soc/qcom/subsystem_restart.c +++ b/drivers/soc/qcom/subsystem_restart.c @@ -572,25 +572,6 @@ static void disable_all_irqs(struct subsys_device *dev) } } -int wait_for_shutdown_ack(struct subsys_desc *desc) -{ - int count; - - if (desc && !desc->shutdown_ack_gpio) - return 0; - - for (count = SHUTDOWN_ACK_MAX_LOOPS; count > 0; count--) { - if (gpio_get_value(desc->shutdown_ack_gpio)) - return count; - msleep(SHUTDOWN_ACK_DELAY_MS); - } - - pr_err("[%s]: Timed out waiting for shutdown ack\n", desc->name); - - return -ETIMEDOUT; -} -EXPORT_SYMBOL(wait_for_shutdown_ack); - static int wait_for_err_ready(struct subsys_device *subsys) { int ret; @@ -730,6 +711,7 @@ static void subsys_stop(struct subsys_device *subsys) { const char *name = subsys->desc->name; + notify_each_subsys_device(&subsys, 1, SUBSYS_BEFORE_SHUTDOWN, NULL); if (!of_property_read_bool(subsys->desc->dev->of_node, "qcom,pil-force-shutdown")) { subsys_set_state(subsys, SUBSYS_OFFLINING); @@ -739,7 +721,6 @@ static void subsys_stop(struct subsys_device *subsys) pr_debug("Graceful shutdown failed for %s\n", name); } - notify_each_subsys_device(&subsys, 1, SUBSYS_BEFORE_SHUTDOWN, NULL); subsys->desc->shutdown(subsys->desc, false); subsys_set_state(subsys, SUBSYS_OFFLINE); disable_all_irqs(subsys); @@ -768,6 +749,31 @@ int subsystem_set_fwname(const char *name, const char *fw_name) } EXPORT_SYMBOL(subsystem_set_fwname); +int wait_for_shutdown_ack(struct subsys_desc *desc) +{ + int count; + struct subsys_device *dev; + + if (!desc || !desc->shutdown_ack_gpio) + return 0; + + dev = find_subsys(desc->name); + if (!dev) + return 0; + + for (count = SHUTDOWN_ACK_MAX_LOOPS; count > 0; count--) { + if (gpio_get_value(desc->shutdown_ack_gpio)) + return count; + else if (subsys_get_crash_status(dev)) + break; + msleep(SHUTDOWN_ACK_DELAY_MS); + } + + pr_err("[%s]: Timed out waiting for shutdown ack\n", desc->name); + return -ETIMEDOUT; +} +EXPORT_SYMBOL(wait_for_shutdown_ack); + void *__subsystem_get(const char *name, const char *fw_name) { struct subsys_device *subsys; diff --git a/drivers/soc/qcom/watchdog_v2.c b/drivers/soc/qcom/watchdog_v2.c index 65eda2de9586..aa20705b9adc 100644 --- a/drivers/soc/qcom/watchdog_v2.c +++ b/drivers/soc/qcom/watchdog_v2.c @@ -90,6 +90,7 @@ struct msm_watchdog_data { bool timer_expired; bool user_pet_complete; + unsigned int scandump_size; }; /* @@ -501,6 +502,39 @@ static irqreturn_t wdog_ppi_bark(int irq, void *dev_id) return wdog_bark_handler(irq, wdog_dd); } +void register_scan_dump(struct msm_watchdog_data *wdog_dd) +{ + static void *dump_addr; + int ret; + struct msm_dump_entry dump_entry; + struct msm_dump_data *dump_data; + + if (!wdog_dd->scandump_size) + return; + + dump_data = kzalloc(sizeof(struct msm_dump_data), GFP_KERNEL); + if (!dump_data) + return; + dump_addr = kzalloc(wdog_dd->scandump_size, GFP_KERNEL); + if (!dump_addr) + goto err0; + + dump_data->addr = virt_to_phys(dump_addr); + dump_data->len = wdog_dd->scandump_size; + dump_entry.id = MSM_DUMP_DATA_SCANDUMP; + dump_entry.addr = virt_to_phys(dump_data); + ret = msm_dump_data_register(MSM_DUMP_TABLE_APPS, &dump_entry); + if (ret) { + pr_err("Registering scandump region failed\n"); + goto err1; + } + return; +err1: + kfree(dump_addr); +err0: + kfree(dump_data); +} + static void configure_bark_dump(struct msm_watchdog_data *wdog_dd) { int ret; @@ -582,6 +616,8 @@ static void configure_bark_dump(struct msm_watchdog_data *wdog_dd) if (ret) pr_err("cpu %d reg dump setup failed\n", cpu); } + + register_scan_dump(wdog_dd); } return; @@ -770,6 +806,11 @@ static int msm_wdog_dt_to_pdata(struct platform_device *pdev, pdata->wakeup_irq_enable = of_property_read_bool(node, "qcom,wakeup-enable"); + if (of_property_read_u32(node, "qcom,scandump-size", + &pdata->scandump_size)) + dev_info(&pdev->dev, + "No need to allocate memory for scandumps\n"); + pdata->irq_ppi = irq_is_percpu(pdata->bark_irq); dump_pdata(pdata); return 0; diff --git a/drivers/soc/qcom/wlan_firmware_service_v01.c b/drivers/soc/qcom/wlan_firmware_service_v01.c index b40e0671c691..f5f7ae8c9901 100644 --- a/drivers/soc/qcom/wlan_firmware_service_v01.c +++ b/drivers/soc/qcom/wlan_firmware_service_v01.c @@ -343,6 +343,24 @@ struct elem_info wlfw_ind_register_req_msg_v01_ei[] = { pin_connect_result_enable), }, { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x15, + .offset = offsetof(struct wlfw_ind_register_req_msg_v01, + client_id_valid), + }, + { + .data_type = QMI_UNSIGNED_4_BYTE, + .elem_len = 1, + .elem_size = sizeof(uint32_t), + .is_array = NO_ARRAY, + .tlv_type = 0x15, + .offset = offsetof(struct wlfw_ind_register_req_msg_v01, + client_id), + }, + { .data_type = QMI_EOTI, .is_array = NO_ARRAY, .is_array = QMI_COMMON_TLV_TYPE, @@ -361,6 +379,26 @@ struct elem_info wlfw_ind_register_resp_msg_v01_ei[] = { .ei_array = get_qmi_response_type_v01_ei(), }, { + .data_type = QMI_OPT_FLAG, + .elem_len = 1, + .elem_size = sizeof(uint8_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct wlfw_ind_register_resp_msg_v01, + fw_status_valid), + }, + { + .data_type = QMI_UNSIGNED_8_BYTE, + .elem_len = 1, + .elem_size = sizeof(uint64_t), + .is_array = NO_ARRAY, + .tlv_type = 0x10, + .offset = offsetof( + struct wlfw_ind_register_resp_msg_v01, + fw_status), + }, + { .data_type = QMI_EOTI, .is_array = NO_ARRAY, .is_array = QMI_COMMON_TLV_TYPE, diff --git a/drivers/soc/qcom/wlan_firmware_service_v01.h b/drivers/soc/qcom/wlan_firmware_service_v01.h index b994762db7af..29bdfb23480a 100644 --- a/drivers/soc/qcom/wlan_firmware_service_v01.h +++ b/drivers/soc/qcom/wlan_firmware_service_v01.h @@ -97,6 +97,9 @@ enum wlfw_pipedir_enum_v01 { #define QMI_WLFW_CE_ATTR_DISABLE_INTR_V01 ((uint32_t)0x08) #define QMI_WLFW_CE_ATTR_ENABLE_POLL_V01 ((uint32_t)0x10) +#define QMI_WLFW_ALREADY_REGISTERED_V01 ((uint64_t)0x01ULL) +#define QMI_WLFW_FW_READY_V01 ((uint64_t)0x02ULL) + struct wlfw_ce_tgt_pipe_cfg_s_v01 { uint32_t pipe_num; enum wlfw_pipedir_enum_v01 pipe_dir; @@ -151,14 +154,18 @@ struct wlfw_ind_register_req_msg_v01 { uint8_t msa_ready_enable; uint8_t pin_connect_result_enable_valid; uint8_t pin_connect_result_enable; + uint8_t client_id_valid; + uint32_t client_id; }; -#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 20 +#define WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN 27 extern struct elem_info wlfw_ind_register_req_msg_v01_ei[]; struct wlfw_ind_register_resp_msg_v01 { struct qmi_response_type_v01 resp; + uint8_t fw_status_valid; + uint64_t fw_status; }; -#define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 7 +#define WLFW_IND_REGISTER_RESP_MSG_V01_MAX_MSG_LEN 18 extern struct elem_info wlfw_ind_register_resp_msg_v01_ei[]; struct wlfw_fw_ready_ind_msg_v01 { diff --git a/drivers/soundwire/swr-wcd-ctrl.c b/drivers/soundwire/swr-wcd-ctrl.c index 266091486bf1..424ad7c57b43 100644 --- a/drivers/soundwire/swr-wcd-ctrl.c +++ b/drivers/soundwire/swr-wcd-ctrl.c @@ -61,6 +61,10 @@ struct usecase uc[] = { {6, 14, 6600}, /* UC11: 2*(Spkr + Comp + SB) */ {2, 3, 2700}, /* UC12: Spkr + SB */ {4, 6, 5400}, /* UC13: 2*(Spkr + SB) */ + {3, 5, 3900}, /* UC14: Spkr + SB + VI */ + {6, 10, 7800}, /* UC15: 2*(Spkr + SB + VI) */ + {2, 3, 3600}, /* UC16: Spkr + VI */ + {4, 6, 7200}, /* UC17: 2*(Spkr + VI) */ }; #define MAX_USECASE ARRAY_SIZE(uc) @@ -148,6 +152,33 @@ struct port_params pp[MAX_USECASE][SWR_MSTR_PORT_LEN] = { {7, 6, 0}, {63, 13, 31}, }, + /* UC 14 */ + { + {7, 1, 0}, + {63, 12, 31}, + {15, 7, 0}, + }, + /* UC 15 */ + { + {7, 1, 0}, + {63, 12, 31}, + {15, 7, 0}, + {7, 6, 0}, + {63, 13, 31}, + {15, 10, 0}, + }, + /* UC 16 */ + { + {7, 1, 0}, + {15, 7, 0}, + }, + /* UC 17 */ + { + {7, 1, 0}, + {15, 7, 0}, + {7, 6, 0}, + {15, 10, 0}, + }, }; enum { diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c index 51dce6d43890..fa3c9e511663 100644 --- a/drivers/tty/serial/msm_serial_hs.c +++ b/drivers/tty/serial/msm_serial_hs.c @@ -2213,12 +2213,12 @@ void enable_wakeup_interrupt(struct msm_hs_port *msm_uport) return; if (!(msm_uport->wakeup.enabled)) { - enable_irq(msm_uport->wakeup.irq); - disable_irq(uport->irq); spin_lock_irqsave(&uport->lock, flags); msm_uport->wakeup.ignore = 1; msm_uport->wakeup.enabled = true; spin_unlock_irqrestore(&uport->lock, flags); + disable_irq(uport->irq); + enable_irq(msm_uport->wakeup.irq); } else { MSM_HS_WARN("%s:Wake up IRQ already enabled", __func__); } diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index 5381a728d23e..e5139402e7f8 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c @@ -133,6 +133,12 @@ static void sysrq_handle_crash(int key) { char *killer = NULL; + /* we need to release the RCU read lock here, + * otherwise we get an annoying + * 'BUG: sleeping function called from invalid context' + * complaint from the kernel before the panic. + */ + rcu_read_unlock(); panic_on_oops = 1; /* force panic */ wmb(); *killer = 1; diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 7585c603cb3d..9fb05bbf3e74 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -155,6 +155,7 @@ static int dwc3_init_usb_phys(struct dwc3 *dwc) static int dwc3_core_reset(struct dwc3 *dwc) { int ret; + u32 reg; /* Reset PHYs */ usb_phy_reset(dwc->usb2_phy); @@ -168,6 +169,10 @@ static int dwc3_core_reset(struct dwc3 *dwc) return ret; } + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + reg &= ~DWC3_GUSB3PIPECTL_DELAYP1TRANS; + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT); dwc3_notify_event(dwc, DWC3_CONTROLLER_POST_RESET_EVENT); diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a798c4fa8812..4ad994972b19 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -1233,20 +1233,6 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) list_add_tail(&req->list, &dep->request_list); /* - * If there are no pending requests and the endpoint isn't already - * busy, we will just start the request straight away. - * - * This will save one IRQ (XFER_NOT_READY) and possibly make it a - * little bit faster. - */ - if (!usb_endpoint_xfer_isoc(dep->endpoint.desc) && - !usb_endpoint_xfer_int(dep->endpoint.desc) && - !(dep->flags & DWC3_EP_BUSY)) { - ret = __dwc3_gadget_kick_transfer(dep, 0, true); - goto out; - } - - /* * There are a few special cases: * * 1. XferNotReady with empty list of requests. We need to kick the @@ -2529,14 +2515,6 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc, dwc->u1u2 = 0; } - - if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) { - int ret; - - ret = __dwc3_gadget_kick_transfer(dep, 0, is_xfer_complete); - if (!ret || ret == -EBUSY) - return; - } } static void dwc3_endpoint_interrupt(struct dwc3 *dwc, @@ -2585,16 +2563,23 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) { dwc3_gadget_start_isoc(dwc, dep, event); } else { - int active; int ret; - active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE; - dwc3_trace(trace_dwc3_gadget, "%s: reason %s", - dep->name, active ? "Transfer Active" + dep->name, event->status & + DEPEVT_STATUS_TRANSFER_ACTIVE + ? "Transfer Active" : "Transfer Not Active"); - ret = __dwc3_gadget_kick_transfer(dep, 0, !active); + /* + * If XFERNOTREADY interrupt is received with event + * status as TRANSFER ACTIVE, don't kick next transfer. + * otherwise data stall is seen on that endpoint. + */ + if (event->status & DEPEVT_STATUS_TRANSFER_ACTIVE) + return; + + ret = __dwc3_gadget_kick_transfer(dep, 0, 1); if (!ret || ret == -EBUSY) return; diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index a99405261306..a480b0a9a238 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -35,9 +35,10 @@ (speed == USB_SPEED_SUPER ?\ SSUSB_GADGET_VBUS_DRAW : CONFIG_USB_GADGET_VBUS_DRAW) -static bool enable_l1_for_hs; -module_param(enable_l1_for_hs, bool, S_IRUGO | S_IWUSR); -MODULE_PARM_DESC(enable_l1_for_hs, "Enable support for L1 LPM for HS devices"); +static bool disable_l1_for_hs; +module_param(disable_l1_for_hs, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(disable_l1_for_hs, + "Disable support for L1 LPM for HS devices"); /** * struct usb_os_string - represents OS String to be reported by a gadget @@ -1637,13 +1638,12 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) if (gadget->speed >= USB_SPEED_SUPER) { cdev->desc.bcdUSB = cpu_to_le16(0x0310); cdev->desc.bMaxPacketSize0 = 9; - } else if (gadget->l1_supported || - enable_l1_for_hs) { + } else if (!disable_l1_for_hs) { cdev->desc.bcdUSB = cpu_to_le16(0x0210); DBG(cdev, "Config HS device with LPM(L1)\n"); } - } else if (gadget->l1_supported) { + } else if (!disable_l1_for_hs) { cdev->desc.bcdUSB = cpu_to_le16(0x0210); DBG(cdev, "Config HS device with LPM(L1)\n"); } @@ -1678,7 +1678,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) case USB_DT_BOS: if ((gadget_is_superspeed(gadget) && (gadget->speed >= USB_SPEED_SUPER)) - || gadget->l1_supported) { + || !disable_l1_for_hs) { value = bos_desc(cdev); value = min(w_length, (u16) value); } @@ -1963,6 +1963,8 @@ unknown: break; case USB_RECIP_ENDPOINT: + if (!cdev->config) + break; endp = ((w_index & 0x80) >> 3) | (w_index & 0x0f); list_for_each_entry(f, &cdev->config->functions, list) { if (test_bit(endp, f->endpoints)) diff --git a/drivers/usb/gadget/function/f_cdev.c b/drivers/usb/gadget/function/f_cdev.c index e1302108a917..b288a848aaa0 100644 --- a/drivers/usb/gadget/function/f_cdev.c +++ b/drivers/usb/gadget/function/f_cdev.c @@ -1770,6 +1770,10 @@ static int cser_set_inst_name(struct usb_function_instance *f, const char *name) /* get port number */ str = strrchr(name, '.'); + if (!str) { + pr_err("err: port number not found\n"); + return -EINVAL; + } pr_debug("str:%s\n", str); *str = '\0'; diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c index c5fd3ce3ed9a..fd2157c8e8c2 100644 --- a/drivers/usb/gadget/function/f_fs.c +++ b/drivers/usb/gadget/function/f_fs.c @@ -2275,7 +2275,7 @@ static int __ffs_do_os_desc_header(enum ffs_os_desc_type *next_type, return -EINVAL; } - ffs_log("exit: size of desc %lu", sizeof(*desc)); + ffs_log("exit: size of desc %zu", sizeof(*desc)); return sizeof(*desc); } diff --git a/drivers/usb/gadget/function/f_gsi.h b/drivers/usb/gadget/function/f_gsi.h index d56012779c78..d489e453594a 100644 --- a/drivers/usb/gadget/function/f_gsi.h +++ b/drivers/usb/gadget/function/f_gsi.h @@ -35,9 +35,9 @@ #define GSI_CTRL_DTR (1 << 0) -#define GSI_NUM_IN_BUFFERS 7 +#define GSI_NUM_IN_BUFFERS 15 #define GSI_IN_BUFF_SIZE 2048 -#define GSI_NUM_OUT_BUFFERS 7 +#define GSI_NUM_OUT_BUFFERS 15 #define GSI_ECM_NUM_OUT_BUFFERS 31 #define GSI_OUT_AGGR_SIZE 24576 diff --git a/drivers/usb/pd/policy_engine.c b/drivers/usb/pd/policy_engine.c index 1bb7082be8e6..82ae0b4fe135 100644 --- a/drivers/usb/pd/policy_engine.c +++ b/drivers/usb/pd/policy_engine.c @@ -925,7 +925,8 @@ int usbpd_send_vdm(struct usbpd *pd, u32 vdm_hdr, const u32 *vdos, int num_vdos) return -ENOMEM; vdm_tx->data[0] = vdm_hdr; - memcpy(&vdm_tx->data[1], vdos, num_vdos * sizeof(u32)); + if (vdos && num_vdos) + memcpy(&vdm_tx->data[1], vdos, num_vdos * sizeof(u32)); vdm_tx->size = num_vdos + 1; /* include the header */ /* VDM will get sent in PE_SRC/SNK_READY state handling */ diff --git a/drivers/usb/pd/qpnp-pdphy.c b/drivers/usb/pd/qpnp-pdphy.c index 8cf294306efd..5b5e6210a1bb 100644 --- a/drivers/usb/pd/qpnp-pdphy.c +++ b/drivers/usb/pd/qpnp-pdphy.c @@ -445,8 +445,10 @@ int pd_phy_write(u16 hdr, const u8 *data, size_t data_len, dev_dbg(pdphy->dev, "%s: hdr %x frame type %d timeout %u\n", __func__, hdr, type, timeout_ms); - print_hex_dump_debug("tx data obj:", DUMP_PREFIX_NONE, 32, 4, - data, data_len, false); + + if (data && data_len) + print_hex_dump_debug("tx data obj:", DUMP_PREFIX_NONE, 32, 4, + data, data_len, false); if (!pdphy) { pr_err("%s: pdphy not found\n", __func__); @@ -472,7 +474,7 @@ int pd_phy_write(u16 hdr, const u8 *data, size_t data_len, if (ret) return ret; - if (data_len) { + if (data && data_len) { /* write data objects of SOP message */ ret = pdphy_bulk_reg_write(pdphy, USB_PDPHY_TX_BUFFER_DATA, data, data_len); diff --git a/drivers/usb/phy/phy-msm-qusb-v2.c b/drivers/usb/phy/phy-msm-qusb-v2.c index 4ecdc350fbd4..5a768ee4d061 100644 --- a/drivers/usb/phy/phy-msm-qusb-v2.c +++ b/drivers/usb/phy/phy-msm-qusb-v2.c @@ -63,6 +63,7 @@ #define LINESTATE_DM BIT(1) #define QUSB2PHY_PLL_ANALOG_CONTROLS_ONE 0x0 +#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x4 unsigned int phy_tune1; module_param(phy_tune1, uint, S_IRUGO | S_IWUSR); @@ -541,6 +542,7 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) { struct qusb_phy *qphy = container_of(phy, struct qusb_phy, phy); u32 linestate = 0, intr_mask = 0; + static u8 analog_ctrl_two; int ret; if (qphy->suspended && suspend) { @@ -554,6 +556,14 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) if (qphy->cable_connected || (qphy->phy.flags & PHY_HOST_MODE)) { + /* store clock settings like cmos/cml */ + analog_ctrl_two = + readl_relaxed(qphy->base + + QUSB2PHY_PLL_ANALOG_CONTROLS_TWO); + + writel_relaxed(0x1b, + qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_TWO); + /* enable clock bypass */ writel_relaxed(0x90, qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_ONE); @@ -599,6 +609,9 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) dev_err(phy->dev, "%s: phy_reset deassert failed\n", __func__); + writel_relaxed(0x1b, + qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_TWO); + /* enable clock bypass */ writel_relaxed(0x90, qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_ONE); @@ -620,6 +633,10 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) (qphy->phy.flags & PHY_HOST_MODE)) { qusb_phy_enable_clocks(qphy, true); + /* restore the default clock settings */ + writel_relaxed(analog_ctrl_two, + qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_TWO); + /* disable clock bypass */ writel_relaxed(0x80, qphy->base + QUSB2PHY_PLL_ANALOG_CONTROLS_ONE); @@ -639,12 +656,17 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend) */ wmb(); + qusb_phy_enable_power(qphy, true, true); + ret = reset_control_assert(qphy->phy_reset); + if (ret) + dev_err(phy->dev, "%s: phy_reset assert failed\n", + __func__); + usleep_range(100, 150); ret = reset_control_deassert(qphy->phy_reset); if (ret) dev_err(phy->dev, "%s: phy_reset deassert failed\n", __func__); - qusb_phy_enable_power(qphy, true, true); qusb_phy_enable_clocks(qphy, true); } qphy->suspended = false; diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h index 609a7aed4977..a5368cdf2254 100644 --- a/drivers/video/fbdev/msm/mdss.h +++ b/drivers/video/fbdev/msm/mdss.h @@ -163,6 +163,7 @@ enum mdss_hw_quirk { MDSS_QUIRK_FMT_PACK_PATTERN, MDSS_QUIRK_NEED_SECURE_MAP, MDSS_QUIRK_SRC_SPLIT_ALWAYS, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE, MDSS_QUIRK_MAX, }; @@ -405,6 +406,7 @@ struct mdss_data_type { u32 enable_gate; u32 enable_bw_release; u32 enable_rotator_bw_release; + u32 enable_cdp; u32 serialize_wait4pp; u32 wait4autorefresh; u32 lines_before_active; diff --git a/drivers/video/fbdev/msm/mdss_debug.h b/drivers/video/fbdev/msm/mdss_debug.h index 59ba4f3e5578..1a44ab5c44a2 100644 --- a/drivers/video/fbdev/msm/mdss_debug.h +++ b/drivers/video/fbdev/msm/mdss_debug.h @@ -57,6 +57,7 @@ struct vbif_debug_bus { u32 block_bus_addr; u32 bit_offset; u32 block_cnt; + u32 test_pnt_start; u32 test_pnt_cnt; }; diff --git a/drivers/video/fbdev/msm/mdss_debug_xlog.c b/drivers/video/fbdev/msm/mdss_debug_xlog.c index cfcc96aafffb..0a45ce036cf6 100644 --- a/drivers/video/fbdev/msm/mdss_debug_xlog.c +++ b/drivers/video/fbdev/msm/mdss_debug_xlog.c @@ -312,7 +312,7 @@ static void __vbif_debug_bus(struct vbif_debug_bus *head, vbif_base + head->block_bus_addr); /* make sure that current bus blcok enable */ wmb(); - for (j = 0; j < head->test_pnt_cnt; j++) { + for (j = head->test_pnt_start; j < head->test_pnt_cnt; j++) { writel_relaxed(j, vbif_base + head->block_bus_addr + 4); /* make sure that test point is enabled */ wmb(); diff --git a/drivers/video/fbdev/msm/mdss_dp.c b/drivers/video/fbdev/msm/mdss_dp.c index f25a6e185051..57e18a7dc5e1 100644 --- a/drivers/video/fbdev/msm/mdss_dp.c +++ b/drivers/video/fbdev/msm/mdss_dp.c @@ -856,10 +856,12 @@ static int dp_audio_info_setup(struct platform_device *pdev, return -ENODEV; } - mdss_dp_audio_enable(&dp_ctrl->ctrl_io, true); - mdss_dp_config_audio_acr_ctrl(&dp_ctrl->ctrl_io, - dp_ctrl->link_rate); mdss_dp_audio_setup_sdps(&dp_ctrl->ctrl_io); + mdss_dp_audio_set_sample_rate(&dp_ctrl->ctrl_io, + dp_ctrl->link_rate, params->sample_rate_hz); + mdss_dp_config_audio_acr_ctrl(&dp_ctrl->ctrl_io, dp_ctrl->link_rate); + mdss_dp_set_safe_to_exit_level(&dp_ctrl->ctrl_io, dp_ctrl->lane_cnt); + mdss_dp_audio_enable(&dp_ctrl->ctrl_io, true); return rc; } /* dp_audio_info_setup */ @@ -1055,11 +1057,13 @@ int mdss_dp_on(struct mdss_panel_data *pdata) pr_debug("link_rate = 0x%x\n", dp_drv->link_rate); dp_drv->power_data[DP_CTRL_PM].clk_config[0].rate = - dp_drv->link_rate * DP_LINK_RATE_MULTIPLIER; + ((dp_drv->link_rate * DP_LINK_RATE_MULTIPLIER) / + 1000); /* KHz */ dp_drv->pixel_rate = dp_drv->panel_data.panel_info.clk_rate; dp_drv->power_data[DP_CTRL_PM].clk_config[3].rate = - dp_drv->pixel_rate; + (dp_drv->pixel_rate / + 1000); /* KHz */ ret = mdss_dp_clk_ctrl(dp_drv, DP_CTRL_PM, true); if (ret) { @@ -1394,6 +1398,8 @@ static int mdss_dp_hdcp_init(struct mdss_panel_data *pdata) goto error; } + dp_drv->panel_data.panel_info.hdcp_1x_data = dp_drv->hdcp_data; + pr_debug("HDCP 1.3 initialized\n"); dp_drv->hdcp_ops = hdcp_1x_start(dp_drv->hdcp_data); @@ -1774,7 +1780,7 @@ irqreturn_t dp_isr(int irq, void *ptr) { struct mdss_dp_drv_pdata *dp = (struct mdss_dp_drv_pdata *)ptr; unsigned char *base = dp->base; - u32 isr1, isr2, mask1, mask2; + u32 isr1, isr2, mask1; u32 ack; spin_lock(&dp->lock); @@ -1782,13 +1788,11 @@ irqreturn_t dp_isr(int irq, void *ptr) isr2 = dp_read(base + DP_INTR_STATUS2); mask1 = isr1 & dp->mask1; - mask2 = isr2 & dp->mask2; isr1 &= ~mask1; /* remove masks bit */ - isr2 &= ~mask2; - pr_debug("isr=%x mask=%x isr2=%x mask2=%x\n", - isr1, mask1, isr2, mask2); + pr_debug("isr=%x mask=%x isr2=%x\n", + isr1, mask1, isr2); ack = isr1 & EDP_INTR_STATUS1; ack <<= 1; /* ack bits */ @@ -1797,7 +1801,7 @@ irqreturn_t dp_isr(int irq, void *ptr) ack = isr2 & EDP_INTR_STATUS2; ack <<= 1; /* ack bits */ - ack |= mask2; + ack |= isr2; dp_write(base + DP_INTR_STATUS2, ack); spin_unlock(&dp->lock); diff --git a/drivers/video/fbdev/msm/mdss_dp.h b/drivers/video/fbdev/msm/mdss_dp.h index 9a8534677c5e..4710cf7a98e2 100644 --- a/drivers/video/fbdev/msm/mdss_dp.h +++ b/drivers/video/fbdev/msm/mdss_dp.h @@ -368,7 +368,7 @@ struct mdss_dp_drv_pdata { int dp_on_cnt; int dp_off_cnt; - u32 pixel_rate; + u32 pixel_rate; /* KHz */ u32 aux_rate; char link_rate; /* X 27000000 for real rate */ char lane_cnt; diff --git a/drivers/video/fbdev/msm/mdss_dp_aux.c b/drivers/video/fbdev/msm/mdss_dp_aux.c index 0bbcd0c9041e..584d2edc364e 100644 --- a/drivers/video/fbdev/msm/mdss_dp_aux.c +++ b/drivers/video/fbdev/msm/mdss_dp_aux.c @@ -230,7 +230,9 @@ static int dp_aux_write_cmds(struct mdss_dp_drv_pdata *ep, int dp_aux_write(void *ep, struct edp_cmd *cmd) { - return dp_aux_write_cmds(ep, cmd); + int rc = dp_aux_write_cmds(ep, cmd); + + return rc < 0 ? -EINVAL : 0; } static int dp_aux_read_cmds(struct mdss_dp_drv_pdata *ep, @@ -291,7 +293,9 @@ static int dp_aux_read_cmds(struct mdss_dp_drv_pdata *ep, int dp_aux_read(void *ep, struct edp_cmd *cmds) { - return dp_aux_read_cmds(ep, cmds); + int rc = dp_aux_read_cmds(ep, cmds); + + return rc < 0 ? -EINVAL : 0; } void dp_aux_native_handler(struct mdss_dp_drv_pdata *ep, u32 isr) diff --git a/drivers/video/fbdev/msm/mdss_dp_util.c b/drivers/video/fbdev/msm/mdss_dp_util.c index 62b76199959c..bdf5d92f7053 100644 --- a/drivers/video/fbdev/msm/mdss_dp_util.c +++ b/drivers/video/fbdev/msm/mdss_dp_util.c @@ -24,6 +24,33 @@ #define PARITY_BYTE_1_BIT 24 #define HEADER_BYTE_3_BIT 16 #define PARITY_BYTE_3_BIT 24 +#define DP_LS_FREQ_162 162000000 +#define DP_LS_FREQ_270 270000000 +#define DP_LS_FREQ_540 540000000 +#define AUDIO_FREQ_32 32000 +#define AUDIO_FREQ_44_1 44100 +#define AUDIO_FREQ_48 48000 +#define DP_AUDIO_FREQ_COUNT 3 + +static const uint32_t naud_value[DP_AUDIO_FREQ_COUNT][DP_AUDIO_FREQ_COUNT] = { + { 10125, 16875, 33750 }, + { 5625, 9375, 18750 }, + { 3375, 5625, 11250 } +}; + +static const uint32_t maud_rate[DP_AUDIO_FREQ_COUNT] = { 1024, 784, 512 }; + +static const uint32_t audio_timing_rbr[DP_AUDIO_FREQ_COUNT] = { + MMSS_DP_AUDIO_TIMING_RBR_32, + MMSS_DP_AUDIO_TIMING_RBR_44, + MMSS_DP_AUDIO_TIMING_RBR_48 +}; + +static const uint32_t std_audio_freq_list[DP_AUDIO_FREQ_COUNT] = { + AUDIO_FREQ_32, + AUDIO_FREQ_44_1, + AUDIO_FREQ_48 +}; struct mdss_hw mdss_dp_hw = { .hw_ndx = MDSS_HW_EDP, @@ -31,6 +58,42 @@ struct mdss_hw mdss_dp_hw = { .irq_handler = dp_isr, }; +static int mdss_dp_get_rate_index(uint32_t rate) +{ + int index = 0; + + switch (rate) { + case DP_LS_FREQ_162: + case AUDIO_FREQ_32: + index = 0; + break; + case DP_LS_FREQ_270: + case AUDIO_FREQ_44_1: + index = 1; + break; + case DP_LS_FREQ_540: + case AUDIO_FREQ_48: + index = 2; + break; + default: + index = 0; + pr_err("unsupported rate\n"); + break; + } + + return index; +} + +static bool match_std_freq(uint32_t audio_freq, uint32_t std_freq) +{ + int quotient = audio_freq / std_freq; + + if (quotient & (quotient - 1)) + return false; + else + return true; +} + /* DP retrieve ctrl HW version */ u32 mdss_dp_get_ctrl_hw_version(struct dss_io_data *ctrl_io) { @@ -378,123 +441,294 @@ u32 mdss_dp_usbpd_gen_config_pkt(struct mdss_dp_drv_pdata *dp) return config; } -void mdss_dp_config_audio_acr_ctrl(struct dss_io_data *ctrl_io, - char link_rate) +void mdss_dp_config_audio_acr_ctrl(struct dss_io_data *ctrl_io, char link_rate) { u32 acr_ctrl = 0; + u32 select = 0; + + acr_ctrl = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ACR_CTRL); switch (link_rate) { case DP_LINK_RATE_162: - acr_ctrl = 0; + select = 0; break; case DP_LINK_RATE_270: - acr_ctrl = 1; + select = 1; break; case DP_LINK_RATE_540: - acr_ctrl = 2; + select = 2; break; default: pr_debug("Unknown link rate\n"); - acr_ctrl = 1; + select = 0; break; } + acr_ctrl |= select << 4 | BIT(31) | BIT(8) | BIT(14); + + pr_debug("select = 0x%x, acr_ctrl = 0x%x\n", select, acr_ctrl); + writel_relaxed(acr_ctrl, ctrl_io->base + MMSS_DP_AUDIO_ACR_CTRL); } -static void mdss_dp_audio_config_parity_settings(struct dss_io_data *ctrl_io) +static u8 mdss_dp_get_g0_value(u8 data) +{ + u8 c[4]; + u8 g[4]; + u8 rData = 0; + u8 i; + + for (i = 0; i < 4; i++) + c[i] = (data >> i) & 0x01; + + g[0] = c[3]; + g[1] = c[0] ^ c[3]; + g[2] = c[1]; + g[3] = c[2]; + + for (i = 0; i < 4; i++) + rData = ((g[i] & 0x01) << i) | rData; + + return rData; +} + +static u8 mdss_dp_get_g1_value(u8 data) +{ + u8 c[4]; + u8 g[4]; + u8 rData = 0; + u8 i; + + for (i = 0; i < 4; i++) + c[i] = (data >> i) & 0x01; + + g[0] = c[0] ^ c[3]; + g[1] = c[0] ^ c[1] ^ c[3]; + g[2] = c[1] ^ c[2]; + g[3] = c[2] ^ c[3]; + + for (i = 0; i < 4; i++) + rData = ((g[i] & 0x01) << i) | rData; + + return rData; +} + +static u8 mdss_dp_calculate_parity_byte(u32 data) +{ + u8 x0 = 0; + u8 x1 = 0; + u8 ci = 0; + u8 iData = 0; + u8 i = 0; + u8 parityByte; + + for (i = 0; i < 8; i++) { + iData = (data >> i*4) & 0xF; + + ci = iData ^ x1; + x1 = x0 ^ mdss_dp_get_g1_value(ci); + x0 = mdss_dp_get_g0_value(ci); + } + + parityByte = x1 | (x0 << 4); + + return parityByte; +} + +static void mdss_dp_audio_setup_audio_stream_sdp(struct dss_io_data *ctrl_io) { u32 value = 0; + u32 new_value = 0; + u8 parity_byte = 0; - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_0); /* Config header and parity byte 1 */ - value |= ((0x2 << HEADER_BYTE_1_BIT) - | (0x13 << PARITY_BYTE_1_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_0); + new_value = 0x02; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_1_BIT) + | (parity_byte << PARITY_BYTE_1_BIT)); + pr_debug("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_0); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); /* Config header and parity byte 2 */ - value |= ((0x28 << HEADER_BYTE_2_BIT) - | (0xf5 << PARITY_BYTE_2_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); + new_value = 0x0; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_2_BIT) + | (parity_byte << PARITY_BYTE_2_BIT)); + pr_debug("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); /* Config header and parity byte 3 */ - value |= ((0x97 << HEADER_BYTE_3_BIT) - | (0xc2 << PARITY_BYTE_3_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); + new_value = 0x01; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_3_BIT) + | (parity_byte << PARITY_BYTE_3_BIT)); + pr_debug("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_STREAM_1); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_0); +} + +static void mdss_dp_audio_setup_audio_timestamp_sdp(struct dss_io_data *ctrl_io) +{ + u32 value = 0; + u32 new_value = 0; + u8 parity_byte = 0; + /* Config header and parity byte 1 */ - value |= ((0x1 << HEADER_BYTE_1_BIT) - | (0x98 << PARITY_BYTE_1_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_0); + new_value = 0x1; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_1_BIT) + | (parity_byte << PARITY_BYTE_1_BIT)); + pr_debug("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_0); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1); /* Config header and parity byte 2 */ - value |= ((0x17 << HEADER_BYTE_2_BIT) - | (0x60 << PARITY_BYTE_2_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1); + new_value = 0x17; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_2_BIT) + | (parity_byte << PARITY_BYTE_2_BIT)); + pr_debug("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_0); + /* Config header and parity byte 3 */ + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1); + new_value = (0x0 | (0x12 << 2)); + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_3_BIT) + | (parity_byte << PARITY_BYTE_3_BIT)); + pr_debug("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); + writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_TIMESTAMP_1); +} + +static void mdss_dp_audio_setup_audio_infoframe_sdp(struct dss_io_data *ctrl_io) +{ + u32 value = 0; + u32 new_value = 0; + u8 parity_byte = 0; + /* Config header and parity byte 1 */ - value |= ((0x84 << HEADER_BYTE_1_BIT) - | (0x84 << PARITY_BYTE_1_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_0); + new_value = 0x84; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_1_BIT) + | (parity_byte << PARITY_BYTE_1_BIT)); + pr_debug("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_0); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1); /* Config header and parity byte 2 */ - value |= ((0xb1 << HEADER_BYTE_2_BIT) - | (0x4e << PARITY_BYTE_2_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1); + new_value = 0x1b; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_2_BIT) + | (parity_byte << PARITY_BYTE_2_BIT)); + pr_debug("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1); + /* Config header and parity byte 3 */ + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1); + new_value = (0x0 | (0x12 << 2)); + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_3_BIT) + | (parity_byte << PARITY_BYTE_3_BIT)); + pr_debug("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", + new_value, parity_byte); + writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_1); + + /* Config Data Byte 0 - 2 as "Refer to Stream Header" */ + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_INFOFRAME_2); +} + +static void mdss_dp_audio_setup_copy_management_sdp(struct dss_io_data *ctrl_io) +{ + u32 value = 0; + u32 new_value = 0; + u8 parity_byte = 0; + + /* Config header and parity byte 1 */ value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_0); - /* Config header and parity byte 1 */ - value |= ((0x5 << HEADER_BYTE_1_BIT) - | (0xbe << PARITY_BYTE_1_BIT)); + new_value = 0x05; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_1_BIT) + | (parity_byte << PARITY_BYTE_1_BIT)); + pr_debug("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_0); + /* Config header and parity byte 2 */ value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_1); - /* Config header and parity byte 2 */ - value |= ((0x0b << HEADER_BYTE_2_BIT) - | (0xc7 << PARITY_BYTE_2_BIT)); + new_value = 0x0F; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_2_BIT) + | (parity_byte << PARITY_BYTE_2_BIT)); + pr_debug("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_1); + /* Config header and parity byte 3 */ value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_1); - /* Config header and parity byte 3 */ - value |= ((0x1 << HEADER_BYTE_3_BIT) - | (0x98 << PARITY_BYTE_3_BIT)); + new_value = 0x0; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_3_BIT) + | (parity_byte << PARITY_BYTE_3_BIT)); + pr_debug("Header Byte 3: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_1); - writel_relaxed(0x22222222, ctrl_io->base + + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_2); - writel_relaxed(0x22222222, ctrl_io->base + + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_3); - writel_relaxed(0x22222222, ctrl_io->base + + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_COPYMANAGEMENT_4); +} + +static void mdss_dp_audio_setup_isrc_sdp(struct dss_io_data *ctrl_io) +{ + u32 value = 0; + u32 new_value = 0; + u8 parity_byte = 0; - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_0); /* Config header and parity byte 1 */ - value |= ((0x6 << HEADER_BYTE_1_BIT) - | (0x35 << PARITY_BYTE_1_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_0); + new_value = 0x06; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_1_BIT) + | (parity_byte << PARITY_BYTE_1_BIT)); + pr_debug("Header Byte 1: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_ISRC_0); - value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_1); /* Config header and parity byte 2 */ - value |= ((0x0b << HEADER_BYTE_2_BIT) - | (0xc7 << PARITY_BYTE_2_BIT)); + value = readl_relaxed(ctrl_io->base + MMSS_DP_AUDIO_ISRC_1); + new_value = 0x0F; + parity_byte = mdss_dp_calculate_parity_byte(new_value); + value |= ((new_value << HEADER_BYTE_2_BIT) + | (parity_byte << PARITY_BYTE_2_BIT)); + pr_debug("Header Byte 2: value = 0x%x, parity_byte = 0x%x\n", + value, parity_byte); writel_relaxed(value, ctrl_io->base + MMSS_DP_AUDIO_ISRC_1); - writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_2); - writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_3); - writel_relaxed(0x33333333, ctrl_io->base + MMSS_DP_AUDIO_ISRC_4); - + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_ISRC_2); + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_ISRC_3); + writel_relaxed(0x0, ctrl_io->base + MMSS_DP_AUDIO_ISRC_4); } void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io) @@ -523,7 +757,90 @@ void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io) writel_relaxed(sdp_cfg2, ctrl_io->base + MMSS_DP_SDP_CFG2); - mdss_dp_audio_config_parity_settings(ctrl_io); + mdss_dp_audio_setup_audio_stream_sdp(ctrl_io); + mdss_dp_audio_setup_audio_timestamp_sdp(ctrl_io); + mdss_dp_audio_setup_audio_infoframe_sdp(ctrl_io); + mdss_dp_audio_setup_copy_management_sdp(ctrl_io); + mdss_dp_audio_setup_isrc_sdp(ctrl_io); +} + +void mdss_dp_audio_set_sample_rate(struct dss_io_data *ctrl_io, + char dp_link_rate, uint32_t audio_freq) +{ + uint32_t link_rate; + uint32_t default_audio_freq = AUDIO_FREQ_32; + int i, multiplier = 1; + uint32_t maud_index, lrate_index, register_index, value; + + link_rate = (uint32_t)dp_link_rate * DP_LINK_RATE_MULTIPLIER; + + pr_debug("link_rate = %u, audio_freq = %u\n", link_rate, audio_freq); + + for (i = 0; i < DP_AUDIO_FREQ_COUNT; i++) { + if (audio_freq % std_audio_freq_list[i]) + continue; + + if (match_std_freq(audio_freq, std_audio_freq_list[i])) { + default_audio_freq = std_audio_freq_list[i]; + multiplier = audio_freq / default_audio_freq; + break; + } + } + + pr_debug("default_audio_freq = %u, multiplier = %d\n", + default_audio_freq, multiplier); + + lrate_index = mdss_dp_get_rate_index(link_rate); + maud_index = mdss_dp_get_rate_index(default_audio_freq); + + pr_debug("lrate_index = %u, maud_index = %u, maud = %u, naud = %u\n", + lrate_index, maud_index, + maud_rate[maud_index] * multiplier, + naud_value[maud_index][lrate_index]); + + register_index = mdss_dp_get_rate_index(default_audio_freq); + value = ((maud_rate[maud_index] * multiplier) << 16) | + naud_value[maud_index][lrate_index]; + + pr_debug("reg index = %d, offset = 0x%x, value = 0x%x\n", + (int)register_index, audio_timing_rbr[register_index], + value); + + writel_relaxed(value, ctrl_io->base + + audio_timing_rbr[register_index]); +} + +void mdss_dp_set_safe_to_exit_level(struct dss_io_data *ctrl_io, + uint32_t lane_cnt) +{ + u32 safe_to_exit_level = 0; + u32 mainlink_levels = 0; + + switch (lane_cnt) { + case 1: + safe_to_exit_level = 14; + break; + case 2: + safe_to_exit_level = 8; + break; + case 4: + safe_to_exit_level = 5; + break; + default: + pr_debug("setting the default safe_to_exit_level = %u\n", + safe_to_exit_level); + safe_to_exit_level = 14; + break; + } + + mainlink_levels = readl_relaxed(ctrl_io->base + DP_MAINLINK_LEVELS); + mainlink_levels &= 0xFF0; + mainlink_levels |= safe_to_exit_level; + + pr_debug("mainlink_level = 0x%x, safe_to_exit_level = 0x%x\n", + mainlink_levels, safe_to_exit_level); + + writel_relaxed(mainlink_levels, ctrl_io->base + DP_MAINLINK_LEVELS); } void mdss_dp_audio_enable(struct dss_io_data *ctrl_io, bool enable) diff --git a/drivers/video/fbdev/msm/mdss_dp_util.h b/drivers/video/fbdev/msm/mdss_dp_util.h index 96664d1f9954..5eb9d092476f 100644 --- a/drivers/video/fbdev/msm/mdss_dp_util.h +++ b/drivers/video/fbdev/msm/mdss_dp_util.h @@ -54,6 +54,7 @@ #define DP_LOGICAL2PHYSCIAL_LANE_MAPPING (0x00000438) #define DP_MAINLINK_READY (0x00000440) +#define DP_MAINLINK_LEVELS (0x00000444) #define DP_TU (0x0000044C) #define MMSS_DP_AUDIO_TIMING_GEN (0x00000480) @@ -102,7 +103,8 @@ #define MMSS_DP_AUDIO_ISRC_4 (0x000006A0) #define MMSS_DP_AUDIO_ISRC_5 (0x000006A4) #define MMSS_DP_AUDIO_INFOFRAME_0 (0x000006A8) -#define MMSS_DP_AUDIO_INFOFRAME_1 (0x000006B0) +#define MMSS_DP_AUDIO_INFOFRAME_1 (0x000006AC) +#define MMSS_DP_AUDIO_INFOFRAME_2 (0x000006B0) #define MMSS_DP_GENERIC0_0 (0x00000700) #define MMSS_DP_GENERIC0_1 (0x00000704) @@ -181,8 +183,6 @@ #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA11 (0x01C) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12 (0x020) -#define DP_INTERRUPT_STATUS_2 (0x024) - struct lane_mapping { char lane0; char lane1; @@ -235,5 +235,10 @@ void mdss_dp_config_audio_acr_ctrl(struct dss_io_data *ctrl_io, char link_rate); void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io); void mdss_dp_audio_enable(struct dss_io_data *ctrl_io, bool enable); +void mdss_dp_audio_select_core(struct dss_io_data *ctrl_io); +void mdss_dp_audio_set_sample_rate(struct dss_io_data *ctrl_io, + char dp_link_rate, uint32_t audio_freq); +void mdss_dp_set_safe_to_exit_level(struct dss_io_data *ctrl_io, + uint32_t lane_cnt); #endif /* __DP_UTIL_H__ */ diff --git a/drivers/video/fbdev/msm/mdss_dsi_phy_v3.c b/drivers/video/fbdev/msm/mdss_dsi_phy_v3.c index 94554bd5b423..d4ff82a11a09 100644 --- a/drivers/video/fbdev/msm/mdss_dsi_phy_v3.c +++ b/drivers/video/fbdev/msm/mdss_dsi_phy_v3.c @@ -183,7 +183,7 @@ static void mdss_dsi_phy_v3_config_lane_settings( struct mdss_dsi_ctrl_pdata *ctrl) { int i; - u32 tx_dctrl[] = {0x18, 0x19, 0x18, 0x02, 0x18}; + u32 tx_dctrl[] = {0x00, 0x00, 0x00, 0x02, 0x01}; struct mdss_dsi_phy_ctrl *pd = &(((ctrl->panel_data).panel_info.mipi).dsi_phy_db); @@ -407,8 +407,8 @@ int mdss_dsi_phy_v3_init(struct mdss_dsi_ctrl_pdata *ctrl, mdss_dsi_phy_v3_lanes_enable(ctrl); - /* Select hybrid mode and use local-wordclk */ - DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_2, 0x08); + /* Select full-rate mode */ + DSI_PHY_W32(ctrl->phy_io.base, CMN_CTRL_2, 0x40); mdss_dsi_phy_v3_set_pll_source(ctrl); diff --git a/drivers/video/fbdev/msm/mdss_fb.c b/drivers/video/fbdev/msm/mdss_fb.c index e0f1a37ac84e..50c7015c6731 100644 --- a/drivers/video/fbdev/msm/mdss_fb.c +++ b/drivers/video/fbdev/msm/mdss_fb.c @@ -4664,6 +4664,9 @@ static int mdss_fb_mode_switch(struct msm_fb_data_type *mfd, u32 mode) if (!mfd || !mfd->panel_info) return -EINVAL; + /* make sure that we are idle while switching */ + mdss_fb_wait_for_kickoff(mfd); + pinfo = mfd->panel_info; if (pinfo->mipi.dms_mode == DYNAMIC_MODE_SWITCH_SUSPEND_RESUME) { ret = mdss_fb_blanking_mode_switch(mfd, mode); diff --git a/drivers/video/fbdev/msm/mdss_hdcp_1x.c b/drivers/video/fbdev/msm/mdss_hdcp_1x.c index 7f26007fab13..5b490ad67e65 100644 --- a/drivers/video/fbdev/msm/mdss_hdcp_1x.c +++ b/drivers/video/fbdev/msm/mdss_hdcp_1x.c @@ -19,6 +19,7 @@ #include <soc/qcom/scm.h> #include <linux/hdcp_qseecom.h> #include "mdss_hdcp_1x.h" +#include "mdss_fb.h" #include "mdss_dp_util.h" #include "video/msm_hdmi_hdcp_mgr.h" @@ -41,14 +42,14 @@ #define HDCP_INT_CLR (isr->auth_success_ack | isr->auth_fail_ack | \ isr->auth_fail_info_ack | isr->tx_req_ack | \ isr->encryption_ready_ack | \ - isr->encryption_not_ready | isr->tx_req_done_ack) + isr->encryption_not_ready_ack | isr->tx_req_done_ack) #define HDCP_INT_EN (isr->auth_success_mask | isr->auth_fail_mask | \ isr->encryption_ready_mask | \ isr->encryption_not_ready_mask) #define HDCP_POLL_SLEEP_US (20 * 1000) -#define HDCP_POLL_TIMEOUT_US (HDCP_POLL_SLEEP_US * 1000) +#define HDCP_POLL_TIMEOUT_US (HDCP_POLL_SLEEP_US * 100) #define reg_set_data(x) \ (hdcp_ctrl->init_data.sec_access ? reg_set->sec_data##x : \ @@ -198,15 +199,15 @@ struct hdcp_reg_set { {{"bcaps", 0x40, 1}, {"bksv", 0x00, 5}, {"r0'", 0x08, 2}, \ {"bstatus", 0x41, 2}, {"ksv-fifo", 0x43, 0}, {"v_h0", 0x20, 4}, \ {"v_h1", 0x24, 4}, {"v_h2", 0x28, 4}, {"v_h3", 0x2c, 4}, \ - {"v_h4", 0x30, 4}, {"an", 0x16, 8}, {"aksv", 0x10, 5}, \ - {"repater", 0x00, 0} } + {"v_h4", 0x30, 4}, {"an", 0x18, 8}, {"aksv", 0x10, 5}, \ + {"repeater", 0x00, 0} } #define HDCP_DP_SINK_ADDR_MAP \ {{"bcaps", 0x68028, 1}, {"bksv", 0x68000, 5}, {"r0'", 0x68005, 2}, \ {"bstatus", 0x6802A, 2}, {"ksv-fifo", 0x6802A, 0}, \ {"v_h0", 0x68014, 4}, {"v_h1", 0x68018, 4}, {"v_h2", 0x6801C, 4}, \ {"v_h3", 0x68020, 4}, {"v_h4", 0x68024, 4}, {"an", 0x6800C, 8}, \ - {"aksv", 0x68007, 5}, {"repater", 0x68028, 1} } + {"aksv", 0x68007, 5}, {"repeater", 0x68028, 1} } #define HDCP_HDMI_INT_SET \ {HDMI_HDCP_INT_CTRL, \ @@ -215,7 +216,7 @@ struct hdcp_reg_set { BIT(0), BIT(4), 0, 0, 0, 0} #define HDCP_DP_INT_SET \ - {DP_INTERRUPT_STATUS_2, \ + {DP_INTR_STATUS2, \ BIT(17), BIT(20), BIT(24), BIT(27), 0, 0, \ BIT(16), BIT(19), BIT(21), BIT(23), BIT(26), 0, 0, \ BIT(15), BIT(18), BIT(22), BIT(25), 0, 0} @@ -554,7 +555,7 @@ static int hdcp_1x_read(struct hdcp_1x_ctrl *hdcp_ctrl, cmd.out_buf = buf; cmd.len = sink->len; - rc = dp_aux_read(hdcp_ctrl->init_data.dp_data, &cmd); + rc = dp_aux_read(hdcp_ctrl->init_data.cb_data, &cmd); if (rc) DEV_ERR("%s: %s: %s read failed\n", __func__, HDCP_STATE_NAME, sink->name); @@ -564,7 +565,7 @@ static int hdcp_1x_read(struct hdcp_1x_ctrl *hdcp_ctrl, } static int hdcp_1x_write(struct hdcp_1x_ctrl *hdcp_ctrl, - u32 offset, u32 len, u8 *buf, char *name) + struct hdcp_sink_addr *sink, u8 *buf) { int rc = 0; struct hdmi_tx_ddc_data ddc_data; @@ -573,28 +574,28 @@ static int hdcp_1x_write(struct hdcp_1x_ctrl *hdcp_ctrl, memset(&ddc_data, 0, sizeof(ddc_data)); ddc_data.dev_addr = 0x74; - ddc_data.offset = offset; + ddc_data.offset = sink->addr; ddc_data.data_buf = buf; - ddc_data.data_len = len; - ddc_data.what = name; + ddc_data.data_len = sink->len; + ddc_data.what = sink->name; hdcp_ctrl->init_data.ddc_ctrl->ddc_data = ddc_data; rc = hdmi_ddc_write(hdcp_ctrl->init_data.ddc_ctrl); if (rc) DEV_ERR("%s: %s: %s write failed\n", __func__, - HDCP_STATE_NAME, name); + HDCP_STATE_NAME, sink->name); } else if (IS_ENABLED(CONFIG_FB_MSM_MDSS_DP_PANEL) && hdcp_ctrl->init_data.client_id == HDCP_CLIENT_DP) { struct edp_cmd cmd = {0}; - cmd.addr = offset; - cmd.len = len; + cmd.addr = sink->addr; + cmd.len = sink->len; cmd.datap = buf; - rc = dp_aux_write(hdcp_ctrl->init_data.dp_data, &cmd); + rc = dp_aux_write(hdcp_ctrl->init_data.cb_data, &cmd); if (rc) DEV_ERR("%s: %s: %s read failed\n", __func__, - HDCP_STATE_NAME, name); + HDCP_STATE_NAME, sink->name); } return rc; @@ -731,7 +732,7 @@ static int hdcp_1x_authentication_part1(struct hdcp_1x_ctrl *hdcp_ctrl) link0_an_1 = DSS_REG_R(io, reg_set->data6); if (hdcp_ctrl->init_data.client_id == HDCP_CLIENT_DP) { udelay(1); - link0_an_0 = DSS_REG_R(io, reg_set->data6); + link0_an_1 = DSS_REG_R(io, reg_set->data6); } /* Read AKSV */ @@ -754,13 +755,13 @@ static int hdcp_1x_authentication_part1(struct hdcp_1x_ctrl *hdcp_ctrl) an[6] = (link0_an_1 >> 16) & 0xFF; an[7] = (link0_an_1 >> 24) & 0xFF; - rc = hdcp_1x_write(hdcp_ctrl, 0x18, 8, an, "an"); + rc = hdcp_1x_write(hdcp_ctrl, &hdcp_ctrl->sink_addr.an, an); if (IS_ERR_VALUE(rc)) { DEV_ERR("%s: error writing an to sink\n", __func__); goto error; } - rc = hdcp_1x_write(hdcp_ctrl, 0x10, 5, aksv, "aksv"); + rc = hdcp_1x_write(hdcp_ctrl, &hdcp_ctrl->sink_addr.aksv, aksv); if (IS_ERR_VALUE(rc)) { DEV_ERR("%s: error writing aksv to sink\n", __func__); goto error; @@ -1325,10 +1326,12 @@ static void hdcp_1x_auth_work(struct work_struct *work) } io = hdcp_ctrl->init_data.core_io; - /* Enabling Software DDC */ + /* Enabling Software DDC for HDMI and REF timer for DP */ if (hdcp_ctrl->init_data.client_id == HDCP_CLIENT_HDMI) DSS_REG_W_ND(io, HDMI_DDC_ARBITRATION, DSS_REG_R(io, HDMI_DDC_ARBITRATION) & ~(BIT(4))); + else if (hdcp_ctrl->init_data.client_id == HDCP_CLIENT_DP) + DSS_REG_W(io, DP_DP_HPD_REFTIMER, 0x10013); rc = hdcp_1x_authentication_part1(hdcp_ctrl); if (rc) { @@ -1628,12 +1631,45 @@ error: return rc; } /* hdcp_1x_isr */ +static struct hdcp_1x_ctrl *hdcp_1x_get_ctrl(struct device *dev) +{ + struct fb_info *fbi; + struct msm_fb_data_type *mfd; + struct mdss_panel_info *pinfo; + + if (!dev) { + pr_err("invalid input\n"); + goto error; + } + + fbi = dev_get_drvdata(dev); + if (!fbi) { + pr_err("invalid fbi\n"); + goto error; + } + + mfd = fbi->par; + if (!mfd) { + pr_err("invalid mfd\n"); + goto error; + } + + pinfo = mfd->panel_info; + if (!pinfo) { + pr_err("invalid pinfo\n"); + goto error; + } + + return pinfo->hdcp_1x_data; + +error: + return NULL; +} static ssize_t hdcp_1x_sysfs_rda_status(struct device *dev, struct device_attribute *attr, char *buf) { ssize_t ret; - struct hdcp_1x_ctrl *hdcp_ctrl = - hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_HDCP); + struct hdcp_1x_ctrl *hdcp_ctrl = hdcp_1x_get_ctrl(dev); if (!hdcp_ctrl) { DEV_ERR("%s: invalid input\n", __func__); @@ -1652,8 +1688,7 @@ static ssize_t hdcp_1x_sysfs_rda_tp(struct device *dev, struct device_attribute *attr, char *buf) { ssize_t ret = 0; - struct hdcp_1x_ctrl *hdcp_ctrl = - hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_HDCP); + struct hdcp_1x_ctrl *hdcp_ctrl = hdcp_1x_get_ctrl(dev); if (!hdcp_ctrl) { DEV_ERR("%s: invalid input\n", __func__); @@ -1687,8 +1722,7 @@ static ssize_t hdcp_1x_sysfs_wta_tp(struct device *dev, { int msgid = 0; ssize_t ret = count; - struct hdcp_1x_ctrl *hdcp_ctrl = - hdmi_get_featuredata_from_sysfs_dev(dev, HDMI_TX_FEAT_HDCP); + struct hdcp_1x_ctrl *hdcp_ctrl = hdcp_1x_get_ctrl(dev); if (!hdcp_ctrl || !buf) { DEV_ERR("%s: invalid input\n", __func__); @@ -1774,9 +1808,8 @@ void *hdcp_1x_init(struct hdcp_init_data *init_data) }; if (!init_data || !init_data->core_io || !init_data->qfprom_io || - !init_data->mutex || !init_data->ddc_ctrl || - !init_data->notify_status || !init_data->workq || - !init_data->cb_data) { + !init_data->mutex || !init_data->notify_status || + !init_data->workq || !init_data->cb_data) { DEV_ERR("%s: invalid input\n", __func__); goto error; } diff --git a/drivers/video/fbdev/msm/mdss_hdcp_1x.h b/drivers/video/fbdev/msm/mdss_hdcp_1x.h index dbe91b459a9f..426b13a340f4 100644 --- a/drivers/video/fbdev/msm/mdss_hdcp_1x.h +++ b/drivers/video/fbdev/msm/mdss_hdcp_1x.h @@ -42,7 +42,6 @@ struct hdcp_init_data { void *cb_data; void (*notify_status)(void *cb_data, enum hdcp_states status); struct hdmi_tx_ddc_ctrl *ddc_ctrl; - void *dp_data; u32 phy_addr; u32 hdmi_tx_ver; struct msm_hdmi_mode_timing_info *timing; diff --git a/drivers/video/fbdev/msm/mdss_hdmi_panel.c b/drivers/video/fbdev/msm/mdss_hdmi_panel.c index 0335bf900866..522debfba8ce 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_panel.c +++ b/drivers/video/fbdev/msm/mdss_hdmi_panel.c @@ -150,74 +150,6 @@ enum hdmi_scaling_info { HDMI_SCALING_HORZ_VERT, }; -int hdmi_panel_get_vic(struct mdss_panel_info *pinfo, - struct hdmi_util_ds_data *ds_data) -{ - int new_vic = -1; - u32 h_total, v_total; - struct msm_hdmi_mode_timing_info timing; - - if (!pinfo) { - pr_err("invalid panel data\n"); - return -EINVAL; - } - - if (pinfo->vic) { - struct msm_hdmi_mode_timing_info info = {0}; - u32 ret = hdmi_get_supported_mode(&info, ds_data, pinfo->vic); - u32 supported = info.supported; - - if (!ret && supported) { - new_vic = pinfo->vic; - } else { - pr_err("invalid or not supported vic %d\n", - pinfo->vic); - return -EPERM; - } - } else { - timing.active_h = pinfo->xres; - timing.back_porch_h = pinfo->lcdc.h_back_porch; - timing.front_porch_h = pinfo->lcdc.h_front_porch; - timing.pulse_width_h = pinfo->lcdc.h_pulse_width; - - h_total = timing.active_h + timing.back_porch_h + - timing.front_porch_h + timing.pulse_width_h; - - pr_debug("ah=%d bph=%d fph=%d pwh=%d ht=%d\n", - timing.active_h, timing.back_porch_h, - timing.front_porch_h, timing.pulse_width_h, - h_total); - - timing.active_v = pinfo->yres; - timing.back_porch_v = pinfo->lcdc.v_back_porch; - timing.front_porch_v = pinfo->lcdc.v_front_porch; - timing.pulse_width_v = pinfo->lcdc.v_pulse_width; - - v_total = timing.active_v + timing.back_porch_v + - timing.front_porch_v + timing.pulse_width_v; - - pr_debug("av=%d bpv=%d fpv=%d pwv=%d vt=%d\n", - timing.active_v, timing.back_porch_v, - timing.front_porch_v, timing.pulse_width_v, v_total); - - timing.pixel_freq = ((unsigned long int)pinfo->clk_rate / 1000); - if (h_total && v_total) { - timing.refresh_rate = ((timing.pixel_freq * 1000) / - (h_total * v_total)) * 1000; - } else { - pr_err("cannot cal refresh rate\n"); - return -EPERM; - } - - pr_debug("pixel_freq=%d refresh_rate=%d\n", - timing.pixel_freq, timing.refresh_rate); - - new_vic = hdmi_get_video_id_code(&timing, ds_data); - } - - return new_vic; -} - static void hdmi_panel_update_dfps_data(struct hdmi_panel *panel) { struct mdss_panel_info *pinfo = panel->data->pinfo; @@ -916,7 +848,6 @@ void *hdmi_panel_init(struct hdmi_panel_init_data *data) if (data->ops) { data->ops->on = hdmi_panel_power_on; data->ops->off = hdmi_panel_power_off; - data->ops->get_vic = hdmi_panel_get_vic; data->ops->vendor = hdmi_panel_set_vendor_specific_infoframe; data->ops->update_fps = hdmi_panel_update_fps; } diff --git a/drivers/video/fbdev/msm/mdss_hdmi_panel.h b/drivers/video/fbdev/msm/mdss_hdmi_panel.h index e5cc1486f222..6fa9af13d46e 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_panel.h +++ b/drivers/video/fbdev/msm/mdss_hdmi_panel.h @@ -48,15 +48,12 @@ struct hdmi_panel_data { * @off: pointer to a function which powers off the panel * @vendor: pointer to a function which programs vendor specific infoframe * @update_fps: pointer to a function which updates fps - * @get_vic: pointer to a function which get the vic from panel information. */ struct hdmi_panel_ops { int (*on)(void *input); int (*off)(void *input); void (*vendor)(void *input); int (*update_fps)(void *input, u32 fps); - int (*get_vic)(struct mdss_panel_info *pinfo, - struct hdmi_util_ds_data *ds_data); }; /** diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.c b/drivers/video/fbdev/msm/mdss_hdmi_tx.c index 37081e5e4a0b..ace796163fa4 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_tx.c +++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.c @@ -1814,6 +1814,8 @@ static int hdmi_tx_init_hdcp(struct hdmi_tx_ctrl *hdmi_ctrl) goto end; } else { hdmi_tx_set_fd(HDMI_TX_FEAT_HDCP, hdcp_data); + hdmi_ctrl->panel_data.panel_info.hdcp_1x_data = + hdcp_data; DEV_DBG("%s: HDCP 1.4 initialized\n", __func__); } } @@ -3115,9 +3117,8 @@ static int hdmi_tx_power_on(struct hdmi_tx_ctrl *hdmi_ctrl) void *pdata = hdmi_tx_get_fd(HDMI_TX_FEAT_PANEL); void *edata = hdmi_tx_get_fd(HDMI_TX_FEAT_EDID); - if (hdmi_ctrl->panel_ops.get_vic) - hdmi_ctrl->vic = hdmi_ctrl->panel_ops.get_vic( - &panel_data->panel_info, &hdmi_ctrl->ds_data); + hdmi_panel_get_vic(&panel_data->panel_info, + &hdmi_ctrl->ds_data); if (hdmi_ctrl->vic <= 0) { DEV_ERR("%s: invalid vic\n", __func__); @@ -3703,9 +3704,7 @@ static int hdmi_tx_evt_handle_check_param(struct hdmi_tx_ctrl *hdmi_ctrl) int new_vic = -1; int rc = 0; - if (hdmi_ctrl->panel_ops.get_vic) - new_vic = hdmi_ctrl->panel_ops.get_vic( - hdmi_ctrl->evt_arg, &hdmi_ctrl->ds_data); + new_vic = hdmi_panel_get_vic(hdmi_ctrl->evt_arg, &hdmi_ctrl->ds_data); if ((new_vic < 0) || (new_vic > HDMI_VFRMT_MAX)) { DEV_ERR("%s: invalid or not supported vic\n", __func__); diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.c b/drivers/video/fbdev/msm/mdss_hdmi_util.c index 555ba1ba5b1c..9ed909e9a387 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_util.c +++ b/drivers/video/fbdev/msm/mdss_hdmi_util.c @@ -33,6 +33,74 @@ enum trigger_mode { TRIGGER_READ }; +int hdmi_panel_get_vic(struct mdss_panel_info *pinfo, + struct hdmi_util_ds_data *ds_data) +{ + int new_vic = -1; + u32 h_total, v_total; + struct msm_hdmi_mode_timing_info timing; + + if (!pinfo) { + pr_err("invalid panel data\n"); + return -EINVAL; + } + + if (pinfo->vic) { + struct msm_hdmi_mode_timing_info info = {0}; + u32 ret = hdmi_get_supported_mode(&info, ds_data, pinfo->vic); + u32 supported = info.supported; + + if (!ret && supported) { + new_vic = pinfo->vic; + } else { + pr_err("invalid or not supported vic %d\n", + pinfo->vic); + return -EPERM; + } + } else { + timing.active_h = pinfo->xres; + timing.back_porch_h = pinfo->lcdc.h_back_porch; + timing.front_porch_h = pinfo->lcdc.h_front_porch; + timing.pulse_width_h = pinfo->lcdc.h_pulse_width; + + h_total = timing.active_h + timing.back_porch_h + + timing.front_porch_h + timing.pulse_width_h; + + pr_debug("ah=%d bph=%d fph=%d pwh=%d ht=%d\n", + timing.active_h, timing.back_porch_h, + timing.front_porch_h, timing.pulse_width_h, + h_total); + + timing.active_v = pinfo->yres; + timing.back_porch_v = pinfo->lcdc.v_back_porch; + timing.front_porch_v = pinfo->lcdc.v_front_porch; + timing.pulse_width_v = pinfo->lcdc.v_pulse_width; + + v_total = timing.active_v + timing.back_porch_v + + timing.front_porch_v + timing.pulse_width_v; + + pr_debug("av=%d bpv=%d fpv=%d pwv=%d vt=%d\n", + timing.active_v, timing.back_porch_v, + timing.front_porch_v, timing.pulse_width_v, v_total); + + timing.pixel_freq = ((unsigned long int)pinfo->clk_rate / 1000); + if (h_total && v_total) { + timing.refresh_rate = ((timing.pixel_freq * 1000) / + (h_total * v_total)) * 1000; + } else { + pr_err("cannot cal refresh rate\n"); + return -EPERM; + } + + pr_debug("pixel_freq=%d refresh_rate=%d\n", + timing.pixel_freq, timing.refresh_rate); + + new_vic = hdmi_get_video_id_code(&timing, ds_data); + } + + return new_vic; +} + int hdmi_utils_get_timeout_in_hysnc(struct msm_hdmi_mode_timing_info *timing, u32 timeout_ms) { diff --git a/drivers/video/fbdev/msm/mdss_hdmi_util.h b/drivers/video/fbdev/msm/mdss_hdmi_util.h index ceb171417822..e65cf915fe92 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_util.h +++ b/drivers/video/fbdev/msm/mdss_hdmi_util.h @@ -15,6 +15,8 @@ #include <linux/mdss_io_util.h> #include "video/msm_hdmi_modes.h" +#include "mdss_panel.h" + /* HDMI_TX Registers */ #define HDMI_CTRL (0x00000000) #define HDMI_TEST_PATTERN (0x00000010) @@ -489,6 +491,8 @@ const char *msm_hdmi_mode_2string(u32 mode); int hdmi_set_resv_timing_info(struct msm_hdmi_mode_timing_info *mode); bool hdmi_is_valid_resv_timing(int mode); void hdmi_reset_resv_timing_info(void); +int hdmi_panel_get_vic(struct mdss_panel_info *pinfo, + struct hdmi_util_ds_data *ds_data); /* todo: Fix this. Right now this is defined in mdss_hdmi_tx.c */ void *hdmi_get_featuredata_from_sysfs_dev(struct device *device, u32 type); diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index 1b5c1b7d51e1..81e3438befca 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -1831,6 +1831,20 @@ static u32 mdss_get_props(void) return props; } +static void mdss_rpm_set_msg_ram(bool enable) +{ + u32 read_reg = 0; + void __iomem *rpm_msg_ram = ioremap(0x7781FC, 4); + + if (rpm_msg_ram) { + writel_relaxed(enable, rpm_msg_ram); + read_reg = readl_relaxed(rpm_msg_ram); + pr_debug("%s enable=%d read_val=%x\n", __func__, enable, + read_reg); + iounmap(rpm_msg_ram); + } +} + void mdss_mdp_init_default_prefill_factors(struct mdss_data_type *mdata) { mdata->prefill_data.prefill_factors.fmt_mt_nv12_factor = 8; @@ -1883,7 +1897,8 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) mdata->pixel_ram_size = 50 * 1024; set_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map); set_bit(MDSS_QOS_OVERHEAD_FACTOR, mdata->mdss_qos_map); - set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); + set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); /* cdp supported */ + mdata->enable_cdp = true; /* enable cdp */ set_bit(MDSS_QOS_OTLIM, mdata->mdss_qos_map); set_bit(MDSS_QOS_PER_PIPE_LUT, mdata->mdss_qos_map); set_bit(MDSS_QOS_SIMPLIFIED_PREFILL, mdata->mdss_qos_map); @@ -1978,7 +1993,8 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) set_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map); set_bit(MDSS_QOS_REMAPPER, mdata->mdss_qos_map); set_bit(MDSS_QOS_OVERHEAD_FACTOR, mdata->mdss_qos_map); - set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); + set_bit(MDSS_QOS_CDP, mdata->mdss_qos_map); /* cdp supported */ + mdata->enable_cdp = false; /* disable cdp */ set_bit(MDSS_QOS_OTLIM, mdata->mdss_qos_map); set_bit(MDSS_QOS_PER_PIPE_LUT, mdata->mdss_qos_map); set_bit(MDSS_QOS_SIMPLIFIED_PREFILL, mdata->mdss_qos_map); @@ -1998,6 +2014,7 @@ static void mdss_mdp_hw_rev_caps_init(struct mdss_data_type *mdata) mdss_mdp_init_default_prefill_factors(mdata); mdss_set_quirk(mdata, MDSS_QUIRK_DSC_RIGHT_ONLY_PU); mdss_set_quirk(mdata, MDSS_QUIRK_DSC_2SLICE_PU_THRPUT); + mdss_set_quirk(mdata, MDSS_QUIRK_MMSS_GDSC_COLLAPSE); mdata->has_wb_ubwc = true; set_bit(MDSS_CAPS_10_BIT_SUPPORTED, mdata->mdss_caps_map); set_bit(MDSS_CAPS_AVR_SUPPORTED, mdata->mdss_caps_map); @@ -3382,14 +3399,17 @@ static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev) mdata->has_panic_ctrl = of_property_read_bool(pdev->dev.of_node, "qcom,mdss-has-panic-ctrl"); if (mdata->has_panic_ctrl) { - mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, - "qcom,mdss-pipe-vig-panic-ctrl-offsets", + if (mdata->vig_pipes) + mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, + "qcom,mdss-pipe-vig-panic-ctrl-offsets", mdata->vig_pipes, mdata->nvig_pipes); - mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, - "qcom,mdss-pipe-rgb-panic-ctrl-offsets", + if (mdata->rgb_pipes) + mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, + "qcom,mdss-pipe-rgb-panic-ctrl-offsets", mdata->rgb_pipes, mdata->nrgb_pipes); - mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, - "qcom,mdss-pipe-dma-panic-ctrl-offsets", + if (mdata->dma_pipes) + mdss_mdp_parse_dt_pipe_panic_ctrl(pdev, + "qcom,mdss-pipe-dma-panic-ctrl-offsets", mdata->dma_pipes, mdata->ndma_pipes); } @@ -4880,6 +4900,13 @@ static void mdss_mdp_footswitch_ctrl(struct mdss_data_type *mdata, int on) active_cnt = atomic_read(&mdata->active_intf_cnt); if (active_cnt != 0) { /* + * Advise RPM to not turn MMSS GDSC off during + * idle case. + */ + if (mdss_has_quirk(mdata, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE)) + mdss_rpm_set_msg_ram(true); + /* * Turning off GDSC while overlays are still * active. */ @@ -4888,6 +4915,14 @@ static void mdss_mdp_footswitch_ctrl(struct mdss_data_type *mdata, int on) active_cnt); mdss_mdp_memory_retention_enter(); } else { + /* + * Advise RPM to turn MMSS GDSC off during + * suspend case + */ + if (mdss_has_quirk(mdata, + MDSS_QUIRK_MMSS_GDSC_COLLAPSE)) + mdss_rpm_set_msg_ram(false); + mdss_mdp_cx_ctrl(mdata, false); mdss_mdp_batfet_ctrl(mdata, false); } diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c index abc048866313..ebc7d2144eb9 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c +++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c @@ -91,7 +91,7 @@ static inline u64 apply_inverse_fudge_factor(u64 val, static DEFINE_MUTEX(mdss_mdp_ctl_lock); -static inline u32 mdss_mdp_get_pclk_rate(struct mdss_mdp_ctl *ctl) +static inline u64 mdss_mdp_get_pclk_rate(struct mdss_mdp_ctl *ctl) { struct mdss_panel_info *pinfo = &ctl->panel_data->panel_info; @@ -1564,9 +1564,9 @@ static void __mdss_mdp_perf_calc_ctl_helper(struct mdss_mdp_ctl *ctl, perf->prefill_bytes += tmp.prefill_bytes; if (ctl->intf_type) { - u32 clk_rate = mdss_mdp_get_pclk_rate(ctl); + u64 clk_rate = mdss_mdp_get_pclk_rate(ctl); /* minimum clock rate due to inefficiency in 3dmux */ - clk_rate = mult_frac(clk_rate >> 1, 9, 8); + clk_rate = DIV_ROUND_UP_ULL((clk_rate >> 1) * 9, 8); if (clk_rate > perf->mdp_clk_rate) perf->mdp_clk_rate = clk_rate; } @@ -2040,12 +2040,11 @@ static u64 mdss_mdp_ctl_calc_client_vote(struct mdss_data_type *mdata, return bw_sum_of_intfs; } -static void mdss_mdp_ctl_update_client_vote(struct mdss_data_type *mdata, +/* apply any adjustments to the ib quota */ +static inline u64 __calc_bus_ib_quota(struct mdss_data_type *mdata, struct mdss_mdp_perf_params *perf, bool nrt_client, u64 bw_vote) { - u64 bus_ab_quota, bus_ib_quota; - - bus_ab_quota = max(bw_vote, mdata->perf_tune.min_bus_vote); + u64 bus_ib_quota; if (test_bit(MDSS_QOS_PER_PIPE_IB, mdata->mdss_qos_map)) { if (!nrt_client) @@ -2071,6 +2070,18 @@ static void mdss_mdp_ctl_update_client_vote(struct mdss_data_type *mdata, bus_ib_quota = apply_fudge_factor(bus_ib_quota, &mdata->per_pipe_ib_factor); + return bus_ib_quota; +} + +static void mdss_mdp_ctl_update_client_vote(struct mdss_data_type *mdata, + struct mdss_mdp_perf_params *perf, bool nrt_client, u64 bw_vote) +{ + u64 bus_ab_quota, bus_ib_quota; + + bus_ab_quota = max(bw_vote, mdata->perf_tune.min_bus_vote); + bus_ib_quota = __calc_bus_ib_quota(mdata, perf, nrt_client, bw_vote); + + bus_ab_quota = apply_fudge_factor(bus_ab_quota, &mdss_res->ab_factor); ATRACE_INT("bus_quota", bus_ib_quota); @@ -2232,6 +2243,46 @@ static bool is_traffic_shaper_enabled(struct mdss_data_type *mdata) return false; } +static bool __mdss_mdp_compare_bw( + struct mdss_mdp_ctl *ctl, + struct mdss_mdp_perf_params *new_perf, + struct mdss_mdp_perf_params *old_perf, + bool params_changed, + bool stop_req) +{ + struct mdss_data_type *mdata = ctl->mdata; + bool is_nrt = mdss_mdp_is_nrt_ctl_path(ctl); + u64 new_ib = + __calc_bus_ib_quota(mdata, new_perf, is_nrt, new_perf->bw_ctl); + u64 old_ib = + __calc_bus_ib_quota(mdata, old_perf, is_nrt, old_perf->bw_ctl); + u64 max_new_bw = max(new_perf->bw_ctl, new_ib); + u64 max_old_bw = max(old_perf->bw_ctl, old_ib); + bool update_bw = false; + + /* + * three cases for bus bandwidth update. + * 1. new bandwidth vote (ab or ib) or writeback output vote + * are higher than current vote for update request. + * 2. new bandwidth vote or writeback output vote are + * lower than current vote at end of commit or stop. + * 3. end of writeback/rotator session - last chance to + * non-realtime remove vote. + */ + if ((params_changed && ((max_new_bw > max_old_bw) || /* ab and ib bw */ + (new_perf->bw_writeback > old_perf->bw_writeback))) || + (!params_changed && ((max_new_bw < max_old_bw) || + (new_perf->bw_writeback < old_perf->bw_writeback))) || + (stop_req && is_nrt)) + update_bw = true; + + trace_mdp_compare_bw(new_perf->bw_ctl, new_ib, new_perf->bw_writeback, + max_new_bw, old_perf->bw_ctl, old_ib, old_perf->bw_writeback, + max_old_bw, params_changed, update_bw); + + return update_bw; +} + static void mdss_mdp_ctl_perf_update(struct mdss_mdp_ctl *ctl, int params_changed, bool stop_req) { @@ -2267,20 +2318,8 @@ static void mdss_mdp_ctl_perf_update(struct mdss_mdp_ctl *ctl, else if (is_bw_released || params_changed) mdss_mdp_perf_calc_ctl(ctl, new); - /* - * three cases for bus bandwidth update. - * 1. new bandwidth vote or writeback output vote - * are higher than current vote for update request. - * 2. new bandwidth vote or writeback output vote are - * lower than current vote at end of commit or stop. - * 3. end of writeback/rotator session - last chance to - * non-realtime remove vote. - */ - if ((params_changed && ((new->bw_ctl > old->bw_ctl) || - (new->bw_writeback > old->bw_writeback))) || - (!params_changed && ((new->bw_ctl < old->bw_ctl) || - (new->bw_writeback < old->bw_writeback))) || - (stop_req && mdss_mdp_is_nrt_ctl_path(ctl))) { + if (__mdss_mdp_compare_bw(ctl, new, old, params_changed, + stop_req)) { pr_debug("c=%d p=%d new_bw=%llu,old_bw=%llu\n", ctl->num, params_changed, new->bw_ctl, @@ -2925,6 +2964,7 @@ static u32 __dsc_get_common_mode(struct mdss_mdp_ctl *ctl, bool mux_3d) static void __dsc_get_pic_dim(struct mdss_mdp_mixer *mixer_l, struct mdss_mdp_mixer *mixer_r, u32 *pic_w, u32 *pic_h) { + struct mdss_data_type *mdata = NULL; bool valid_l = mixer_l && mixer_l->valid_roi; bool valid_r = mixer_r && mixer_r->valid_roi; @@ -2932,13 +2972,29 @@ static void __dsc_get_pic_dim(struct mdss_mdp_mixer *mixer_l, *pic_h = 0; if (valid_l) { - *pic_w = mixer_l->roi.w; - *pic_h = mixer_l->roi.h; + mdata = mixer_l->ctl->mdata; + if (test_bit(MDSS_CAPS_DEST_SCALER, mdata->mdss_caps_map) && + mixer_l->ds && + (mixer_l->ds->flags & DS_ENABLE)) { + *pic_w = mixer_l->ds->scaler.dst_width; + *pic_h = mixer_l->ds->scaler.dst_height; + } else { + *pic_w = mixer_l->roi.w; + *pic_h = mixer_l->roi.h; + } } if (valid_r) { - *pic_w += mixer_r->roi.w; - *pic_h = mixer_r->roi.h; + mdata = mixer_r->ctl->mdata; + if (test_bit(MDSS_CAPS_DEST_SCALER, mdata->mdss_caps_map) && + mixer_r->ds && + (mixer_r->ds->flags & DS_ENABLE)) { + *pic_w += mixer_r->ds->scaler.dst_width; + *pic_h = mixer_r->ds->scaler.dst_height; + } else { + *pic_w += mixer_r->roi.w; + *pic_h = mixer_r->roi.h; + } } } @@ -5302,7 +5358,8 @@ int mdss_mdp_display_wakeup_time(struct mdss_mdp_ctl *ctl, ktime_t *wakeup_time) { struct mdss_panel_info *pinfo; - u32 clk_rate, clk_period; + u64 clk_rate; + u32 clk_period; u32 current_line, total_line; u32 time_of_line, time_to_vsync, adjust_line_ns; @@ -5317,7 +5374,7 @@ int mdss_mdp_display_wakeup_time(struct mdss_mdp_ctl *ctl, clk_rate = mdss_mdp_get_pclk_rate(ctl); - clk_rate /= 1000; /* in kHz */ + clk_rate = DIV_ROUND_UP_ULL(clk_rate, 1000); /* in kHz */ if (!clk_rate) return -EINVAL; @@ -5326,7 +5383,7 @@ int mdss_mdp_display_wakeup_time(struct mdss_mdp_ctl *ctl, * accuracy with high pclk rate and this number is in 17 bit * range. */ - clk_period = 1000000000 / clk_rate; + clk_period = DIV_ROUND_UP_ULL(1000000000, clk_rate); if (!clk_period) return -EINVAL; @@ -5365,7 +5422,7 @@ int mdss_mdp_display_wakeup_time(struct mdss_mdp_ctl *ctl, *wakeup_time = ktime_add_ns(current_time, time_to_vsync); - pr_debug("clk_rate=%dkHz clk_period=%d cur_line=%d tot_line=%d\n", + pr_debug("clk_rate=%lldkHz clk_period=%d cur_line=%d tot_line=%d\n", clk_rate, clk_period, current_line, total_line); pr_debug("time_to_vsync=%d current_time=%d wakeup_time=%d\n", time_to_vsync, (int)ktime_to_ms(current_time), diff --git a/drivers/video/fbdev/msm/mdss_mdp_debug.c b/drivers/video/fbdev/msm/mdss_mdp_debug.c index 9e3c2b7cdd1b..4c4fa9ea98d0 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_debug.c +++ b/drivers/video/fbdev/msm/mdss_mdp_debug.c @@ -1715,17 +1715,26 @@ static struct debug_bus dbg_bus_msmcobalt[] = { { 0x418, 60, 0}, }; - static struct vbif_debug_bus vbif_dbg_bus_8996[] = { - {0x214, 0x21c, 16, 2, 0x10}, /* arb clients */ - {0x214, 0x21c, 0, 14, 0x13}, /* xin blocks - axi side */ - {0x21c, 0x214, 0, 14, 0xc}, /* xin blocks - clock side */ + {0x214, 0x21c, 16, 2, 0, 0x10}, /* arb clients */ + {0x214, 0x21c, 0, 14, 0, 0x13}, /* xin blocks - axi side */ + {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */ }; static struct vbif_debug_bus nrt_vbif_dbg_bus_8996[] = { - {0x214, 0x21c, 16, 1, 0x10}, /* arb clients */ - {0x214, 0x21c, 0, 12, 0x13}, /* xin blocks - axi side */ - {0x21c, 0x214, 0, 12, 0xc}, /* xin blocks - clock side */ + {0x214, 0x21c, 16, 1, 0, 0x10}, /* arb clients */ + {0x214, 0x21c, 0, 12, 0, 0x13}, /* xin blocks - axi side */ + {0x21c, 0x214, 0, 12, 0, 0xc}, /* xin blocks - clock side */ +}; + +static struct vbif_debug_bus vbif_dbg_bus_msmcobalt[] = { + {0x214, 0x21c, 16, 2, 0x0, 0xd}, /* arb clients */ + {0x214, 0x21c, 16, 2, 0x80, 0xc0}, /* arb clients */ + {0x214, 0x21c, 16, 2, 0x100, 0x140}, /* arb clients */ + {0x214, 0x21c, 0, 16, 0x0, 0xf}, /* xin blocks - axi side */ + {0x214, 0x21c, 0, 16, 0x80, 0xa4}, /* xin blocks - axi side */ + {0x214, 0x21c, 0, 15, 0x100, 0x124}, /* xin blocks - axi side */ + {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */ }; void mdss_mdp_hw_rev_debug_caps_init(struct mdss_data_type *mdata) @@ -1750,8 +1759,8 @@ void mdss_mdp_hw_rev_debug_caps_init(struct mdss_data_type *mdata) case MDSS_MDP_HW_REV_301: mdata->dbg_bus = dbg_bus_msmcobalt; mdata->dbg_bus_size = ARRAY_SIZE(dbg_bus_msmcobalt); - mdata->vbif_dbg_bus = vbif_dbg_bus_8996; - mdata->vbif_dbg_bus_size = ARRAY_SIZE(vbif_dbg_bus_8996); + mdata->vbif_dbg_bus = vbif_dbg_bus_msmcobalt; + mdata->vbif_dbg_bus_size = ARRAY_SIZE(vbif_dbg_bus_msmcobalt); mdata->nrt_vbif_dbg_bus = nrt_vbif_dbg_bus_8996; mdata->nrt_vbif_dbg_bus_size = ARRAY_SIZE(nrt_vbif_dbg_bus_8996); diff --git a/drivers/video/fbdev/msm/mdss_mdp_hwio.h b/drivers/video/fbdev/msm/mdss_mdp_hwio.h index 5d8c83126b1b..76fd2d12ac95 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_hwio.h +++ b/drivers/video/fbdev/msm/mdss_mdp_hwio.h @@ -822,6 +822,7 @@ enum mdss_mdp_pingpong_index { #define MDSS_MDP_DSPP_DEBUGBUS_STATUS 0x34C /* Following offsets are with respect to MDP base */ +#define MDSS_MDP_HDMI_DP_CORE_SELECT 0x408 #define MDSS_MDP_MDP_OUT_CTL_0 0x410 #define MDSS_MDP_INTF_CMD_MISR_CTRL (MDSS_MDP_INTF_MISR_CTRL + 0x8) #define MDSS_MDP_INTF_CMD_MISR_SIGNATURE (MDSS_MDP_INTF_MISR_CTRL + 0xC) diff --git a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c index 3aadb3950442..d316ab6d263a 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_intf_video.c +++ b/drivers/video/fbdev/msm/mdss_mdp_intf_video.c @@ -316,7 +316,8 @@ static void mdss_mdp_video_intf_recovery(void *data, int event) struct mdss_mdp_ctl *ctl = data; struct mdss_panel_info *pinfo; u32 line_cnt, min_ln_cnt, active_lns_cnt; - u32 clk_rate, clk_period, time_of_line; + u64 clk_rate; + u32 clk_period, time_of_line; u32 delay; if (!data) { @@ -344,7 +345,7 @@ static void mdss_mdp_video_intf_recovery(void *data, int event) pinfo->mipi.dsi_pclk_rate : pinfo->clk_rate); - clk_rate /= 1000; /* in kHz */ + clk_rate = DIV_ROUND_UP_ULL(clk_rate, 1000); /* in kHz */ if (!clk_rate) { pr_err("Unable to get proper clk_rate\n"); return; @@ -354,7 +355,7 @@ static void mdss_mdp_video_intf_recovery(void *data, int event) * accuracy with high pclk rate and this number is in 17 bit * range. */ - clk_period = 1000000000 / clk_rate; + clk_period = DIV_ROUND_UP_ULL(1000000000, clk_rate); if (!clk_period) { pr_err("Unable to calculate clock period\n"); return; @@ -1851,6 +1852,7 @@ static int mdss_mdp_video_ctx_setup(struct mdss_mdp_ctl *ctl, u32 dst_bpp; struct mdss_data_type *mdata = ctl->mdata; struct dsc_desc *dsc = NULL; + u32 hdmi_dp_core; ctx->ctl = ctl; ctx->intf_type = ctl->intf_type; @@ -1972,6 +1974,11 @@ static int mdss_mdp_video_ctx_setup(struct mdss_mdp_ctl *ctl, mdp_video_write(ctx, MDSS_MDP_REG_INTF_PANEL_FORMAT, ctl->dst_format); + hdmi_dp_core = (ctx->intf_type == MDSS_INTF_EDP) ? 1 : 0; + + writel_relaxed(hdmi_dp_core, mdata->mdp_base + + MDSS_MDP_HDMI_DP_CORE_SELECT); + return 0; } diff --git a/drivers/video/fbdev/msm/mdss_mdp_layer.c b/drivers/video/fbdev/msm/mdss_mdp_layer.c index d3a836ed2519..91d4332700b6 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_layer.c +++ b/drivers/video/fbdev/msm/mdss_mdp_layer.c @@ -137,10 +137,7 @@ static int mdss_mdp_destination_scaler_pre_validate(struct mdss_mdp_ctl *ctl, if ((ds_data->lm_width > get_panel_xres(pinfo)) || (ds_data->lm_height > get_panel_yres(pinfo)) || (ds_data->lm_width == 0) || - (ds_data->lm_height == 0) || - (is_dsc_compression(pinfo) && - !is_lm_configs_dsc_compatible(pinfo, - ds_data->lm_width, ds_data->lm_height))) { + (ds_data->lm_height == 0)) { pr_err("Invalid left LM {%d,%d} setting\n", ds_data->lm_width, ds_data->lm_height); return -EINVAL; @@ -167,10 +164,7 @@ static int mdss_mdp_destination_scaler_pre_validate(struct mdss_mdp_ctl *ctl, if ((ds_data->lm_width > get_panel_xres(pinfo)) || (ds_data->lm_height > get_panel_yres(pinfo)) || (ds_data->lm_width == 0) || - (ds_data->lm_height == 0) || - (is_dsc_compression(pinfo) && - !is_lm_configs_dsc_compatible(pinfo, - ds_data->lm_width, ds_data->lm_height))) { + (ds_data->lm_height == 0)) { pr_err("Invalid right LM {%d,%d} setting\n", ds_data->lm_width, ds_data->lm_height); return -EINVAL; @@ -217,6 +211,8 @@ static int mdss_mdp_validate_destination_scaler(struct msm_fb_data_type *mfd, struct mdss_mdp_ctl *ctl; struct mdss_mdp_destination_scaler *ds_left = NULL; struct mdss_mdp_destination_scaler *ds_right = NULL; + struct mdss_panel_info *pinfo; + u32 scaler_width, scaler_height; if (ds_data) { mdata = mfd_to_mdata(mfd); @@ -293,6 +289,31 @@ static int mdss_mdp_validate_destination_scaler(struct msm_fb_data_type *mfd, if (ds_right) pr_debug("DS_RIGHT: flags=0x%X\n", ds_right->flags); + /* + * When DSC is enabled, make sure the scaler output dimension is + * correctly setup. + */ + pinfo = &ctl->panel_data->panel_info; + scaler_width = 0; + scaler_height = 0; + if (ds_left && ds_left->flags) { + scaler_width += ds_left->scaler.dst_width; + scaler_height = ds_left->scaler.dst_height; + } + if (ds_right && ds_right->flags) { + scaler_width += ds_right->scaler.dst_width; + scaler_height = ds_right->scaler.dst_height; + } + pr_debug("DS output dimension: %dx%d\n", scaler_width, scaler_height); + + if (ds_data[0].flags && (is_dsc_compression(pinfo) && + !is_lm_configs_dsc_compatible(pinfo, + scaler_width, scaler_height))) { + pr_err("Invalid Dest-scaler output width/height: %d/%d\n", + scaler_width, scaler_height); + ret = -EINVAL; + } + return ret; } diff --git a/drivers/video/fbdev/msm/mdss_mdp_pipe.c b/drivers/video/fbdev/msm/mdss_mdp_pipe.c index 1eb695200dfe..8f211a977aa4 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pipe.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pipe.c @@ -2066,8 +2066,9 @@ static void mdss_mdp_set_pipe_cdp(struct mdss_mdp_pipe *pipe) u32 cdp_settings = 0x0; bool is_rotator = (pipe->mixer_left && pipe->mixer_left->rotator_mode); - /* Disable CDP for rotator pipe in v1 */ - if (is_rotator && mdss_has_quirk(mdata, MDSS_QUIRK_ROTCDP)) + /* Disable CDP for rotator pipe or if not requested for the target */ + if (!mdata->enable_cdp || (is_rotator && + mdss_has_quirk(mdata, MDSS_QUIRK_ROTCDP))) goto exit; cdp_settings = MDSS_MDP_CDP_ENABLE; diff --git a/drivers/video/fbdev/msm/mdss_mdp_trace.h b/drivers/video/fbdev/msm/mdss_mdp_trace.h index 85829fbba075..648e4fcd1cd2 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_trace.h +++ b/drivers/video/fbdev/msm/mdss_mdp_trace.h @@ -295,6 +295,46 @@ TRACE_EVENT(mdp_perf_update_bus, __entry->ib_quota) ); +TRACE_EVENT(mdp_compare_bw, + TP_PROTO(unsigned long long new_ab, unsigned long long new_ib, + unsigned long long new_wb, unsigned long long new_max, + unsigned long long old_ab, unsigned long long old_ib, + unsigned long long old_wb, unsigned long long old_max, + u32 params_changed, bool update_bw), + TP_ARGS(new_ab, new_ib, new_wb, new_max, + old_ab, old_ib, old_wb, old_max, + params_changed, update_bw), + TP_STRUCT__entry( + __field(u64, new_ab) + __field(u64, new_ib) + __field(u64, new_wb) + __field(u64, new_max) + __field(u64, old_ab) + __field(u64, old_ib) + __field(u64, old_wb) + __field(u64, old_max) + __field(u32, params_changed) + __field(bool, update_bw) + ), + TP_fast_assign( + __entry->new_ab = new_ab; + __entry->new_ib = new_ib; + __entry->new_wb = new_wb; + __entry->new_max = new_max; + __entry->old_ab = old_ab; + __entry->old_ib = old_ib; + __entry->old_wb = old_wb; + __entry->old_max = old_max; + __entry->params_changed = params_changed; + __entry->update_bw = update_bw; + ), + TP_printk("[ab,ib,wb,max] new[%llu, %llu, %llu, %llu] old[%llu, %llu, %llu, %llu] parm:%d ret:%d", + __entry->new_ab, __entry->new_ib, __entry->new_wb, + __entry->new_max, __entry->old_ab, __entry->old_ib, + __entry->old_wb, __entry->old_max, __entry->params_changed, + __entry->update_bw) +); + TRACE_EVENT(mdp_misr_crc, TP_PROTO(u32 block_id, u32 vsync_cnt, u32 crc), TP_ARGS(block_id, vsync_cnt, crc), diff --git a/drivers/video/fbdev/msm/mdss_mdp_wfd.c b/drivers/video/fbdev/msm/mdss_mdp_wfd.c index 656967831810..f04450e9974c 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_wfd.c +++ b/drivers/video/fbdev/msm/mdss_mdp_wfd.c @@ -430,7 +430,7 @@ int mdss_mdp_cwb_validate(struct msm_fb_data_type *mfd, return rc; fmt = mdss_mdp_get_format_params(layer->buffer.format); - if (!(fmt->flag & VALID_MDP_WB_INTF_FORMAT)) { + if (!fmt || (fmt && !(fmt->flag & VALID_MDP_WB_INTF_FORMAT))) { pr_err("wb does not support dst fmt:%d\n", layer->buffer.format); return -EINVAL; diff --git a/drivers/video/fbdev/msm/mdss_panel.c b/drivers/video/fbdev/msm/mdss_panel.c index 97025b3a9c23..16c2d4e6e92d 100644 --- a/drivers/video/fbdev/msm/mdss_panel.c +++ b/drivers/video/fbdev/msm/mdss_panel.c @@ -426,8 +426,8 @@ int mdss_panel_debugfs_panel_setup(struct mdss_panel_debugfs_info *debugfs_info, (u32 *)&debugfs_info->panel_info.min_fps); debugfs_create_u32("max_refresh_rate", 0644, debugfs_info->root, (u32 *)&debugfs_info->panel_info.max_fps); - debugfs_create_u32("clk_rate", 0644, debugfs_info->root, - (u32 *)&debugfs_info->panel_info.clk_rate); + debugfs_create_u64("clk_rate", 0644, debugfs_info->root, + (u64 *)&debugfs_info->panel_info.clk_rate); debugfs_create_u32("bl_min", 0644, debugfs_info->root, (u32 *)&debugfs_info->panel_info.bl_min); debugfs_create_u32("bl_max", 0644, debugfs_info->root, diff --git a/drivers/video/fbdev/msm/mdss_panel.h b/drivers/video/fbdev/msm/mdss_panel.h index 81b6fa7d35b3..b2b647dcc017 100644 --- a/drivers/video/fbdev/msm/mdss_panel.h +++ b/drivers/video/fbdev/msm/mdss_panel.h @@ -688,6 +688,7 @@ struct mdss_panel_info { void *edid_data; void *dba_data; void *cec_data; + void *hdcp_1x_data; char panel_name[MDSS_MAX_PANEL_LEN]; struct mdss_mdp_pp_tear_check te; diff --git a/drivers/video/fbdev/msm/msm_mdss_io_8974.c b/drivers/video/fbdev/msm/msm_mdss_io_8974.c index 1f62232e196b..b5b5a026733e 100644 --- a/drivers/video/fbdev/msm/msm_mdss_io_8974.c +++ b/drivers/video/fbdev/msm/msm_mdss_io_8974.c @@ -2341,18 +2341,8 @@ int mdss_dsi_post_clkoff_cb(void *priv, pdata = &ctrl->panel_data; for (i = DSI_MAX_PM - 1; i >= DSI_CORE_PM; i--) { - /* - * if DSI state is active - * 1. allow to turn off the core power module. - * 2. allow to turn off phy power module if it is - * turned off - * - * allow to turn off all power modules if DSI is not - * active - */ if ((ctrl->ctrl_state & CTRL_STATE_DSI_ACTIVE) && - (i != DSI_CORE_PM) && - (ctrl->phy_power_off && (i != DSI_PHY_PM))) + (i != DSI_CORE_PM)) continue; rc = msm_dss_enable_vreg( sdata->power_data[i].vreg_config, @@ -2397,15 +2387,12 @@ int mdss_dsi_pre_clkon_cb(void *priv, * 3.> CTRL_PM need to be enabled/disabled * only during unblank/blank. Their state should * not be changed during static screen. - * 4.> PHY_PM can be turned enabled/disabled - * if phy regulators are enabled/disabled. */ pr_debug("%s: Enable DSI core power\n", __func__); for (i = DSI_CORE_PM; i < DSI_MAX_PM; i++) { if ((ctrl->ctrl_state & CTRL_STATE_DSI_ACTIVE) && (!pdata->panel_info.cont_splash_enabled) && - (i != DSI_CORE_PM) && - (ctrl->phy_power_off && (i != DSI_PHY_PM))) + (i != DSI_CORE_PM)) continue; rc = msm_dss_enable_vreg( sdata->power_data[i].vreg_config, diff --git a/include/dt-bindings/msm/msm-bus-ids.h b/include/dt-bindings/msm/msm-bus-ids.h index f7139500e866..bfd774a99963 100644 --- a/include/dt-bindings/msm/msm-bus-ids.h +++ b/include/dt-bindings/msm/msm-bus-ids.h @@ -162,7 +162,9 @@ #define MSM_BUS_MASTER_CNOC_A2NOC 118 #define MSM_BUS_MASTER_WLAN 119 #define MSM_BUS_MASTER_MSS_CE 120 -#define MSM_BUS_MASTER_MASTER_LAST 121 +#define MSM_BUS_MASTER_CDSP_PROC 121 +#define MSM_BUS_MASTER_GNOC_SNOC 122 +#define MSM_BUS_MASTER_MASTER_LAST 123 #define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB @@ -463,7 +465,16 @@ #define MSM_BUS_SLAVE_TLMM_NORTH 731 #define MSM_BUS_SLAVE_TLMM_WEST 732 #define MSM_BUS_SLAVE_SKL 733 -#define MSM_BUS_SLAVE_LAST 734 +#define MSM_BUS_SLAVE_LPASS_TCM 734 +#define MSM_BUS_SLAVE_TLMM_SOUTH 735 +#define MSM_BUS_SLAVE_TLMM_CENTER 736 +#define MSM_BUS_MSS_NAV_CE_MPU_CFG 737 +#define MSM_BUS_SLAVE_A2NOC_THROTTLE_CFG 738 +#define MSM_BUS_SLAVE_CDSP 739 +#define MSM_BUS_SLAVE_CDSP_SMMU_CFG 740 +#define MSM_BUS_SLAVE_LPASS_MPU_CFG 741 +#define MSM_BUS_SLAVE_CSI_PHY_CFG 742 +#define MSM_BUS_SLAVE_LAST 743 #define MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB @@ -633,6 +644,8 @@ #define ICBID_MASTER_CNOC_A2NOC 146 #define ICBID_MASTER_WLAN 147 #define ICBID_MASTER_MSS_CE 148 +#define ICBID_MASTER_CDSP_PROC 149 +#define ICBID_MASTER_GNOC_SNOC 150 #define ICBID_SLAVE_EBI1 0 #define ICBID_SLAVE_APPSS_L2 1 @@ -861,4 +874,13 @@ #define ICBID_SLAVE_TLMM_EAST 213 #define ICBID_SLAVE_TLMM_NORTH 214 #define ICBID_SLAVE_TLMM_WEST 215 +#define ICBID_SLAVE_LPASS_TCM 216 +#define ICBID_SLAVE_TLMM_SOUTH 217 +#define ICBID_SLAVE_TLMM_CENTER 218 +#define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 219 +#define ICBID_SLAVE_A2NOC_THROTTLE_CFG 220 +#define ICBID_SLAVE_CDSP 221 +#define ICBID_SLAVE_CDSP_SMMU_CFG 222 +#define ICBID_SLAVE_LPASS_MPU_CFG 223 +#define ICBID_SLAVE_CSI_PHY_CFG 224 #endif diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 95fd207e63ca..4f28b91f49c5 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -992,6 +992,11 @@ extern int perf_cpu_time_max_percent_handler(struct ctl_table *table, int write, loff_t *ppos); +static inline bool perf_paranoid_any(void) +{ + return sysctl_perf_event_paranoid > 2; +} + static inline bool perf_paranoid_tracepoint_raw(void) { return sysctl_perf_event_paranoid > -1; diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 2c64620254eb..143e556f141d 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -752,7 +752,6 @@ struct usb_gadget { unsigned is_selfpowered:1; unsigned deactivated:1; unsigned connected:1; - bool l1_supported; bool remote_wakeup; }; #define work_to_gadget(w) (container_of((w), struct usb_gadget, work)) diff --git a/include/net/cnss.h b/include/net/cnss.h index 5508d5e46d18..7fce7db19e54 100644 --- a/include/net/cnss.h +++ b/include/net/cnss.h @@ -108,6 +108,7 @@ enum cnss_runtime_request { CNSS_PM_RUNTIME_PUT_NOIDLE, CNSS_PM_REQUEST_RESUME, CNSS_PM_RUNTIME_PUT_AUTO, + CNSS_PM_GET_NORESUME, }; extern int cnss_get_fw_image(struct image_desc_info *image_desc_info); diff --git a/include/soc/qcom/icnss.h b/include/soc/qcom/icnss.h index efc5425cf17d..8704b2e7cfbc 100644 --- a/include/soc/qcom/icnss.h +++ b/include/soc/qcom/icnss.h @@ -119,6 +119,7 @@ extern int icnss_power_off(struct device *dev); extern struct dma_iommu_mapping *icnss_smmu_get_mapping(struct device *dev); extern int icnss_smmu_map(struct device *dev, phys_addr_t paddr, uint32_t *iova_addr, size_t size); +extern unsigned int icnss_socinfo_get_serial_number(struct device *dev); extern int icnss_set_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 ch_count); extern int icnss_get_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 *ch_count, u16 buf_len); diff --git a/include/soc/qcom/service-notifier.h b/include/soc/qcom/service-notifier.h index 598c91f7c9e2..eae879786d59 100644 --- a/include/soc/qcom/service-notifier.h +++ b/include/soc/qcom/service-notifier.h @@ -24,6 +24,11 @@ enum qmi_servreg_notif_service_state_enum_type_v01 { SERVREG_NOTIF_SERVICE_STATE_UNINIT_V01 = 0x7FFFFFFF, }; +enum pd_subsys_state { + CRASHED, + SHUTDOWN, + UNKNOWN, +}; #if defined(CONFIG_MSM_SERVICE_NOTIFIER) /* service_notif_register_notifier() - Register a notifier for a service diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h index 636ae899c304..e1bdca690cc9 100644 --- a/include/sound/apr_audio-v2.h +++ b/include/sound/apr_audio-v2.h @@ -896,20 +896,24 @@ struct adm_cmd_connect_afe_port_v5 { #define AFE_PORT_ID_TERTIARY_MI2S_TX 0x1005 #define AFE_PORT_ID_QUATERNARY_MI2S_RX 0x1006 #define AFE_PORT_ID_QUATERNARY_MI2S_TX 0x1007 -#define AUDIO_PORT_ID_I2S_RX 0x1008 +#define AUDIO_PORT_ID_I2S_RX 0x1008 #define AFE_PORT_ID_DIGITAL_MIC_TX 0x1009 #define AFE_PORT_ID_PRIMARY_PCM_RX 0x100A #define AFE_PORT_ID_PRIMARY_PCM_TX 0x100B #define AFE_PORT_ID_SECONDARY_PCM_RX 0x100C #define AFE_PORT_ID_SECONDARY_PCM_TX 0x100D #define AFE_PORT_ID_MULTICHAN_HDMI_RX 0x100E -#define AFE_PORT_ID_SECONDARY_MI2S_RX_SD1 0x1010 -#define AFE_PORT_ID_QUINARY_MI2S_RX 0x1016 -#define AFE_PORT_ID_QUINARY_MI2S_TX 0x1017 +#define AFE_PORT_ID_SECONDARY_MI2S_RX_SD1 0x1010 +#define AFE_PORT_ID_TERTIARY_PCM_RX 0x1012 +#define AFE_PORT_ID_TERTIARY_PCM_TX 0x1013 +#define AFE_PORT_ID_QUATERNARY_PCM_RX 0x1014 +#define AFE_PORT_ID_QUATERNARY_PCM_TX 0x1015 +#define AFE_PORT_ID_QUINARY_MI2S_RX 0x1016 +#define AFE_PORT_ID_QUINARY_MI2S_TX 0x1017 /* ID of the senary MI2S Rx port. */ -#define AFE_PORT_ID_SENARY_MI2S_RX 0x1018 +#define AFE_PORT_ID_SENARY_MI2S_RX 0x1018 /* ID of the senary MI2S Tx port. */ -#define AFE_PORT_ID_SENARY_MI2S_TX 0x1019 +#define AFE_PORT_ID_SENARY_MI2S_TX 0x1019 #define AFE_PORT_ID_SPDIF_RX 0x5000 #define AFE_PORT_ID_RT_PROXY_PORT_001_RX 0x2000 #define AFE_PORT_ID_RT_PROXY_PORT_001_TX 0x2001 diff --git a/include/sound/q6afe-v2.h b/include/sound/q6afe-v2.h index b252463b72a2..9ed6510cd0e1 100644 --- a/include/sound/q6afe-v2.h +++ b/include/sound/q6afe-v2.h @@ -183,6 +183,10 @@ enum { IDX_AFE_PORT_ID_USB_TX, /* IDX 124 */ IDX_DISPLAY_PORT_RX, + IDX_AFE_PORT_ID_TERTIARY_PCM_RX, + IDX_AFE_PORT_ID_TERTIARY_PCM_TX, + IDX_AFE_PORT_ID_QUATERNARY_PCM_RX, + IDX_AFE_PORT_ID_QUATERNARY_PCM_TX, AFE_MAX_PORTS }; diff --git a/include/uapi/linux/ipa_qmi_service_v01.h b/include/uapi/linux/ipa_qmi_service_v01.h index c26a3ccf3645..60867630e1a1 100644 --- a/include/uapi/linux/ipa_qmi_service_v01.h +++ b/include/uapi/linux/ipa_qmi_service_v01.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -44,6 +44,7 @@ #define QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01 2 #define QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01 2 #define QMI_IPA_MAX_FILTERS_V01 64 +#define QMI_IPA_MAX_FILTERS_EX_V01 128 #define QMI_IPA_MAX_PIPES_V01 20 #define QMI_IPA_MAX_APN_V01 8 @@ -1543,6 +1544,84 @@ struct ipa_stop_data_usage_quota_resp_msg_v01 { /**< Standard response type.*/ }; /* Message */ +/* Request Message; Request from Modem IPA driver to set DPL peripheral pipe */ +struct ipa_install_fltr_rule_req_ex_msg_v01 { + + /* Optional */ + /* Extended Filter Specification */ + uint8_t filter_spec_ex_list_valid; + uint32_t filter_spec_ex_list_len; + struct ipa_filter_spec_ex_type_v01 + filter_spec_ex_list[QMI_IPA_MAX_FILTERS_EX_V01]; + /* List of filter specifications of filters that must be installed in + the IPAv3.x hardware. + The driver installing these rules must do so in the same order as + specified in this list. + */ + + /* Optional */ + /* Pipe Index to Install Rule */ + uint8_t source_pipe_index_valid; + uint32_t source_pipe_index; + /* Pipe index to install the filter rule. + The requester may not always know the pipe indices. If not specified, + the receiver must install this rule on all pipes that it controls, + through which data may be fed into the IPA. + */ + + /* Optional */ + /* Total Number of IPv4 Filters in the Filter Spec List */ + uint8_t num_ipv4_filters_valid; + uint32_t num_ipv4_filters; + /* Number of IPv4 rules included in the filter specification list. + */ + + /* Optional */ + /* Total Number of IPv6 Filters in the Filter Spec List */ + uint8_t num_ipv6_filters_valid; + uint32_t num_ipv6_filters; + /* Number of IPv6 rules included in the filter specification list. + */ + + /* Optional */ + /* List of XLAT Filter Indices in the Filter Spec List */ + uint8_t xlat_filter_indices_list_valid; + uint32_t xlat_filter_indices_list_len; + uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_EX_V01]; + /* List of XLAT filter indices. + Filter rules at specified indices must be modified by the + receiver if the PDN is XLAT before installing them on the associated + IPA consumer pipe. + */ +}; /* Message */ + +/* Response Message; Requests installation of filtering rules in the hardware + * block on the remote side. + */ +struct ipa_install_fltr_rule_resp_ex_msg_v01 { + /* Mandatory */ + /* Result Code */ + struct ipa_qmi_response_type_v01 resp; + /* Standard response type. + Standard response type. Contains the following data members: + - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE + - qmi_error_type -- Error code. Possible error code values are + described in the error codes + section of each message + definition. + */ + + /* Optional */ + /* Rule ID List */ + uint8_t rule_id_valid; + uint32_t rule_id_len; + uint32_t rule_id[QMI_IPA_MAX_FILTERS_EX_V01]; + /* List of rule IDs returned to the control point. + Any further reference to the rule is done using the filter rule ID + specified in this list. + */ +}; /* Message */ + /*Service Message Definition*/ #define QMI_IPA_INDICATION_REGISTER_REQ_V01 0x0020 #define QMI_IPA_INDICATION_REGISTER_RESP_V01 0x0020 @@ -1574,6 +1653,8 @@ struct ipa_stop_data_usage_quota_resp_msg_v01 { #define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_V01 0x0034 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_V01 0x0035 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_V01 0x0035 +#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01 0x0037 +#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_V01 0x0037 /* add for max length*/ #define QMI_IPA_INIT_MODEM_DRIVER_REQ_MAX_MSG_LEN_V01 134 @@ -1612,6 +1693,9 @@ struct ipa_stop_data_usage_quota_resp_msg_v01 { #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_MAX_MSG_LEN_V01 4 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_MAX_MSG_LEN_V01 7 +#define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01 22685 +#define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_MAX_MSG_LEN_V01 523 + /* Service Object Accessor */ #endif/* IPA_QMI_SERVICE_V01_H */ diff --git a/include/uapi/linux/rmnet_ipa_fd_ioctl.h b/include/uapi/linux/rmnet_ipa_fd_ioctl.h index cbffbf6c2925..228bfe8274c6 100644 --- a/include/uapi/linux/rmnet_ipa_fd_ioctl.h +++ b/include/uapi/linux/rmnet_ipa_fd_ioctl.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -31,6 +31,7 @@ #define WAN_IOCTL_QUERY_TETHER_STATS 6 #define WAN_IOCTL_RESET_TETHER_STATS 7 #define WAN_IOCTL_QUERY_DL_FILTER_STATS 8 +#define WAN_IOCTL_ADD_FLT_RULE_EX 9 /* User space may not have this defined. */ #ifndef IFNAMSIZ @@ -150,4 +151,8 @@ struct wan_ioctl_query_dl_filter_stats { WAN_IOCTL_QUERY_DL_FILTER_STATS, \ struct wan_ioctl_query_dl_filter_stats *) +#define WAN_IOC_ADD_FLT_RULE_EX _IOWR(WAN_IOC_MAGIC, \ + WAN_IOCTL_ADD_FLT_RULE_EX, \ + struct ipa_install_fltr_rule_req_ex_msg_v01 *) + #endif /* _RMNET_IPA_FD_IOCTL_H */ diff --git a/kernel/cgroup.c b/kernel/cgroup.c index e8d71110ed2a..ad4a12371069 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c @@ -4744,14 +4744,15 @@ static void css_free_work_fn(struct work_struct *work) if (ss) { /* css free path */ + struct cgroup_subsys_state *parent = css->parent; int id = css->id; - if (css->parent) - css_put(css->parent); - ss->css_free(css); cgroup_idr_remove(&ss->css_idr, id); cgroup_put(cgrp); + + if (parent) + css_put(parent); } else { /* cgroup free path */ atomic_dec(&cgrp->root->nr_cgrps); diff --git a/kernel/cpuset.c b/kernel/cpuset.c index 69d25607d41b..a7ec545308a6 100644 --- a/kernel/cpuset.c +++ b/kernel/cpuset.c @@ -326,8 +326,7 @@ static struct file_system_type cpuset_fs_type = { /* * Return in pmask the portion of a cpusets's cpus_allowed that * are online. If none are online, walk up the cpuset hierarchy - * until we find one that does have some online cpus. The top - * cpuset always has some cpus online. + * until we find one that does have some online cpus. * * One way or another, we guarantee to return some non-empty subset * of cpu_online_mask. @@ -336,8 +335,20 @@ static struct file_system_type cpuset_fs_type = { */ static void guarantee_online_cpus(struct cpuset *cs, struct cpumask *pmask) { - while (!cpumask_intersects(cs->effective_cpus, cpu_online_mask)) + while (!cpumask_intersects(cs->effective_cpus, cpu_online_mask)) { cs = parent_cs(cs); + if (unlikely(!cs)) { + /* + * The top cpuset doesn't have any online cpu as a + * consequence of a race between cpuset_hotplug_work + * and cpu hotplug notifier. But we know the top + * cpuset's effective_cpus is on its way to to be + * identical to cpu_online_mask. + */ + cpumask_copy(pmask, cpu_online_mask); + return; + } + } cpumask_and(pmask, cs->effective_cpus, cpu_online_mask); } diff --git a/kernel/events/core.c b/kernel/events/core.c index 32e2617d654f..d6ec580584b6 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -176,9 +176,12 @@ static struct srcu_struct pmus_srcu; * 0 - disallow raw tracepoint access for unpriv * 1 - disallow cpu events for unpriv * 2 - disallow kernel profiling for unpriv + * 3 - disallow all unpriv perf event use */ #ifdef CONFIG_PERF_EVENTS_USERMODE int sysctl_perf_event_paranoid __read_mostly = -1; +#elif defined CONFIG_SECURITY_PERF_EVENTS_RESTRICT +int sysctl_perf_event_paranoid __read_mostly = 3; #else int sysctl_perf_event_paranoid __read_mostly = 1; #endif @@ -8325,6 +8328,9 @@ SYSCALL_DEFINE5(perf_event_open, if (flags & ~PERF_FLAG_ALL) return -EINVAL; + if (perf_paranoid_any() && !capable(CAP_SYS_ADMIN)) + return -EACCES; + err = perf_copy_attr(attr_uptr, &attr); if (err) return err; diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index ca966f7de351..87b91ffbdec3 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -1175,14 +1175,16 @@ static noinline_for_stack int rtnl_fill_vfinfo(struct sk_buff *skb, static int rtnl_fill_link_ifmap(struct sk_buff *skb, struct net_device *dev) { - struct rtnl_link_ifmap map = { - .mem_start = dev->mem_start, - .mem_end = dev->mem_end, - .base_addr = dev->base_addr, - .irq = dev->irq, - .dma = dev->dma, - .port = dev->if_port, - }; + struct rtnl_link_ifmap map; + + memset(&map, 0, sizeof(map)); + map.mem_start = dev->mem_start; + map.mem_end = dev->mem_end; + map.base_addr = dev->base_addr; + map.irq = dev->irq; + map.dma = dev->dma; + map.port = dev->if_port; + if (nla_put(skb, IFLA_MAP, sizeof(map), &map)) return -EMSGSIZE; diff --git a/security/Kconfig b/security/Kconfig index 18568c21e564..c4f83485bc1f 100644 --- a/security/Kconfig +++ b/security/Kconfig @@ -23,6 +23,15 @@ config SECURITY_DMESG_RESTRICT If you are unsure how to answer this question, answer N. +config SECURITY_PERF_EVENTS_RESTRICT + bool "Restrict unprivileged use of performance events" + depends on PERF_EVENTS + help + If you say Y here, the kernel.perf_event_paranoid sysctl + will be set to 3 by default, and no unprivileged use of the + perf_event_open syscall will be permitted unless it is + changed. + config SECURITY bool "Enable different security models" depends on SYSFS diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c index a4d92fdd3e7c..9acab619ec8e 100644 --- a/sound/soc/codecs/wcd9335.c +++ b/sound/soc/codecs/wcd9335.c @@ -3134,8 +3134,13 @@ static int tasha_codec_enable_slimrx(struct snd_soc_dapm_widget *w, dai->rate, dai->bit_width, &dai->grph); break; + case SND_SOC_DAPM_PRE_PMD: + if (!test_bit(SB_CLK_GEAR, &tasha_p->status_mask)) { + tasha_codec_vote_max_bw(codec, true); + set_bit(SB_CLK_GEAR, &tasha_p->status_mask); + } + break; case SND_SOC_DAPM_POST_PMD: - tasha_codec_vote_max_bw(codec, true); ret = wcd9xxx_disconnect_port(core, &dai->wcd9xxx_ch_list, dai->grph); dev_dbg(codec->dev, "%s: Disconnect RX port, ret = %d\n", @@ -3149,7 +3154,6 @@ static int tasha_codec_enable_slimrx(struct snd_soc_dapm_widget *w, __func__); ret = wcd9xxx_close_slim_sch_rx(core, &dai->wcd9xxx_ch_list, dai->grph); - tasha_codec_vote_max_bw(codec, false); break; } return ret; @@ -10189,20 +10193,25 @@ static const struct snd_soc_dapm_widget tasha_dapm_widgets[] = { SND_SOC_DAPM_OUTPUT("ANC EAR"), SND_SOC_DAPM_AIF_IN_E("AIF1 PB", "AIF1 Playback", 0, SND_SOC_NOPM, AIF1_PB, 0, tasha_codec_enable_slimrx, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_IN_E("AIF2 PB", "AIF2 Playback", 0, SND_SOC_NOPM, AIF2_PB, 0, tasha_codec_enable_slimrx, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_IN_E("AIF3 PB", "AIF3 Playback", 0, SND_SOC_NOPM, AIF3_PB, 0, tasha_codec_enable_slimrx, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_IN_E("AIF4 PB", "AIF4 Playback", 0, SND_SOC_NOPM, AIF4_PB, 0, tasha_codec_enable_slimrx, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_AIF_IN_E("AIF MIX1 PB", "AIF Mix Playback", 0, SND_SOC_NOPM, AIF_MIX1_PB, 0, tasha_codec_enable_slimrx, - SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), SND_SOC_DAPM_MUX("SLIM RX0 MUX", SND_SOC_NOPM, TASHA_RX0, 0, &slim_rx_mux[TASHA_RX0]), @@ -11069,8 +11078,19 @@ static int tasha_startup(struct snd_pcm_substream *substream, static void tasha_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { + struct tasha_priv *tasha = snd_soc_codec_get_drvdata(dai->codec); + pr_debug("%s(): substream = %s stream = %d\n" , __func__, substream->name, substream->stream); + + if (tasha->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) + return; + + if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) && + test_bit(SB_CLK_GEAR, &tasha->status_mask)) { + tasha_codec_vote_max_bw(dai->codec, false); + clear_bit(SB_CLK_GEAR, &tasha->status_mask); + } } static int tasha_set_decimator_rate(struct snd_soc_dai *dai, diff --git a/sound/soc/codecs/wsa881x.c b/sound/soc/codecs/wsa881x.c index b97b73dc4191..46a073bac2e9 100644 --- a/sound/soc/codecs/wsa881x.c +++ b/sound/soc/codecs/wsa881x.c @@ -1043,7 +1043,6 @@ static int wsa881x_probe(struct snd_soc_codec *codec) "%s.%x", "wsatz", (u8)dev->addr); wsa881x->bg_cnt = 0; wsa881x->clk_cnt = 0; - wsa881x->state = WSA881X_DEV_UP; wsa881x->tz_pdata.codec = codec; wsa881x->tz_pdata.wsa_temp_reg_read = wsa881x_temp_reg_read; wsa881x_init_thermal(&wsa881x->tz_pdata); @@ -1229,6 +1228,7 @@ static int wsa881x_swr_probe(struct swr_device *pdev) goto err; } wsa881x_gpio_ctrl(wsa881x, true); + wsa881x->state = WSA881X_DEV_UP; if (!debugfs_wsa881x_dent) { dbgwsa881x = wsa881x; diff --git a/sound/soc/msm/msmcobalt.c b/sound/soc/msm/msmcobalt.c index 63367ce07f5a..17e78b25c6ca 100644 --- a/sound/soc/msm/msmcobalt.c +++ b/sound/soc/msm/msmcobalt.c @@ -95,6 +95,46 @@ enum { SLIM_TX_MAX, }; +enum { + PRIM_MI2S = 0, + SEC_MI2S, + TERT_MI2S, + QUAT_MI2S, + MI2S_MAX, +}; + +enum { + PRIM_AUX_PCM = 0, + SEC_AUX_PCM, + TERT_AUX_PCM, + QUAT_AUX_PCM, + AUX_PCM_MAX, +}; + +enum { + PCM_I2S_SEL_PRIM = 0, + PCM_I2S_SEL_SEC, + PCM_I2S_SEL_TERT, + PCM_I2S_SEL_QUAT, + PCM_I2S_SEL_MAX, +}; + +struct mi2s_aux_pcm_common_conf { + struct mutex lock; + void *pcm_i2s_sel_vt_addr; +}; + +struct mi2s_conf { + struct mutex lock; + u32 ref_cnt; + u32 msm_is_mi2s_master; +}; + +struct auxpcm_conf { + struct mutex lock; + u32 ref_cnt; +}; + struct dev_config { u32 sample_rate; u32 bit_format; @@ -178,6 +218,35 @@ static struct dev_config proxy_rx_cfg = { .channels = 2, }; +/* Default configuration of MI2S channels */ +static struct dev_config mi2s_rx_cfg[] = { + [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, + [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, + [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, + [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2}, +}; + +static struct dev_config mi2s_tx_cfg[] = { + [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, +}; + +static struct dev_config aux_pcm_rx_cfg[] = { + [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, +}; + +static struct dev_config aux_pcm_tx_cfg[] = { + [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, + [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, +}; + static int msm_vi_feed_tx_ch = 2; static const char *const slim_rx_ch_text[] = {"One", "Two"}; static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four", @@ -202,6 +271,13 @@ static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_96", "KHZ_192"}; static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96", "KHZ_192"}; +static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"}; +static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_16", + "KHZ_32", "KHZ_44P1", "KHZ_48", + "KHZ_96", "KHZ_192"}; +static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four", + "Five", "Six", "Seven", + "Eight"}; static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text); static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text); @@ -231,6 +307,30 @@ static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text); static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text); static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate, ext_disp_sample_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text); +static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text); static struct platform_device *spdev; @@ -276,6 +376,45 @@ static struct snd_soc_dapm_route wcd_audio_paths[] = { {"MIC BIAS4", NULL, "MCLK"}, }; +static struct afe_clk_set mi2s_clk[MI2S_MAX] = { + { + AFE_API_VERSION_I2S_CONFIG, + Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT, + Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, + Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, + Q6AFE_LPASS_CLK_ROOT_DEFAULT, + 0, + }, + { + AFE_API_VERSION_I2S_CONFIG, + Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT, + Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, + Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, + Q6AFE_LPASS_CLK_ROOT_DEFAULT, + 0, + }, + { + AFE_API_VERSION_I2S_CONFIG, + Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT, + Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, + Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, + Q6AFE_LPASS_CLK_ROOT_DEFAULT, + 0, + }, + { + AFE_API_VERSION_I2S_CONFIG, + Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT, + Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ, + Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO, + Q6AFE_LPASS_CLK_ROOT_DEFAULT, + 0, + } +}; + +static struct mi2s_aux_pcm_common_conf mi2s_auxpcm_conf[PCM_I2S_SEL_MAX]; +static struct mi2s_conf mi2s_intf_conf[MI2S_MAX]; +static struct auxpcm_conf auxpcm_intf_conf[AUX_PCM_MAX]; + static int slim_get_sample_rate_val(int sample_rate) { int sample_rate_val = 0; @@ -1188,6 +1327,370 @@ static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol, return 1; } +static int aux_pcm_get_sample_rate(int value) +{ + int sample_rate; + + switch (value) { + case 1: + sample_rate = SAMPLING_RATE_16KHZ; + break; + case 0: + default: + sample_rate = SAMPLING_RATE_8KHZ; + break; + } + return sample_rate; +} + +static int aux_pcm_get_sample_rate_val(int sample_rate) +{ + int sample_rate_val; + + switch (sample_rate) { + case SAMPLING_RATE_16KHZ: + sample_rate_val = 1; + break; + case SAMPLING_RATE_8KHZ: + default: + sample_rate_val = 0; + break; + } + return sample_rate_val; +} + +static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol) +{ + int idx; + + if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM", + sizeof("PRIM_AUX_PCM"))) + idx = PRIM_AUX_PCM; + else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM", + sizeof("SEC_AUX_PCM"))) + idx = SEC_AUX_PCM; + else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM", + sizeof("TERT_AUX_PCM"))) + idx = TERT_AUX_PCM; + else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM", + sizeof("QUAT_AUX_PCM"))) + idx = QUAT_AUX_PCM; + else { + pr_err("%s: unsupported port: %s", + __func__, kcontrol->id.name); + idx = -EINVAL; + } + + return idx; +} + +static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = aux_pcm_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + aux_pcm_rx_cfg[idx].sample_rate = + aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]); + + pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, + idx, aux_pcm_rx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = aux_pcm_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + ucontrol->value.enumerated.item[0] = + aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate); + + pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, + idx, aux_pcm_rx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = aux_pcm_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + aux_pcm_tx_cfg[idx].sample_rate = + aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]); + + pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, + idx, aux_pcm_tx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = aux_pcm_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + ucontrol->value.enumerated.item[0] = + aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate); + + pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, + idx, aux_pcm_tx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol) +{ + int idx; + + if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX", + sizeof("PRIM_MI2S_RX"))) + idx = PRIM_MI2S; + else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX", + sizeof("SEC_MI2S_RX"))) + idx = SEC_MI2S; + else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX", + sizeof("TERT_MI2S_RX"))) + idx = TERT_MI2S; + else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX", + sizeof("QUAT_MI2S_RX"))) + idx = QUAT_MI2S; + else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX", + sizeof("PRIM_MI2S_TX"))) + idx = PRIM_MI2S; + else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX", + sizeof("SEC_MI2S_TX"))) + idx = SEC_MI2S; + else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX", + sizeof("TERT_MI2S_TX"))) + idx = TERT_MI2S; + else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX", + sizeof("QUAT_MI2S_TX"))) + idx = QUAT_MI2S; + else { + pr_err("%s: unsupported channel: %s", + __func__, kcontrol->id.name); + idx = -EINVAL; + } + + return idx; +} + +static int mi2s_get_sample_rate_val(int sample_rate) +{ + int sample_rate_val; + + switch (sample_rate) { + case SAMPLING_RATE_8KHZ: + sample_rate_val = 0; + break; + case SAMPLING_RATE_16KHZ: + sample_rate_val = 1; + break; + case SAMPLING_RATE_32KHZ: + sample_rate_val = 2; + break; + case SAMPLING_RATE_44P1KHZ: + sample_rate_val = 3; + break; + case SAMPLING_RATE_48KHZ: + sample_rate_val = 4; + break; + case SAMPLING_RATE_96KHZ: + sample_rate_val = 5; + break; + case SAMPLING_RATE_192KHZ: + sample_rate_val = 6; + break; + default: + sample_rate_val = 4; + break; + } + return sample_rate_val; +} + +static int mi2s_get_sample_rate(int value) +{ + int sample_rate; + + switch (value) { + case 0: + sample_rate = SAMPLING_RATE_8KHZ; + break; + case 1: + sample_rate = SAMPLING_RATE_16KHZ; + break; + case 2: + sample_rate = SAMPLING_RATE_32KHZ; + break; + case 3: + sample_rate = SAMPLING_RATE_44P1KHZ; + break; + case 4: + sample_rate = SAMPLING_RATE_48KHZ; + break; + case 5: + sample_rate = SAMPLING_RATE_96KHZ; + break; + case 6: + sample_rate = SAMPLING_RATE_192KHZ; + break; + default: + sample_rate = SAMPLING_RATE_48KHZ; + break; + } + return sample_rate; +} + +static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + mi2s_rx_cfg[idx].sample_rate = + mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]); + + pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, + idx, mi2s_rx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + ucontrol->value.enumerated.item[0] = + mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate); + + pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__, + idx, mi2s_rx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + mi2s_tx_cfg[idx].sample_rate = + mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]); + + pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, + idx, mi2s_tx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + ucontrol->value.enumerated.item[0] = + mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate); + + pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__, + idx, mi2s_tx_cfg[idx].sample_rate, + ucontrol->value.enumerated.item[0]); + + return 0; +} + +static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__, + idx, mi2s_rx_cfg[idx].channels); + ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1; + + return 0; +} + +static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; + pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__, + idx, mi2s_rx_cfg[idx].channels); + + return 1; +} + +static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__, + idx, mi2s_tx_cfg[idx].channels); + ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1; + + return 0; +} + +static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int idx = mi2s_get_port_idx(kcontrol); + + if (idx < 0) + return idx; + + mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1; + pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__, + idx, mi2s_tx_cfg[idx].channels); + + return 1; +} + static const struct snd_kcontrol_new msm_snd_controls[] = { SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs, msm_slim_rx_ch_get, msm_slim_rx_ch_put), @@ -1254,6 +1757,70 @@ static const struct snd_kcontrol_new msm_snd_controls[] = { SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate, ext_disp_rx_sample_rate_get, ext_disp_rx_sample_rate_put), + SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate, + aux_pcm_rx_sample_rate_get, + aux_pcm_rx_sample_rate_put), + SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate, + aux_pcm_rx_sample_rate_get, + aux_pcm_rx_sample_rate_put), + SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate, + aux_pcm_rx_sample_rate_get, + aux_pcm_rx_sample_rate_put), + SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate, + aux_pcm_rx_sample_rate_get, + aux_pcm_rx_sample_rate_put), + SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate, + aux_pcm_tx_sample_rate_get, + aux_pcm_tx_sample_rate_put), + SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate, + aux_pcm_tx_sample_rate_get, + aux_pcm_tx_sample_rate_put), + SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate, + aux_pcm_tx_sample_rate_get, + aux_pcm_tx_sample_rate_put), + SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate, + aux_pcm_tx_sample_rate_get, + aux_pcm_tx_sample_rate_put), + SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate, + mi2s_rx_sample_rate_get, + mi2s_rx_sample_rate_put), + SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate, + mi2s_rx_sample_rate_get, + mi2s_rx_sample_rate_put), + SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate, + mi2s_rx_sample_rate_get, + mi2s_rx_sample_rate_put), + SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate, + mi2s_rx_sample_rate_get, + mi2s_rx_sample_rate_put), + SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate, + mi2s_tx_sample_rate_get, + mi2s_tx_sample_rate_put), + SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate, + mi2s_tx_sample_rate_get, + mi2s_tx_sample_rate_put), + SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate, + mi2s_tx_sample_rate_get, + mi2s_tx_sample_rate_put), + SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate, + mi2s_tx_sample_rate_get, + mi2s_tx_sample_rate_put), + SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs, + msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), + SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs, + msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), + SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs, + msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), + SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs, + msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), + SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs, + msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), + SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs, + msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), + SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs, + msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put), + SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs, + msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put), }; static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec, @@ -1527,6 +2094,110 @@ static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, rate->min = rate->max = SAMPLING_RATE_48KHZ; break; + case MSM_BACKEND_DAI_AUXPCM_RX: + rate->min = rate->max = + aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_rx_cfg[PRIM_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_AUXPCM_TX: + rate->min = rate->max = + aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_tx_cfg[PRIM_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_SEC_AUXPCM_RX: + rate->min = rate->max = + aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_rx_cfg[SEC_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_SEC_AUXPCM_TX: + rate->min = rate->max = + aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_tx_cfg[SEC_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_TERT_AUXPCM_RX: + rate->min = rate->max = + aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_rx_cfg[TERT_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_TERT_AUXPCM_TX: + rate->min = rate->max = + aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_tx_cfg[TERT_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_QUAT_AUXPCM_RX: + rate->min = rate->max = + aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_rx_cfg[QUAT_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_QUAT_AUXPCM_TX: + rate->min = rate->max = + aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate; + channels->min = channels->max = + aux_pcm_tx_cfg[QUAT_AUX_PCM].channels; + break; + + case MSM_BACKEND_DAI_PRI_MI2S_RX: + rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate; + channels->min = channels->max = + mi2s_rx_cfg[PRIM_MI2S].channels; + break; + + case MSM_BACKEND_DAI_PRI_MI2S_TX: + rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate; + channels->min = channels->max = + mi2s_tx_cfg[PRIM_MI2S].channels; + break; + + case MSM_BACKEND_DAI_SECONDARY_MI2S_RX: + rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate; + channels->min = channels->max = + mi2s_rx_cfg[SEC_MI2S].channels; + break; + + case MSM_BACKEND_DAI_SECONDARY_MI2S_TX: + rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate; + channels->min = channels->max = + mi2s_tx_cfg[SEC_MI2S].channels; + break; + + case MSM_BACKEND_DAI_TERTIARY_MI2S_RX: + rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate; + channels->min = channels->max = + mi2s_rx_cfg[TERT_MI2S].channels; + break; + + case MSM_BACKEND_DAI_TERTIARY_MI2S_TX: + rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate; + channels->min = channels->max = + mi2s_tx_cfg[TERT_MI2S].channels; + break; + + case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX: + rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate; + channels->min = channels->max = + mi2s_rx_cfg[QUAT_MI2S].channels; + break; + + case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX: + rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate; + channels->min = channels->max = + mi2s_tx_cfg[QUAT_MI2S].channels; + break; + default: rate->min = rate->max = SAMPLING_RATE_48KHZ; break; @@ -2204,6 +2875,297 @@ exit: return ret; } +static int msm_aux_pcm_snd_startup(struct snd_pcm_substream *substream) +{ + int ret = 0; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int index = cpu_dai->id - 1; + return ret = 0; + + dev_dbg(rtd->card->dev, + "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", + __func__, substream->name, substream->stream, + cpu_dai->name, cpu_dai->id); + + if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) { + ret = -EINVAL; + dev_err(rtd->card->dev, + "%s: CPU DAI id (%d) out of range\n", + __func__, cpu_dai->id); + goto done; + } + + mutex_lock(&auxpcm_intf_conf[index].lock); + if (++auxpcm_intf_conf[index].ref_cnt == 1) { + if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) { + mutex_lock(&mi2s_auxpcm_conf[index].lock); + iowrite32(1, + mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr); + mutex_unlock(&mi2s_auxpcm_conf[index].lock); + } else { + dev_err(rtd->card->dev, + "%s lpaif_tert_muxsel_virt_addr is NULL\n", + __func__); + ret = -EINVAL; + } + } + if (IS_ERR_VALUE(ret)) + auxpcm_intf_conf[index].ref_cnt--; + + mutex_unlock(&auxpcm_intf_conf[index].lock); + +done: + return ret; +} + +static void msm_aux_pcm_snd_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + int index = rtd->cpu_dai->id - 1; + + dev_dbg(rtd->card->dev, + "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", + __func__, + substream->name, substream->stream, + rtd->cpu_dai->name, rtd->cpu_dai->id); + + if (index < PRIM_AUX_PCM || index > QUAT_AUX_PCM) { + dev_err(rtd->card->dev, + "%s: CPU DAI id (%d) out of range\n", + __func__, rtd->cpu_dai->id); + return; + } + + mutex_lock(&auxpcm_intf_conf[index].lock); + if (--auxpcm_intf_conf[index].ref_cnt == 0) { + if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) { + mutex_lock(&mi2s_auxpcm_conf[index].lock); + iowrite32(0, + mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr); + mutex_unlock(&mi2s_auxpcm_conf[index].lock); + } else { + dev_err(rtd->card->dev, + "%s lpaif_tert_muxsel_virt_addr is NULL\n", + __func__); + auxpcm_intf_conf[index].ref_cnt++; + } + } + mutex_unlock(&auxpcm_intf_conf[index].lock); +} + +static int msm_get_port_id(int be_id) +{ + int afe_port_id; + + switch (be_id) { + case MSM_BACKEND_DAI_PRI_MI2S_RX: + afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX; + break; + case MSM_BACKEND_DAI_PRI_MI2S_TX: + afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX; + break; + case MSM_BACKEND_DAI_SECONDARY_MI2S_RX: + afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX; + break; + case MSM_BACKEND_DAI_SECONDARY_MI2S_TX: + afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX; + break; + case MSM_BACKEND_DAI_TERTIARY_MI2S_RX: + afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX; + break; + case MSM_BACKEND_DAI_TERTIARY_MI2S_TX: + afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX; + break; + case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX: + afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX; + break; + case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX: + afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX; + break; + default: + pr_err("%s: Invalid be_id: %d\n", __func__, be_id); + afe_port_id = -EINVAL; + } + + return afe_port_id; +} + +static u32 get_mi2s_bits_per_sample(u32 bit_format) +{ + u32 bit_per_sample; + + switch (bit_format) { + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + bit_per_sample = 32; + break; + case SNDRV_PCM_FORMAT_S16_LE: + default: + bit_per_sample = 16; + break; + } + + return bit_per_sample; +} + +static void update_mi2s_clk_val(int dai_id, int stream) +{ + u32 bit_per_sample; + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + bit_per_sample = + get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format); + mi2s_clk[dai_id].clk_freq_in_hz = + mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample; + } else { + bit_per_sample = + get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format); + mi2s_clk[dai_id].clk_freq_in_hz = + mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample; + } + + if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master) + mi2s_clk[dai_id].clk_freq_in_hz = 0; +} + +static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable) +{ + int ret = 0; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int port_id = 0; + int index = cpu_dai->id; + + port_id = msm_get_port_id(rtd->dai_link->be_id); + if (IS_ERR_VALUE(port_id)) { + dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__); + ret = port_id; + goto done; + } + + if (enable) { + update_mi2s_clk_val(index, substream->stream); + dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__, + mi2s_clk[index].clk_freq_in_hz); + } + + mi2s_clk[index].enable = enable; + ret = afe_set_lpass_clock_v2(port_id, + &mi2s_clk[index]); + if (ret < 0) { + dev_err(rtd->card->dev, + "%s: afe lpass clock failed for port 0x%x , err:%d\n", + __func__, port_id, ret); + goto done; + } + +done: + return ret; +} + +static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream) +{ + int ret = 0; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int index = cpu_dai->id; + unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS; + + dev_dbg(rtd->card->dev, + "%s: substream = %s stream = %d, dai name %s, dai ID %d\n", + __func__, substream->name, substream->stream, + cpu_dai->name, cpu_dai->id); + + if (index < PRIM_MI2S || index > QUAT_MI2S) { + ret = -EINVAL; + dev_err(rtd->card->dev, + "%s: CPU DAI id (%d) out of range\n", + __func__, cpu_dai->id); + goto done; + } + /* + * Muxtex protection in case the same MI2S + * interface using for both TX and RX so + * that the same clock won't be enable twice. + */ + mutex_lock(&mi2s_intf_conf[index].lock); + if (++mi2s_intf_conf[index].ref_cnt == 1) { + ret = msm_mi2s_set_sclk(substream, true); + if (IS_ERR_VALUE(ret)) { + dev_err(rtd->card->dev, + "%s: afe lpass clock failed to enable MI2S clock, err:%d\n", + __func__, ret); + goto clean_up; + } + if (mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr != NULL) { + mutex_lock(&mi2s_auxpcm_conf[index].lock); + iowrite32(0, + mi2s_auxpcm_conf[index].pcm_i2s_sel_vt_addr); + mutex_unlock(&mi2s_auxpcm_conf[index].lock); + } else { + dev_err(rtd->card->dev, + "%s lpaif_muxsel_virt_addr is NULL for dai %d\n", + __func__, index); + ret = -EINVAL; + goto clk_off; + } + /* Check if msm needs to provide the clock to the interface */ + if (!mi2s_intf_conf[index].msm_is_mi2s_master) + fmt = SND_SOC_DAIFMT_CBM_CFM; + ret = snd_soc_dai_set_fmt(cpu_dai, fmt); + if (IS_ERR_VALUE(ret)) { + pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n", + __func__, index, ret); + goto clk_off; + } + } +clk_off: + if (IS_ERR_VALUE(ret)) + msm_mi2s_set_sclk(substream, false); +clean_up: + if (IS_ERR_VALUE(ret)) + mi2s_intf_conf[index].ref_cnt--; + mutex_unlock(&mi2s_intf_conf[index].lock); +done: + return ret; +} + +static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream) +{ + int ret; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + int index = rtd->cpu_dai->id; + + pr_debug("%s(): substream = %s stream = %d\n", __func__, + substream->name, substream->stream); + if (index < PRIM_MI2S || index > QUAT_MI2S) { + pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index); + return; + } + + mutex_lock(&mi2s_intf_conf[index].lock); + if (--mi2s_intf_conf[index].ref_cnt == 0) { + ret = msm_mi2s_set_sclk(substream, false); + if (ret < 0) { + pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n", + __func__, index, ret); + mi2s_intf_conf[index].ref_cnt++; + } + } + mutex_unlock(&mi2s_intf_conf[index].lock); +} + +static struct snd_soc_ops msm_mi2s_be_ops = { + .startup = msm_mi2s_snd_startup, + .shutdown = msm_mi2s_snd_shutdown, +}; + +static struct snd_soc_ops msm_aux_pcm_be_ops = { + .startup = msm_aux_pcm_snd_startup, + .shutdown = msm_aux_pcm_snd_shutdown, +}; + static struct snd_soc_ops msm_be_ops = { .hw_params = msm_snd_hw_params, }; @@ -3421,13 +4383,261 @@ static struct snd_soc_dai_link ext_disp_be_dai_link[] = { }, }; +static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = { + { + .name = LPASS_BE_PRI_MI2S_RX, + .stream_name = "Primary MI2S Playback", + .cpu_dai_name = "msm-dai-q6-mi2s.0", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + }, + { + .name = LPASS_BE_PRI_MI2S_TX, + .stream_name = "Primary MI2S Capture", + .cpu_dai_name = "msm-dai-q6-mi2s.0", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + }, + { + .name = LPASS_BE_SEC_MI2S_RX, + .stream_name = "Secondary MI2S Playback", + .cpu_dai_name = "msm-dai-q6-mi2s.1", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + }, + { + .name = LPASS_BE_SEC_MI2S_TX, + .stream_name = "Secondary MI2S Capture", + .cpu_dai_name = "msm-dai-q6-mi2s.1", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + }, + { + .name = LPASS_BE_TERT_MI2S_RX, + .stream_name = "Tertiary MI2S Playback", + .cpu_dai_name = "msm-dai-q6-mi2s.2", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + }, + { + .name = LPASS_BE_TERT_MI2S_TX, + .stream_name = "Tertiary MI2S Capture", + .cpu_dai_name = "msm-dai-q6-mi2s.2", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + }, + { + .name = LPASS_BE_QUAT_MI2S_RX, + .stream_name = "Quaternary MI2S Playback", + .cpu_dai_name = "msm-dai-q6-mi2s.3", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + }, + { + .name = LPASS_BE_QUAT_MI2S_TX, + .stream_name = "Quaternary MI2S Capture", + .cpu_dai_name = "msm-dai-q6-mi2s.3", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ops = &msm_mi2s_be_ops, + .ignore_suspend = 1, + }, +}; + +static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = { + /* Primary AUX PCM Backend DAI Links */ + { + .name = LPASS_BE_AUXPCM_RX, + .stream_name = "AUX PCM Playback", + .cpu_dai_name = "msm-dai-q6-auxpcm.1", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_AUXPCM_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_pmdown_time = 1, + .ignore_suspend = 1, + .ops = &msm_aux_pcm_be_ops, + }, + { + .name = LPASS_BE_AUXPCM_TX, + .stream_name = "AUX PCM Capture", + .cpu_dai_name = "msm-dai-q6-auxpcm.1", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_AUXPCM_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_pmdown_time = 1, + .ignore_suspend = 1, + .ops = &msm_aux_pcm_be_ops, + }, + /* Secondary AUX PCM Backend DAI Links */ + { + .name = LPASS_BE_SEC_AUXPCM_RX, + .stream_name = "Sec AUX PCM Playback", + .cpu_dai_name = "msm-dai-q6-auxpcm.2", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_SEC_AUXPCM_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_pmdown_time = 1, + .ignore_suspend = 1, + .ops = &msm_aux_pcm_be_ops, + }, + { + .name = LPASS_BE_SEC_AUXPCM_TX, + .stream_name = "Sec AUX PCM Capture", + .cpu_dai_name = "msm-dai-q6-auxpcm.2", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_SEC_AUXPCM_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + .ops = &msm_aux_pcm_be_ops, + }, + /* Tertiary AUX PCM Backend DAI Links */ + { + .name = LPASS_BE_TERT_AUXPCM_RX, + .stream_name = "Tert AUX PCM Playback", + .cpu_dai_name = "msm-dai-q6-auxpcm.3", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_TERT_AUXPCM_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_pmdown_time = 1, + .ignore_suspend = 1, + .ops = &msm_aux_pcm_be_ops, + }, + { + .name = LPASS_BE_TERT_AUXPCM_TX, + .stream_name = "Tert AUX PCM Capture", + .cpu_dai_name = "msm-dai-q6-auxpcm.3", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_TERT_AUXPCM_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + .ops = &msm_aux_pcm_be_ops, + }, + /* Quaternary AUX PCM Backend DAI Links */ + { + .name = LPASS_BE_QUAT_AUXPCM_RX, + .stream_name = "Quat AUX PCM Playback", + .cpu_dai_name = "msm-dai-q6-auxpcm.4", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-rx", + .no_pcm = 1, + .dpcm_playback = 1, + .be_id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_pmdown_time = 1, + .ignore_suspend = 1, + .ops = &msm_aux_pcm_be_ops, + }, + { + .name = LPASS_BE_QUAT_AUXPCM_TX, + .stream_name = "Quat AUX PCM Capture", + .cpu_dai_name = "msm-dai-q6-auxpcm.4", + .platform_name = "msm-pcm-routing", + .codec_name = "msm-stub-codec.1", + .codec_dai_name = "msm-stub-tx", + .no_pcm = 1, + .dpcm_capture = 1, + .be_id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + .be_hw_params_fixup = msm_be_hw_params_fixup, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + .ops = &msm_aux_pcm_be_ops, + }, +}; + static struct snd_soc_dai_link msm_tasha_dai_links[ ARRAY_SIZE(msm_common_dai_links) + ARRAY_SIZE(msm_tasha_fe_dai_links) + ARRAY_SIZE(msm_common_be_dai_links) + ARRAY_SIZE(msm_tasha_be_dai_links) + ARRAY_SIZE(msm_wcn_be_dai_links) + - ARRAY_SIZE(ext_disp_be_dai_link)]; + ARRAY_SIZE(ext_disp_be_dai_link) + + ARRAY_SIZE(msm_mi2s_be_dai_links) + + ARRAY_SIZE(msm_auxpcm_be_dai_links)]; static struct snd_soc_dai_link msm_tavil_dai_links[ ARRAY_SIZE(msm_common_dai_links) + @@ -3435,7 +4645,9 @@ static struct snd_soc_dai_link msm_tavil_dai_links[ ARRAY_SIZE(msm_common_be_dai_links) + ARRAY_SIZE(msm_tavil_be_dai_links) + ARRAY_SIZE(msm_wcn_be_dai_links) + - ARRAY_SIZE(ext_disp_be_dai_link)]; + ARRAY_SIZE(ext_disp_be_dai_link) + + ARRAY_SIZE(msm_mi2s_be_dai_links) + + ARRAY_SIZE(msm_auxpcm_be_dai_links)]; static int msm_snd_card_late_probe(struct snd_soc_card *card) { @@ -3844,6 +5056,20 @@ static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev) sizeof(ext_disp_be_dai_link)); total_links += ARRAY_SIZE(ext_disp_be_dai_link); } + if (of_property_read_bool(dev->of_node, + "qcom,mi2s-audio-intf")) { + memcpy(msm_tasha_dai_links + total_links, + msm_mi2s_be_dai_links, + sizeof(msm_mi2s_be_dai_links)); + total_links += ARRAY_SIZE(msm_mi2s_be_dai_links); + } + if (of_property_read_bool(dev->of_node, + "qcom,auxpcm-audio-intf")) { + memcpy(msm_tasha_dai_links + total_links, + msm_auxpcm_be_dai_links, + sizeof(msm_auxpcm_be_dai_links)); + total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links); + } dailink = msm_tasha_dai_links; } else if (!strcmp(match->data, "tavil_codec")) { card = &snd_soc_card_tavil_msm; @@ -3878,10 +5104,24 @@ static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev) dev_dbg(dev, "%s(): ext disp audio support present\n", __func__); memcpy(msm_tavil_dai_links + total_links, - ext_disp_be_dai_link, - sizeof(ext_disp_be_dai_link)); + ext_disp_be_dai_link, + sizeof(ext_disp_be_dai_link)); total_links += ARRAY_SIZE(ext_disp_be_dai_link); } + if (of_property_read_bool(dev->of_node, + "qcom,mi2s-audio-intf")) { + memcpy(msm_tavil_dai_links + total_links, + msm_mi2s_be_dai_links, + sizeof(msm_mi2s_be_dai_links)); + total_links += ARRAY_SIZE(msm_mi2s_be_dai_links); + } + if (of_property_read_bool(dev->of_node, + "qcom,auxpcm-audio-intf")) { + memcpy(msm_tavil_dai_links + total_links, + msm_auxpcm_be_dai_links, + sizeof(msm_auxpcm_be_dai_links)); + total_links += ARRAY_SIZE(msm_auxpcm_be_dai_links); + } dailink = msm_tavil_dai_links; } else if (!strcmp(match->data, "stub_codec")) { card = &snd_soc_card_stub_msm; @@ -4147,6 +5387,68 @@ err_dt: return ret; } +static void i2s_auxpcm_init(struct platform_device *pdev) +{ + struct resource *muxsel; + int count; + u32 mi2s_master_slave[MI2S_MAX]; + int ret; + char *str[PCM_I2S_SEL_MAX] = { + "lpaif_pri_mode_muxsel", + "lpaif_sec_mode_muxsel", + "lpaif_tert_mode_muxsel", + "lpaif_quat_mode_muxsel" + }; + + for (count = 0; count < MI2S_MAX; count++) { + mutex_init(&mi2s_intf_conf[count].lock); + mi2s_intf_conf[count].ref_cnt = 0; + } + + for (count = 0; count < AUX_PCM_MAX; count++) { + mutex_init(&auxpcm_intf_conf[count].lock); + auxpcm_intf_conf[count].ref_cnt = 0; + } + + for (count = 0; count < PCM_I2S_SEL_MAX; count++) { + mutex_init(&mi2s_auxpcm_conf[count].lock); + mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr = NULL; + } + + for (count = 0; count < PCM_I2S_SEL_MAX; count++) { + muxsel = platform_get_resource_byname(pdev, IORESOURCE_MEM, + str[count]); + if (muxsel) { + mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr + = ioremap(muxsel->start, resource_size(muxsel)); + } + } + + ret = of_property_read_u32_array(pdev->dev.of_node, + "qcom,msm-mi2s-master", + mi2s_master_slave, MI2S_MAX); + if (ret) { + dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n", + __func__); + } else { + for (count = 0; count < MI2S_MAX; count++) { + mi2s_intf_conf[count].msm_is_mi2s_master = + mi2s_master_slave[count]; + } + } +} + +static void i2s_auxpcm_deinit(void) +{ + int count; + + for (count = 0; count < PCM_I2S_SEL_MAX; count++) + if (mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr != + NULL) + iounmap( + mi2s_auxpcm_conf[count].pcm_i2s_sel_vt_addr); +} + static int msm_asoc_machine_probe(struct platform_device *pdev) { struct snd_soc_card *card; @@ -4306,6 +5608,8 @@ static int msm_asoc_machine_probe(struct platform_device *pdev) if (ret) dev_dbg(&pdev->dev, "msm_prepare_us_euro failed (%d)\n", ret); + + i2s_auxpcm_init(pdev); return 0; err: if (pdata->us_euro_gpio > 0) { @@ -4339,6 +5643,7 @@ static int msm_asoc_machine_remove(struct platform_device *pdev) gpio_free(pdata->us_euro_gpio); gpio_free(pdata->hph_en1_gpio); gpio_free(pdata->hph_en0_gpio); + i2s_auxpcm_deinit(); snd_soc_unregister_card(card); return 0; diff --git a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c index 70ed8dd3e038..841bb5bce13f 100644 --- a/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c +++ b/sound/soc/msm/qdsp6v2/msm-compress-q6-v2.c @@ -1762,7 +1762,12 @@ static int msm_compr_trigger(struct snd_compr_stream *cstream, int cmd) prtd->app_pointer = 0; prtd->first_buffer = 1; prtd->last_buffer = 0; - prtd->gapless_state.gapless_transition = 1; + /* + * Set gapless transition flag only if EOS hasn't been + * acknowledged already. + */ + if (atomic_read(&prtd->eos)) + prtd->gapless_state.gapless_transition = 1; prtd->marker_timestamp = 0; /* diff --git a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c index 5fa3b6fb0885..a89d88eac41e 100644 --- a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c +++ b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c @@ -30,6 +30,9 @@ #define MSM_DAI_PRI_AUXPCM_DT_DEV_ID 1 #define MSM_DAI_SEC_AUXPCM_DT_DEV_ID 2 +#define MSM_DAI_TERT_AUXPCM_DT_DEV_ID 3 +#define MSM_DAI_QUAT_AUXPCM_DT_DEV_ID 4 + #define spdif_clock_value(rate) (2*rate*32*2) #define CHANNEL_STATUS_SIZE 24 @@ -873,6 +876,22 @@ static int msm_dai_q6_auxpcm_prepare(struct snd_pcm_substream *substream, aux_dai_data->clk_set.clk_id = Q6AFE_LPASS_CLK_ID_SEC_PCM_EBIT; break; + case MSM_DAI_TERT_AUXPCM_DT_DEV_ID: + if (pcm_clk_rate) + aux_dai_data->clk_set.clk_id = + Q6AFE_LPASS_CLK_ID_TER_PCM_IBIT; + else + aux_dai_data->clk_set.clk_id = + Q6AFE_LPASS_CLK_ID_TER_PCM_EBIT; + break; + case MSM_DAI_QUAT_AUXPCM_DT_DEV_ID: + if (pcm_clk_rate) + aux_dai_data->clk_set.clk_id = + Q6AFE_LPASS_CLK_ID_QUAD_PCM_IBIT; + else + aux_dai_data->clk_set.clk_id = + Q6AFE_LPASS_CLK_ID_QUAD_PCM_EBIT; + break; default: dev_err(dai->dev, "%s: AUXPCM id: %d not supported\n", __func__, dai->id); @@ -1058,7 +1077,59 @@ static struct snd_soc_dai_driver msm_dai_q6_aux_pcm_dai[] = { .ops = &msm_dai_q6_auxpcm_ops, .probe = msm_dai_q6_aux_pcm_probe, .remove = msm_dai_q6_dai_auxpcm_remove, - } + }, + { + .playback = { + .stream_name = "Tert AUX PCM Playback", + .aif_name = "TERT_AUX_PCM_RX", + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1, + .rate_max = 16000, + .rate_min = 8000, + }, + .capture = { + .stream_name = "Tert AUX PCM Capture", + .aif_name = "TERT_AUX_PCM_TX", + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1, + .rate_max = 16000, + .rate_min = 8000, + }, + .id = MSM_DAI_TERT_AUXPCM_DT_DEV_ID, + .ops = &msm_dai_q6_auxpcm_ops, + .probe = msm_dai_q6_aux_pcm_probe, + .remove = msm_dai_q6_dai_auxpcm_remove, + }, + { + .playback = { + .stream_name = "Quat AUX PCM Playback", + .aif_name = "QUAT_AUX_PCM_RX", + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1, + .rate_max = 16000, + .rate_min = 8000, + }, + .capture = { + .stream_name = "Quat AUX PCM Capture", + .aif_name = "QUAT_AUX_PCM_TX", + .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1, + .rate_max = 16000, + .rate_min = 8000, + }, + .id = MSM_DAI_QUAT_AUXPCM_DT_DEV_ID, + .ops = &msm_dai_q6_auxpcm_ops, + .probe = msm_dai_q6_aux_pcm_probe, + .remove = msm_dai_q6_dai_auxpcm_remove, + }, }; static int msm_dai_q6_spdif_format_put(struct snd_kcontrol *kcontrol, @@ -2723,16 +2794,26 @@ static int msm_auxpcm_dev_probe(struct platform_device *pdev) goto fail_nodev_intf; } - if (!strncmp(intf_name, "primary", sizeof("primary"))) { + if (!strcmp(intf_name, "primary")) { dai_data->rx_pid = AFE_PORT_ID_PRIMARY_PCM_RX; dai_data->tx_pid = AFE_PORT_ID_PRIMARY_PCM_TX; pdev->id = MSM_DAI_PRI_AUXPCM_DT_DEV_ID; i = 0; - } else if (!strncmp(intf_name, "secondary", sizeof("secondary"))) { + } else if (!strcmp(intf_name, "secondary")) { dai_data->rx_pid = AFE_PORT_ID_SECONDARY_PCM_RX; dai_data->tx_pid = AFE_PORT_ID_SECONDARY_PCM_TX; pdev->id = MSM_DAI_SEC_AUXPCM_DT_DEV_ID; i = 1; + } else if (!strcmp(intf_name, "tertiary")) { + dai_data->rx_pid = AFE_PORT_ID_TERTIARY_PCM_RX; + dai_data->tx_pid = AFE_PORT_ID_TERTIARY_PCM_TX; + pdev->id = MSM_DAI_TERT_AUXPCM_DT_DEV_ID; + i = 2; + } else if (!strcmp(intf_name, "quaternary")) { + dai_data->rx_pid = AFE_PORT_ID_QUATERNARY_PCM_RX; + dai_data->tx_pid = AFE_PORT_ID_QUATERNARY_PCM_TX; + pdev->id = MSM_DAI_QUAT_AUXPCM_DT_DEV_ID; + i = 3; } else { dev_err(&pdev->dev, "%s: invalid DT intf name %s\n", __func__, intf_name); @@ -3639,22 +3720,28 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .playback = { .stream_name = "Primary MI2S Playback", .aif_name = "PRI_MI2S_RX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_3LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .capture = { .stream_name = "Primary MI2S Capture", .aif_name = "PRI_MI2S_TX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .ops = &msm_dai_q6_mi2s_ops, .id = MSM_PRIM_MI2S, @@ -3665,9 +3752,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .playback = { .stream_name = "Secondary MI2S Playback", .aif_name = "SEC_MI2S_RX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | - SNDRV_PCM_RATE_192000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 192000, @@ -3675,11 +3764,14 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .capture = { .stream_name = "Secondary MI2S Capture", .aif_name = "SEC_MI2S_TX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .ops = &msm_dai_q6_mi2s_ops, .id = MSM_SEC_MI2S, @@ -3690,20 +3782,26 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .playback = { .stream_name = "Tertiary MI2S Playback", .aif_name = "TERT_MI2S_RX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .capture = { .stream_name = "Tertiary MI2S Capture", .aif_name = "TERT_MI2S_TX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .ops = &msm_dai_q6_mi2s_ops, .id = MSM_TERT_MI2S, @@ -3714,9 +3812,11 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .playback = { .stream_name = "Quaternary MI2S Playback", .aif_name = "QUAT_MI2S_RX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 | - SNDRV_PCM_RATE_192000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, .rate_max = 192000, @@ -3724,11 +3824,14 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = { .capture = { .stream_name = "Quaternary MI2S Capture", .aif_name = "QUAT_MI2S_TX", - .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | - SNDRV_PCM_RATE_16000, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | + SNDRV_PCM_RATE_192000, .formats = SNDRV_PCM_FMTBIT_S16_LE, .rate_min = 8000, - .rate_max = 48000, + .rate_max = 192000, }, .ops = &msm_dai_q6_mi2s_ops, .id = MSM_QUAT_MI2S, diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c index aea60f1fa044..7e3653955a64 100644 --- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c +++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c @@ -450,6 +450,14 @@ struct msm_pcm_routing_bdai_data msm_bedais[MSM_BACKEND_DAI_MAX] = { { AFE_PORT_ID_USB_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_RX}, { AFE_PORT_ID_USB_TX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_USB_AUDIO_TX}, { DISPLAY_PORT_RX, 0, 0, 0, 0, 0, 0, 0, 0, LPASS_BE_DISPLAY_PORT}, + { AFE_PORT_ID_TERTIARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0, 0, + LPASS_BE_TERT_AUXPCM_RX}, + { AFE_PORT_ID_TERTIARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0, 0, + LPASS_BE_TERT_AUXPCM_TX}, + { AFE_PORT_ID_QUATERNARY_PCM_RX, 0, 0, 0, 0, 0, 0, 0, 0, + LPASS_BE_QUAT_AUXPCM_RX}, + { AFE_PORT_ID_QUATERNARY_PCM_TX, 0, 0, 0, 0, 0, 0, 0, 0, + LPASS_BE_QUAT_AUXPCM_TX}, }; /* Track ASM playback & capture sessions of DAI */ @@ -3491,6 +3499,108 @@ static const struct snd_kcontrol_new sec_auxpcm_rx_mixer_controls[] = { msm_routing_put_audio_mixer), }; +static const struct snd_kcontrol_new tert_auxpcm_rx_mixer_controls[] = { + SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), +}; + +static const struct snd_kcontrol_new quat_auxpcm_rx_mixer_controls[] = { + SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia2", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia3", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia4", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA4, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia5", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia6", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia7", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA7, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia8", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA8, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia9", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA9, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia10", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA10, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia11", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA11, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia12", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA12, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia13", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA13, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia14", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA14, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia15", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA15, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("MultiMedia16", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_MULTIMEDIA16, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), +}; + static const struct snd_kcontrol_new tert_tdm_rx_0_mixer_controls[] = { SOC_SINGLE_EXT("MultiMedia1", MSM_BACKEND_DAI_TERT_TDM_RX_0 , MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, @@ -3927,6 +4037,12 @@ static const struct snd_kcontrol_new mmul1_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), SOC_SINGLE_EXT("INTERNAL_BT_SCO_TX", MSM_BACKEND_DAI_INT_BT_SCO_TX, MSM_FRONTEND_DAI_MULTIMEDIA1, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), @@ -4065,6 +4181,12 @@ static const struct snd_kcontrol_new mmul3_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_MULTIMEDIA3, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), @@ -4179,6 +4301,12 @@ static const struct snd_kcontrol_new mmul5_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), @@ -4251,6 +4379,12 @@ static const struct snd_kcontrol_new mmul6_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, + msm_routing_put_audio_mixer), SOC_SINGLE_EXT("TERT_TDM_TX_0", MSM_BACKEND_DAI_TERT_TDM_TX_0, MSM_FRONTEND_DAI_MULTIMEDIA6, 1, 0, msm_routing_get_audio_mixer, msm_routing_put_audio_mixer), @@ -4874,6 +5008,72 @@ static const struct snd_kcontrol_new sec_aux_pcm_rx_voice_mixer_controls[] = { msm_routing_put_voice_mixer), }; +static const struct snd_kcontrol_new tert_aux_pcm_rx_voice_mixer_controls[] = { + SOC_SINGLE_EXT("CSVoice", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voice2", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voip", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voice Stub", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("VoLTE", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoWLAN", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("DTMF", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_DTMF_RX, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QCHAT", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoiceMMode1", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICEMMODE1, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoiceMMode2", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICEMMODE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), +}; + +static const struct snd_kcontrol_new quat_aux_pcm_rx_voice_mixer_controls[] = { + SOC_SINGLE_EXT("CSVoice", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voice2", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voip", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("Voice Stub", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("VoLTE", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoWLAN", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("DTMF", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_DTMF_RX, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QCHAT", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoiceMMode1", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICEMMODE1, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("VoiceMMode2", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_FRONTEND_DAI_VOICEMMODE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), +}; + static const struct snd_kcontrol_new hdmi_rx_voice_mixer_controls[] = { SOC_SINGLE_EXT("CSVoice", MSM_BACKEND_DAI_HDMI_RX, MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, @@ -5049,6 +5249,12 @@ static const struct snd_kcontrol_new tx_voice_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_Voice", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_Voice", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_Voice", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX_Voice", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_CS_VOICE, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5091,6 +5297,12 @@ static const struct snd_kcontrol_new tx_voice2_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_Voice2", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_Voice2", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_Voice2", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX_Voice2", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_VOICE2, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5127,6 +5339,12 @@ static const struct snd_kcontrol_new tx_volte_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_VoLTE", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_VoLTE", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_VoLTE", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("MI2S_TX_VoLTE", MSM_BACKEND_DAI_MI2S_TX, MSM_FRONTEND_DAI_VOLTE, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5166,6 +5384,12 @@ static const struct snd_kcontrol_new tx_vowlan_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_VoWLAN", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_VoWLAN", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_VoWLAN", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("MI2S_TX_VoWLAN", MSM_BACKEND_DAI_MI2S_TX, MSM_FRONTEND_DAI_VOWLAN, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5208,6 +5432,12 @@ static const struct snd_kcontrol_new tx_voicemmode1_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_MMode1", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE1, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_MMode1", + MSM_BACKEND_DAI_TERT_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE1, 1, + 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_MMode1", + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE1, 1, + 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX_MMode1", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_VOICEMMODE1, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5247,6 +5477,12 @@ static const struct snd_kcontrol_new tx_voicemmode2_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_MMode2", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE2, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_MMode2", + MSM_BACKEND_DAI_TERT_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE2, 1, + 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_MMode2", + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, MSM_FRONTEND_DAI_VOICEMMODE2, 1, + 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX_MMode2", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_VOICEMMODE2, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5286,6 +5522,12 @@ static const struct snd_kcontrol_new tx_voip_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_Voip", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_Voip", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_Voip", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("PRI_MI2S_TX_Voip", MSM_BACKEND_DAI_PRI_MI2S_TX, MSM_FRONTEND_DAI_VOIP, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5334,6 +5576,12 @@ static const struct snd_kcontrol_new tx_voice_stub_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_SLIMBUS_0_TX, MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), @@ -5364,6 +5612,15 @@ static const struct snd_kcontrol_new tx_voice2_stub_mixer_controls[] = { SOC_SINGLE_EXT("AUX_PCM_UL_TX", MSM_BACKEND_DAI_AUXPCM_TX, MSM_FRONTEND_DAI_VOICE2_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE2_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE2_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOICE2_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_SLIMBUS_0_TX, MSM_FRONTEND_DAI_VOICE2_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), @@ -5400,6 +5657,15 @@ static const struct snd_kcontrol_new tx_volte_stub_mixer_controls[] = { SOC_SINGLE_EXT("AUX_PCM_UL_TX", MSM_BACKEND_DAI_AUXPCM_TX, MSM_FRONTEND_DAI_VOLTE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SEC_AUXPCM_TX, + MSM_FRONTEND_DAI_VOLTE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOLTE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_VOLTE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, + msm_routing_put_voice_stub_mixer), SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_SLIMBUS_0_TX, MSM_FRONTEND_DAI_VOLTE_STUB, 1, 0, msm_routing_get_voice_stub_mixer, msm_routing_put_voice_stub_mixer), @@ -5442,6 +5708,12 @@ static const struct snd_kcontrol_new tx_qchat_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_TX_QCHAT", MSM_BACKEND_DAI_SEC_AUXPCM_TX, MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_TX_QCHAT", MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_TX_QCHAT", MSM_BACKEND_DAI_QUAT_AUXPCM_TX, + MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, + msm_routing_put_voice_mixer), SOC_SINGLE_EXT("MI2S_TX_QCHAT", MSM_BACKEND_DAI_MI2S_TX, MSM_FRONTEND_DAI_QCHAT, 1, 0, msm_routing_get_voice_mixer, msm_routing_put_voice_mixer), @@ -5484,6 +5756,12 @@ static const struct snd_kcontrol_new sbus_0_rx_port_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_0_RX, MSM_BACKEND_DAI_SEC_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, msm_routing_put_port_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_0_RX, + MSM_BACKEND_DAI_TERT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_0_RX, + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), SOC_SINGLE_EXT("MI2S_TX", MSM_BACKEND_DAI_SLIMBUS_0_RX, MSM_BACKEND_DAI_MI2S_TX, 1, 0, msm_routing_get_port_mixer, msm_routing_put_port_mixer), @@ -5540,6 +5818,30 @@ static const struct snd_kcontrol_new sec_auxpcm_rx_port_mixer_controls[] = { msm_routing_put_port_mixer), }; +static const struct snd_kcontrol_new tert_auxpcm_rx_port_mixer_controls[] = { + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_BACKEND_DAI_TERT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_BACKEND_DAI_SLIMBUS_0_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("AUX_PCM_UL_TX", MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_BACKEND_DAI_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), +}; + +static const struct snd_kcontrol_new quat_auxpcm_rx_port_mixer_controls[] = { + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_BACKEND_DAI_SLIMBUS_0_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("AUX_PCM_UL_TX", MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_BACKEND_DAI_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), +}; + static const struct snd_kcontrol_new sbus_1_rx_port_mixer_controls[] = { SOC_SINGLE_EXT("INTERNAL_BT_SCO_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX, MSM_BACKEND_DAI_INT_BT_SCO_TX, 1, 0, msm_routing_get_port_mixer, @@ -5553,6 +5855,12 @@ static const struct snd_kcontrol_new sbus_1_rx_port_mixer_controls[] = { SOC_SINGLE_EXT("SEC_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX, MSM_BACKEND_DAI_SEC_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, msm_routing_put_port_mixer), + SOC_SINGLE_EXT("TERT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX, + MSM_BACKEND_DAI_TERT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), + SOC_SINGLE_EXT("QUAT_AUX_PCM_UL_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX, + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, 1, 0, msm_routing_get_port_mixer, + msm_routing_put_port_mixer), }; static const struct snd_kcontrol_new sbus_3_rx_port_mixer_controls[] = { @@ -7689,6 +7997,14 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = { 0, 0, 0, 0), SND_SOC_DAPM_AIF_IN("SEC_AUX_PCM_TX", "Sec AUX PCM Capture", 0, 0, 0, 0), + SND_SOC_DAPM_AIF_OUT("TERT_AUX_PCM_RX", "Tert AUX PCM Playback", + 0, 0, 0, 0), + SND_SOC_DAPM_AIF_IN("TERT_AUX_PCM_TX", "Tert AUX PCM Capture", + 0, 0, 0, 0), + SND_SOC_DAPM_AIF_OUT("QUAT_AUX_PCM_RX", "Quat AUX PCM Playback", + 0, 0, 0, 0), + SND_SOC_DAPM_AIF_IN("QUAT_AUX_PCM_TX", "Quat AUX PCM Capture", + 0, 0, 0, 0), SND_SOC_DAPM_AIF_IN("VOICE_STUB_DL", "VOICE_STUB Playback", 0, 0, 0, 0), SND_SOC_DAPM_AIF_OUT("VOICE_STUB_UL", "VOICE_STUB Capture", 0, 0, 0, 0), SND_SOC_DAPM_AIF_IN("VOICE2_STUB_DL", "VOICE2_STUB Playback", @@ -7840,6 +8156,12 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = { auxpcm_rx_mixer_controls, ARRAY_SIZE(auxpcm_rx_mixer_controls)), SND_SOC_DAPM_MIXER("SEC_AUX_PCM_RX Audio Mixer", SND_SOC_NOPM, 0, 0, sec_auxpcm_rx_mixer_controls, ARRAY_SIZE(sec_auxpcm_rx_mixer_controls)), + SND_SOC_DAPM_MIXER("TERT_AUX_PCM_RX Audio Mixer", SND_SOC_NOPM, 0, 0, + tert_auxpcm_rx_mixer_controls, + ARRAY_SIZE(tert_auxpcm_rx_mixer_controls)), + SND_SOC_DAPM_MIXER("QUAT_AUX_PCM_RX Audio Mixer", SND_SOC_NOPM, 0, 0, + quat_auxpcm_rx_mixer_controls, + ARRAY_SIZE(quat_auxpcm_rx_mixer_controls)), /* incall */ SND_SOC_DAPM_MIXER("Incall_Music Audio Mixer", SND_SOC_NOPM, 0, 0, incall_music_delivery_mixer_controls, @@ -7888,6 +8210,14 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = { SND_SOC_NOPM, 0, 0, sec_aux_pcm_rx_voice_mixer_controls, ARRAY_SIZE(sec_aux_pcm_rx_voice_mixer_controls)), + SND_SOC_DAPM_MIXER("TERT_AUX_PCM_RX_Voice Mixer", + SND_SOC_NOPM, 0, 0, + tert_aux_pcm_rx_voice_mixer_controls, + ARRAY_SIZE(tert_aux_pcm_rx_voice_mixer_controls)), + SND_SOC_DAPM_MIXER("QUAT_AUX_PCM_RX_Voice Mixer", + SND_SOC_NOPM, 0, 0, + quat_aux_pcm_rx_voice_mixer_controls, + ARRAY_SIZE(quat_aux_pcm_rx_voice_mixer_controls)), SND_SOC_DAPM_MIXER("HDMI_RX_Voice Mixer", SND_SOC_NOPM, 0, 0, hdmi_rx_voice_mixer_controls, @@ -7975,6 +8305,12 @@ static const struct snd_soc_dapm_widget msm_qdsp6_widgets[] = { SND_SOC_DAPM_MIXER("SEC_AUXPCM_RX Port Mixer", SND_SOC_NOPM, 0, 0, sec_auxpcm_rx_port_mixer_controls, ARRAY_SIZE(sec_auxpcm_rx_port_mixer_controls)), + SND_SOC_DAPM_MIXER("TERT_AUXPCM_RX Port Mixer", + SND_SOC_NOPM, 0, 0, tert_auxpcm_rx_port_mixer_controls, + ARRAY_SIZE(tert_auxpcm_rx_port_mixer_controls)), + SND_SOC_DAPM_MIXER("QUAT_AUXPCM_RX Port Mixer", + SND_SOC_NOPM, 0, 0, quat_auxpcm_rx_port_mixer_controls, + ARRAY_SIZE(quat_auxpcm_rx_port_mixer_controls)), SND_SOC_DAPM_MIXER("SLIMBUS_1_RX Port Mixer", SND_SOC_NOPM, 0, 0, sbus_1_rx_port_mixer_controls, ARRAY_SIZE(sbus_1_rx_port_mixer_controls)), @@ -8556,7 +8892,6 @@ static const struct snd_soc_dapm_route intercon[] = { {"QUAT_TDM_RX_3 Audio Mixer", "MultiMedia16", "MM_DL16"}, {"QUAT_TDM_RX_3", NULL, "QUAT_TDM_RX_3 Audio Mixer"}, - {"TERT_MI2S_RX Audio Mixer", "MultiMedia1", "MM_DL1"}, {"MultiMedia1 Mixer", "PRI_TX", "PRI_I2S_TX"}, {"MultiMedia1 Mixer", "MI2S_TX", "MI2S_TX"}, {"MultiMedia2 Mixer", "MI2S_TX", "MI2S_TX"}, @@ -8575,6 +8910,12 @@ static const struct snd_soc_dapm_route intercon[] = { {"MultiMedia1 Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"}, {"MultiMedia3 Mixer", "SEC_AUX_PCM_TX", "SEC_AUX_PCM_TX"}, {"MultiMedia5 Mixer", "SEC_AUX_PCM_TX", "SEC_AUX_PCM_TX"}, + {"MultiMedia1 Mixer", "TERT_AUX_PCM_UL_TX", "TERT_AUX_PCM_TX"}, + {"MultiMedia3 Mixer", "TERT_AUX_PCM_TX", "TERT_AUX_PCM_TX"}, + {"MultiMedia5 Mixer", "TERT_AUX_PCM_TX", "TERT_AUX_PCM_TX"}, + {"MultiMedia1 Mixer", "QUAT_AUX_PCM_UL_TX", "QUAT_AUX_PCM_TX"}, + {"MultiMedia3 Mixer", "QUAT_AUX_PCM_TX", "QUAT_AUX_PCM_TX"}, + {"MultiMedia5 Mixer", "QUAT_AUX_PCM_TX", "QUAT_AUX_PCM_TX"}, {"MultiMedia2 Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"}, {"MultiMedia2 Mixer", "SLIM_8_TX", "SLIMBUS_8_TX"}, {"MultiMedia1 Mixer", "SEC_MI2S_TX", "SEC_MI2S_TX"}, @@ -8772,7 +9113,6 @@ static const struct snd_soc_dapm_route intercon[] = { {"AUX_PCM_RX Audio Mixer", "MultiMedia14", "MM_DL14"}, {"AUX_PCM_RX Audio Mixer", "MultiMedia15", "MM_DL15"}, {"AUX_PCM_RX Audio Mixer", "MultiMedia16", "MM_DL16"}, - {"AUX_PCM_RX Audio Mixer", "MultiMedia6", "MM_UL6"}, {"AUX_PCM_RX", NULL, "AUX_PCM_RX Audio Mixer"}, {"SEC_AUX_PCM_RX Audio Mixer", "MultiMedia1", "MM_DL1"}, @@ -8791,9 +9131,44 @@ static const struct snd_soc_dapm_route intercon[] = { {"SEC_AUX_PCM_RX Audio Mixer", "MultiMedia14", "MM_DL14"}, {"SEC_AUX_PCM_RX Audio Mixer", "MultiMedia15", "MM_DL15"}, {"SEC_AUX_PCM_RX Audio Mixer", "MultiMedia16", "MM_DL16"}, - {"SEC_AUX_PCM_RX Audio Mixer", "MultiMedia6", "MM_UL6"}, {"SEC_AUX_PCM_RX", NULL, "SEC_AUX_PCM_RX Audio Mixer"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia1", "MM_DL1"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia2", "MM_DL2"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia3", "MM_DL3"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia4", "MM_DL4"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia5", "MM_DL5"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia6", "MM_DL6"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia7", "MM_DL7"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia8", "MM_DL8"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia9", "MM_DL9"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia10", "MM_DL10"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia11", "MM_DL11"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia12", "MM_DL12"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia13", "MM_DL13"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia14", "MM_DL14"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia15", "MM_DL15"}, + {"TERT_AUX_PCM_RX Audio Mixer", "MultiMedia16", "MM_DL16"}, + {"TERT_AUX_PCM_RX", NULL, "TERT_AUX_PCM_RX Audio Mixer"}, + + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia1", "MM_DL1"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia2", "MM_DL2"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia3", "MM_DL3"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia4", "MM_DL4"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia5", "MM_DL5"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia6", "MM_DL6"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia7", "MM_DL7"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia8", "MM_DL8"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia9", "MM_DL9"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia10", "MM_DL10"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia11", "MM_DL11"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia12", "MM_DL12"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia13", "MM_DL13"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia14", "MM_DL14"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia15", "MM_DL15"}, + {"QUAT_AUX_PCM_RX Audio Mixer", "MultiMedia16", "MM_DL16"}, + {"QUAT_AUX_PCM_RX", NULL, "QUAT_AUX_PCM_RX Audio Mixer"}, + {"MI2S_RX_Voice Mixer", "CSVoice", "CS-VOICE_DL1"}, {"MI2S_RX_Voice Mixer", "Voice2", "VOICE2_DL"}, {"MI2S_RX_Voice Mixer", "Voip", "VOIP_DL"}, @@ -8925,6 +9300,30 @@ static const struct snd_soc_dapm_route intercon[] = { {"SEC_AUX_PCM_RX_Voice Mixer", "VoiceMMode2", "VOICEMMODE2_DL"}, {"SEC_AUX_PCM_RX", NULL, "SEC_AUX_PCM_RX_Voice Mixer"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "CSVoice", "CS-VOICE_DL1"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "Voice2", "VOICE2_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "VoLTE", "VoLTE_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "VoWLAN", "VoWLAN_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "Voip", "VOIP_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "DTMF", "DTMF_DL_HL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "QCHAT", "QCHAT_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "VoiceMMode1", "VOICEMMODE1_DL"}, + {"TERT_AUX_PCM_RX_Voice Mixer", "VoiceMMode2", "VOICEMMODE2_DL"}, + {"TERT_AUX_PCM_RX", NULL, "TERT_AUX_PCM_RX_Voice Mixer"}, + + {"QUAT_AUX_PCM_RX_Voice Mixer", "CSVoice", "CS-VOICE_DL1"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "Voice2", "VOICE2_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "VoLTE", "VoLTE_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "VoWLAN", "VoWLAN_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "Voip", "VOIP_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "DTMF", "DTMF_DL_HL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "QCHAT", "QCHAT_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "VoiceMMode1", "VOICEMMODE1_DL"}, + {"QUAT_AUX_PCM_RX_Voice Mixer", "VoiceMMode2", "VOICEMMODE2_DL"}, + {"QUAT_AUX_PCM_RX", NULL, "QUAT_AUX_PCM_RX_Voice Mixer"}, + {"HDMI_RX_Voice Mixer", "CSVoice", "CS-VOICE_DL1"}, {"HDMI_RX_Voice Mixer", "Voice2", "VOICE2_DL"}, {"HDMI_RX_Voice Mixer", "VoLTE", "VoLTE_DL"}, @@ -9076,6 +9475,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"Voice_Tx Mixer", "AFE_PCM_TX_Voice", "PCM_TX"}, {"Voice_Tx Mixer", "AUX_PCM_TX_Voice", "AUX_PCM_TX"}, {"Voice_Tx Mixer", "SEC_AUX_PCM_TX_Voice", "SEC_AUX_PCM_TX"}, + {"Voice_Tx Mixer", "TERT_AUX_PCM_TX_Voice", "TERT_AUX_PCM_TX"}, + {"Voice_Tx Mixer", "QUAT_AUX_PCM_TX_Voice", "QUAT_AUX_PCM_TX"}, {"Voice_Tx Mixer", "SEC_MI2S_TX_Voice", "SEC_MI2S_TX"}, {"CS-VOICE_UL1", NULL, "Voice_Tx Mixer"}, @@ -9091,6 +9492,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"Voice2_Tx Mixer", "AFE_PCM_TX_Voice2", "PCM_TX"}, {"Voice2_Tx Mixer", "AUX_PCM_TX_Voice2", "AUX_PCM_TX"}, {"Voice2_Tx Mixer", "SEC_AUX_PCM_TX_Voice2", "SEC_AUX_PCM_TX"}, + {"Voice2_Tx Mixer", "TERT_AUX_PCM_TX_Voice2", "TERT_AUX_PCM_TX"}, + {"Voice2_Tx Mixer", "QUAT_AUX_PCM_TX_Voice2", "QUAT_AUX_PCM_TX"}, {"VOICE2_UL", NULL, "Voice2_Tx Mixer"}, {"VoLTE_Tx Mixer", "PRI_TX_VoLTE", "PRI_I2S_TX"}, @@ -9102,6 +9505,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"VoLTE_Tx Mixer", "AFE_PCM_TX_VoLTE", "PCM_TX"}, {"VoLTE_Tx Mixer", "AUX_PCM_TX_VoLTE", "AUX_PCM_TX"}, {"VoLTE_Tx Mixer", "SEC_AUX_PCM_TX_VoLTE", "SEC_AUX_PCM_TX"}, + {"VoLTE_Tx Mixer", "TERT_AUX_PCM_TX_VoLTE", "TERT_AUX_PCM_TX"}, + {"VoLTE_Tx Mixer", "QUAT_AUX_PCM_TX_VoLTE", "QUAT_AUX_PCM_TX"}, {"VoLTE_Tx Mixer", "MI2S_TX_VoLTE", "MI2S_TX"}, {"VoLTE_Tx Mixer", "PRI_MI2S_TX_VoLTE", "PRI_MI2S_TX"}, {"VoLTE_Tx Mixer", "TERT_MI2S_TX_VoLTE", "TERT_MI2S_TX"}, @@ -9116,6 +9521,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"VoWLAN_Tx Mixer", "AFE_PCM_TX_VoWLAN", "PCM_TX"}, {"VoWLAN_Tx Mixer", "AUX_PCM_TX_VoWLAN", "AUX_PCM_TX"}, {"VoWLAN_Tx Mixer", "SEC_AUX_PCM_TX_VoWLAN", "SEC_AUX_PCM_TX"}, + {"VoWLAN_Tx Mixer", "TERT_AUX_PCM_TX_VoWLAN", "TERT_AUX_PCM_TX"}, + {"VoWLAN_Tx Mixer", "QUAT_AUX_PCM_TX_VoWLAN", "QUAT_AUX_PCM_TX"}, {"VoWLAN_Tx Mixer", "MI2S_TX_VoWLAN", "MI2S_TX"}, {"VoWLAN_Tx Mixer", "PRI_MI2S_TX_VoWLAN", "PRI_MI2S_TX"}, {"VoWLAN_Tx Mixer", "TERT_MI2S_TX_VoWLAN", "TERT_MI2S_TX"}, @@ -9133,6 +9540,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"VoiceMMode1_Tx Mixer", "AFE_PCM_TX_MMode1", "PCM_TX"}, {"VoiceMMode1_Tx Mixer", "AUX_PCM_TX_MMode1", "AUX_PCM_TX"}, {"VoiceMMode1_Tx Mixer", "SEC_AUX_PCM_TX_MMode1", "SEC_AUX_PCM_TX"}, + {"VoiceMMode1_Tx Mixer", "TERT_AUX_PCM_TX_MMode1", "TERT_AUX_PCM_TX"}, + {"VoiceMMode1_Tx Mixer", "QUAT_AUX_PCM_TX_MMode1", "QUAT_AUX_PCM_TX"}, {"VOICEMMODE1_UL", NULL, "VoiceMMode1_Tx Mixer"}, {"VoiceMMode2_Tx Mixer", "PRI_TX_MMode2", "PRI_I2S_TX"}, @@ -9147,6 +9556,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"VoiceMMode2_Tx Mixer", "AFE_PCM_TX_MMode2", "PCM_TX"}, {"VoiceMMode2_Tx Mixer", "AUX_PCM_TX_MMode2", "AUX_PCM_TX"}, {"VoiceMMode2_Tx Mixer", "SEC_AUX_PCM_TX_MMode2", "SEC_AUX_PCM_TX"}, + {"VoiceMMode2_Tx Mixer", "TERT_AUX_PCM_TX_MMode2", "TERT_AUX_PCM_TX"}, + {"VoiceMMode2_Tx Mixer", "QUAT_AUX_PCM_TX_MMode2", "QUAT_AUX_PCM_TX"}, {"VOICEMMODE2_UL", NULL, "VoiceMMode2_Tx Mixer"}, {"Voip_Tx Mixer", "PRI_TX_Voip", "PRI_I2S_TX"}, @@ -9160,6 +9571,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"Voip_Tx Mixer", "AFE_PCM_TX_Voip", "PCM_TX"}, {"Voip_Tx Mixer", "AUX_PCM_TX_Voip", "AUX_PCM_TX"}, {"Voip_Tx Mixer", "SEC_AUX_PCM_TX_Voip", "SEC_AUX_PCM_TX"}, + {"Voip_Tx Mixer", "TERT_AUX_PCM_TX_Voip", "TERT_AUX_PCM_TX"}, + {"Voip_Tx Mixer", "QUAT_AUX_PCM_TX_Voip", "QUAT_AUX_PCM_TX"}, {"Voip_Tx Mixer", "PRI_MI2S_TX_Voip", "PRI_MI2S_TX"}, {"VOIP_UL", NULL, "Voip_Tx Mixer"}, @@ -9254,6 +9667,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"QCHAT_Tx Mixer", "AFE_PCM_TX_QCHAT", "PCM_TX"}, {"QCHAT_Tx Mixer", "AUX_PCM_TX_QCHAT", "AUX_PCM_TX"}, {"QCHAT_Tx Mixer", "SEC_AUX_PCM_TX_QCHAT", "SEC_AUX_PCM_TX"}, + {"QCHAT_Tx Mixer", "TERT_AUX_PCM_TX_QCHAT", "TERT_AUX_PCM_TX"}, + {"QCHAT_Tx Mixer", "QUAT_AUX_PCM_TX_QCHAT", "QUAT_AUX_PCM_TX"}, {"QCHAT_Tx Mixer", "MI2S_TX_QCHAT", "MI2S_TX"}, {"QCHAT_Tx Mixer", "PRI_MI2S_TX_QCHAT", "PRI_MI2S_TX"}, {"QCHAT_Tx Mixer", "TERT_MI2S_TX_QCHAT", "TERT_MI2S_TX"}, @@ -9460,6 +9875,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"SLIMBUS_0_RX Port Mixer", "SLIM_8_TX", "SLIMBUS_8_TX"}, {"SLIMBUS_0_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"}, {"SLIMBUS_0_RX Port Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"}, + {"SLIMBUS_0_RX Port Mixer", "TERT_AUX_PCM_UL_TX", "TERT_AUX_PCM_TX"}, + {"SLIMBUS_0_RX Port Mixer", "QUAT_AUX_PCM_UL_TX", "QUAT_AUX_PCM_TX"}, {"SLIMBUS_0_RX Port Mixer", "MI2S_TX", "MI2S_TX"}, {"SLIMBUS_0_RX Port Mixer", "PRI_MI2S_TX", "PRI_MI2S_TX"}, {"SLIMBUS_0_RX Port Mixer", "SEC_MI2S_TX", "SEC_MI2S_TX"}, @@ -9482,12 +9899,24 @@ static const struct snd_soc_dapm_route intercon[] = { {"SEC_AUXPCM_RX Port Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"}, {"SEC_AUX_PCM_RX", NULL, "SEC_AUXPCM_RX Port Mixer"}, + {"TERT_AUXPCM_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"}, + {"TERT_AUXPCM_RX Port Mixer", "TERT_AUX_PCM_UL_TX", "TERT_AUX_PCM_TX"}, + {"TERT_AUXPCM_RX Port Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"}, + {"TERT_AUX_PCM_RX", NULL, "TERT_AUXPCM_RX Port Mixer"}, + + {"QUAT_AUXPCM_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"}, + {"QUAT_AUXPCM_RX Port Mixer", "QUAT_AUX_PCM_UL_TX", "QUAT_AUX_PCM_TX"}, + {"QUAT_AUXPCM_RX Port Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"}, + {"QUAT_AUX_PCM_RX", NULL, "QUAT_AUXPCM_RX Port Mixer"}, + {"Voice Stub Tx Mixer", "STUB_TX_HL", "STUB_TX"}, {"Voice Stub Tx Mixer", "SLIM_1_TX", "SLIMBUS_1_TX"}, {"Voice Stub Tx Mixer", "INTERNAL_BT_SCO_TX", "INT_BT_SCO_TX"}, {"Voice Stub Tx Mixer", "STUB_1_TX_HL", "STUB_1_TX"}, {"Voice Stub Tx Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"}, {"Voice Stub Tx Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"}, + {"Voice Stub Tx Mixer", "TERT_AUX_PCM_UL_TX", "TERT_AUX_PCM_TX"}, + {"Voice Stub Tx Mixer", "QUAT_AUX_PCM_UL_TX", "QUAT_AUX_PCM_TX"}, {"Voice Stub Tx Mixer", "MI2S_TX", "MI2S_TX"}, {"Voice Stub Tx Mixer", "PRI_MI2S_TX", "PRI_MI2S_TX"}, {"Voice Stub Tx Mixer", "TERT_MI2S_TX", "TERT_MI2S_TX"}, @@ -9675,12 +10104,12 @@ static const struct snd_soc_dapm_route intercon[] = { {"BE_OUT", NULL, "SLIMBUS_3_RX"}, {"BE_OUT", NULL, "AUX_PCM_RX"}, {"BE_OUT", NULL, "SEC_AUX_PCM_RX"}, + {"BE_OUT", NULL, "TERT_AUX_PCM_RX"}, + {"BE_OUT", NULL, "QUAT_AUX_PCM_RX"}, {"BE_OUT", NULL, "INT_BT_SCO_RX"}, {"BE_OUT", NULL, "INT_FM_RX"}, {"BE_OUT", NULL, "PCM_RX"}, {"BE_OUT", NULL, "SLIMBUS_3_RX"}, - {"BE_OUT", NULL, "AUX_PCM_RX"}, - {"BE_OUT", NULL, "SEC_AUX_PCM_RX"}, {"BE_OUT", NULL, "VOICE_PLAYBACK_TX"}, {"BE_OUT", NULL, "VOICE2_PLAYBACK_TX"}, {"BE_OUT", NULL, "TERT_TDM_RX_0"}, @@ -9719,6 +10148,8 @@ static const struct snd_soc_dapm_route intercon[] = { {"BE_OUT", NULL, "AUX_PCM_RX"}, {"AUX_PCM_TX", NULL, "BE_IN"}, {"SEC_AUX_PCM_TX", NULL, "BE_IN"}, + {"TERT_AUX_PCM_TX", NULL, "BE_IN"}, + {"QUAT_AUX_PCM_TX", NULL, "BE_IN"}, {"INCALL_RECORD_TX", NULL, "BE_IN"}, {"INCALL_RECORD_RX", NULL, "BE_IN"}, {"SLIM0_RX_VI_FB_LCH_MUX", "SLIM4_TX", "SLIMBUS_4_TX"}, diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h index d8cec53c0d9e..6b7f2113e0f6 100644 --- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h +++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.h @@ -30,6 +30,10 @@ #define LPASS_BE_AUXPCM_TX "AUX_PCM_TX" #define LPASS_BE_SEC_AUXPCM_RX "SEC_AUX_PCM_RX" #define LPASS_BE_SEC_AUXPCM_TX "SEC_AUX_PCM_TX" +#define LPASS_BE_TERT_AUXPCM_RX "TERT_AUX_PCM_RX" +#define LPASS_BE_TERT_AUXPCM_TX "TERT_AUX_PCM_TX" +#define LPASS_BE_QUAT_AUXPCM_RX "QUAT_AUX_PCM_RX" +#define LPASS_BE_QUAT_AUXPCM_TX "QUAT_AUX_PCM_TX" #define LPASS_BE_VOICE_PLAYBACK_TX "VOICE_PLAYBACK_TX" #define LPASS_BE_VOICE2_PLAYBACK_TX "VOICE2_PLAYBACK_TX" #define LPASS_BE_INCALL_RECORD_RX "INCALL_RECORD_RX" @@ -313,6 +317,10 @@ enum { MSM_BACKEND_DAI_USB_RX, MSM_BACKEND_DAI_USB_TX, MSM_BACKEND_DAI_DISPLAY_PORT_RX, + MSM_BACKEND_DAI_TERT_AUXPCM_RX, + MSM_BACKEND_DAI_TERT_AUXPCM_TX, + MSM_BACKEND_DAI_QUAT_AUXPCM_RX, + MSM_BACKEND_DAI_QUAT_AUXPCM_TX, MSM_BACKEND_DAI_MAX, }; diff --git a/sound/soc/msm/qdsp6v2/q6afe.c b/sound/soc/msm/qdsp6v2/q6afe.c index f6a687611f8a..af5a99e56afc 100644 --- a/sound/soc/msm/qdsp6v2/q6afe.c +++ b/sound/soc/msm/qdsp6v2/q6afe.c @@ -419,7 +419,6 @@ int afe_get_port_type(u16 port_id) switch (port_id) { case PRIMARY_I2S_RX: - case AFE_PORT_ID_PRIMARY_PCM_RX: case SECONDARY_I2S_RX: case MI2S_RX: case HDMI_RX: @@ -446,8 +445,11 @@ int afe_get_port_type(u16 port_id) case AFE_PORT_ID_SECONDARY_MI2S_RX_SD1: case AFE_PORT_ID_TERTIARY_MI2S_RX: case AFE_PORT_ID_QUATERNARY_MI2S_RX: - case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_QUINARY_MI2S_RX: + case AFE_PORT_ID_PRIMARY_PCM_RX: + case AFE_PORT_ID_SECONDARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: case AFE_PORT_ID_PRIMARY_TDM_RX: case AFE_PORT_ID_PRIMARY_TDM_RX_1: case AFE_PORT_ID_PRIMARY_TDM_RX_2: @@ -485,7 +487,6 @@ int afe_get_port_type(u16 port_id) break; case PRIMARY_I2S_TX: - case AFE_PORT_ID_PRIMARY_PCM_TX: case SECONDARY_I2S_TX: case MI2S_TX: case DIGI_MIC_TX: @@ -507,9 +508,12 @@ int afe_get_port_type(u16 port_id) case AFE_PORT_ID_SECONDARY_MI2S_TX: case AFE_PORT_ID_TERTIARY_MI2S_TX: case AFE_PORT_ID_QUATERNARY_MI2S_TX: - case AFE_PORT_ID_SECONDARY_PCM_TX: case AFE_PORT_ID_QUINARY_MI2S_TX: case AFE_PORT_ID_SENARY_MI2S_TX: + case AFE_PORT_ID_PRIMARY_PCM_TX: + case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: case AFE_PORT_ID_PRIMARY_TDM_TX: case AFE_PORT_ID_PRIMARY_TDM_TX_1: case AFE_PORT_ID_PRIMARY_TDM_TX_2: @@ -617,8 +621,12 @@ int afe_sizeof_cfg_cmd(u16 port_id) case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: default: - pr_err("%s: default case 0x%x\n", __func__, port_id); + pr_debug("%s: default case 0x%x\n", __func__, port_id); ret_size = SIZEOF_CFG_CMD(afe_param_id_pcm_cfg); break; } @@ -2876,6 +2884,10 @@ static int __afe_port_start(u16 port_id, union afe_port_config *afe_config, case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: cfg_type = AFE_PARAM_ID_PCM_CONFIG; break; case PRIMARY_I2S_RX: @@ -3071,6 +3083,14 @@ int afe_get_port_index(u16 port_id) return IDX_AFE_PORT_ID_SECONDARY_PCM_RX; case AFE_PORT_ID_SECONDARY_PCM_TX: return IDX_AFE_PORT_ID_SECONDARY_PCM_TX; + case AFE_PORT_ID_TERTIARY_PCM_RX: + return IDX_AFE_PORT_ID_TERTIARY_PCM_RX; + case AFE_PORT_ID_TERTIARY_PCM_TX: + return IDX_AFE_PORT_ID_TERTIARY_PCM_TX; + case AFE_PORT_ID_QUATERNARY_PCM_RX: + return IDX_AFE_PORT_ID_QUATERNARY_PCM_RX; + case AFE_PORT_ID_QUATERNARY_PCM_TX: + return IDX_AFE_PORT_ID_QUATERNARY_PCM_TX; case SECONDARY_I2S_RX: return IDX_SECONDARY_I2S_RX; case SECONDARY_I2S_TX: return IDX_SECONDARY_I2S_TX; case MI2S_RX: return IDX_MI2S_RX; @@ -3340,6 +3360,10 @@ int afe_open(u16 port_id, case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: cfg_type = AFE_PARAM_ID_PCM_CONFIG; break; case SECONDARY_I2S_RX: @@ -4009,6 +4033,14 @@ int afe_cmd_memory_map(phys_addr_t dma_addr_p, u32 dma_buf_sz) } rtac_set_afe_handle(this_afe.apr); } + if (dma_buf_sz % SZ_4K != 0) { + /* + * The memory allocated by msm_audio_ion_alloc is always 4kB + * aligned, ADSP expects the size to be 4kB aligned as well + * so re-adjusts the buffer size before passing to ADSP. + */ + dma_buf_sz = PAGE_ALIGN(dma_buf_sz); + } cmd_size = sizeof(struct afe_service_cmd_shared_mem_map_regions) \ + sizeof(struct afe_service_shared_map_region_payload); @@ -4809,6 +4841,10 @@ int afe_validate_port(u16 port_id) case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: case SECONDARY_I2S_RX: case SECONDARY_I2S_TX: case MI2S_RX: diff --git a/sound/soc/msm/qdsp6v2/q6audio-v2.c b/sound/soc/msm/qdsp6v2/q6audio-v2.c index a737a27cc327..99f5f0e1a5a5 100644 --- a/sound/soc/msm/qdsp6v2/q6audio-v2.c +++ b/sound/soc/msm/qdsp6v2/q6audio-v2.c @@ -32,6 +32,14 @@ int q6audio_get_port_index(u16 port_id) return IDX_AFE_PORT_ID_SECONDARY_PCM_RX; case AFE_PORT_ID_SECONDARY_PCM_TX: return IDX_AFE_PORT_ID_SECONDARY_PCM_TX; + case AFE_PORT_ID_TERTIARY_PCM_RX: + return IDX_AFE_PORT_ID_TERTIARY_PCM_RX; + case AFE_PORT_ID_TERTIARY_PCM_TX: + return IDX_AFE_PORT_ID_TERTIARY_PCM_TX; + case AFE_PORT_ID_QUATERNARY_PCM_RX: + return IDX_AFE_PORT_ID_QUATERNARY_PCM_RX; + case AFE_PORT_ID_QUATERNARY_PCM_TX: + return IDX_AFE_PORT_ID_QUATERNARY_PCM_TX; case SECONDARY_I2S_RX: return IDX_SECONDARY_I2S_RX; case SECONDARY_I2S_TX: return IDX_SECONDARY_I2S_TX; case MI2S_RX: return IDX_MI2S_RX; @@ -242,6 +250,14 @@ int q6audio_get_port_id(u16 port_id) return AFE_PORT_ID_SECONDARY_PCM_RX; case AFE_PORT_ID_SECONDARY_PCM_TX: return AFE_PORT_ID_SECONDARY_PCM_TX; + case AFE_PORT_ID_TERTIARY_PCM_RX: + return AFE_PORT_ID_TERTIARY_PCM_RX; + case AFE_PORT_ID_TERTIARY_PCM_TX: + return AFE_PORT_ID_TERTIARY_PCM_TX; + case AFE_PORT_ID_QUATERNARY_PCM_RX: + return AFE_PORT_ID_QUATERNARY_PCM_RX; + case AFE_PORT_ID_QUATERNARY_PCM_TX: + return AFE_PORT_ID_QUATERNARY_PCM_TX; case SECONDARY_I2S_RX: return AFE_PORT_ID_SECONDARY_MI2S_RX; case SECONDARY_I2S_TX: return AFE_PORT_ID_SECONDARY_MI2S_TX; case MI2S_RX: return AFE_PORT_ID_PRIMARY_MI2S_RX; @@ -473,6 +489,10 @@ int q6audio_is_digital_pcm_interface(u16 port_id) case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: case SECONDARY_I2S_RX: case SECONDARY_I2S_TX: case MI2S_RX: @@ -571,6 +591,10 @@ int q6audio_validate_port(u16 port_id) case AFE_PORT_ID_PRIMARY_PCM_TX: case AFE_PORT_ID_SECONDARY_PCM_RX: case AFE_PORT_ID_SECONDARY_PCM_TX: + case AFE_PORT_ID_TERTIARY_PCM_RX: + case AFE_PORT_ID_TERTIARY_PCM_TX: + case AFE_PORT_ID_QUATERNARY_PCM_RX: + case AFE_PORT_ID_QUATERNARY_PCM_TX: case SECONDARY_I2S_RX: case SECONDARY_I2S_TX: case MI2S_RX: diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c index 397fb4ed3c97..d4913a46ee1c 100644 --- a/tools/perf/util/evsel.c +++ b/tools/perf/util/evsel.c @@ -2313,12 +2313,15 @@ int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target, case EPERM: case EACCES: return scnprintf(msg, size, - "You may not have permission to collect %sstats.\n" - "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n" - " -1 - Not paranoid at all\n" - " 0 - Disallow raw tracepoint access for unpriv\n" - " 1 - Disallow cpu events for unpriv\n" - " 2 - Disallow kernel profiling for unpriv", + "You may not have permission to collect %sstats.\n\n" + "Consider tweaking /proc/sys/kernel/perf_event_paranoid,\n" + "which controls use of the performance events system by\n" + "unprivileged users (without CAP_SYS_ADMIN).\n\n" + "The default value is 1:\n\n" + " -1: Allow use of (almost) all events by all users\n" + ">= 0: Disallow raw tracepoint access by users without CAP_IOC_LOCK\n" + ">= 1: Disallow CPU event access by users without CAP_SYS_ADMIN\n" + ">= 2: Disallow kernel profiling by users without CAP_SYS_ADMIN", target->system_wide ? "system-wide " : ""); case ENOENT: return scnprintf(msg, size, "The %s event is not supported.", |