diff options
| author | Mitchel Humpherys <mitchelh@codeaurora.org> | 2015-05-18 17:56:56 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 11:12:43 -0700 |
| commit | 8ccd9255d49efab7aee530417a6eb647def37abb (patch) | |
| tree | 3f941951c7a634c0a9fb5d4a1b6e84049d1e42a0 | |
| parent | 22a99e7c292b9dd06c629cbd4911eb5d49cc0c10 (diff) | |
iommu: io-pgtable-arm: set page tables as outer shareable
Coherent table walk is broken on our system. Set page tables as outer
shareable so that the SMMU doesn't try to walk them in the cache.
Change-Id: Id9dd3d10139750b0dbb77842c12efd49e2672645
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
| -rw-r--r-- | drivers/iommu/io-pgtable-arm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 89d8eeb07f9e..99d69bd501da 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -678,7 +678,7 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) return NULL; /* TCR */ - reg = (ARM_LPAE_TCR_SH_IS << ARM_LPAE_TCR_SH0_SHIFT) | + reg = (ARM_LPAE_TCR_SH_OS << ARM_LPAE_TCR_SH0_SHIFT) | (ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_IRGN0_SHIFT) | (ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_ORGN0_SHIFT); |