diff options
| author | Osvaldo Banuelos <osvaldob@codeaurora.org> | 2017-01-19 11:11:58 -0800 |
|---|---|---|
| committer | Osvaldo Banuelos <osvaldob@codeaurora.org> | 2017-01-24 17:24:38 -0800 |
| commit | 89ae37eba06c307668b853c23e2cc9acd8ae4dc5 (patch) | |
| tree | 0881ba9aa9f56e61774e244d4511f7303600ad74 | |
| parent | 1f1d94408446043289fe0126897f98af2dce0ecd (diff) | |
clk: msm: clock-osm: support MEM-ACC threshold voltage for Silver cluster
Add support for configuring the memory accelerator (MEM-ACC)
threshold voltage for the Silver cluster. This threshold
voltage is used to resolve the MEM-ACC crossover virtual corner
number required by the OSM sequence to program MEM-ACC settings
based on a voltage threshold.
CRs-Fixed: 1113780
Change-Id: Iba58a23ae0d30429da629afa9d5f9cb34e025543
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/msm/qcom,osm.txt | 10 | ||||
| -rw-r--r-- | drivers/clk/msm/clock-osm.c | 16 |
2 files changed, 23 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt b/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt index be8f27d87738..20cafc20c31d 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,osm.txt @@ -281,6 +281,16 @@ Properties: performance mode with a total of 4 tuples corresponding to each supported performance mode. +- qcom,pwrcl-apcs-mem-acc-threshold-voltage + Usage: optional + Value type: <u32> + Definition: Specifies the highest MEM ACC threshold voltage in + microvolts for the Power cluster. This voltage is + used to determine which MEM ACC setting is used for the + highest frequencies. If specified, the voltage must match + the MEM ACC threshold voltage specified for the + corresponding CPRh device. + - qcom,perfcl-apcs-mem-acc-val Usage: required if qcom,osm-no-tz is specified Value type: <prop-encoded-array> diff --git a/drivers/clk/msm/clock-osm.c b/drivers/clk/msm/clock-osm.c index 79e8a7d8eb00..1639b1b7f94b 100644 --- a/drivers/clk/msm/clock-osm.c +++ b/drivers/clk/msm/clock-osm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -83,6 +83,7 @@ enum clk_osm_trace_packet_id { #define VERSION_REG 0x0 #define OSM_TABLE_SIZE 40 +#define MAX_VIRTUAL_CORNER (OSM_TABLE_SIZE - 1) #define MAX_CLUSTER_CNT 2 #define CORE_COUNT_VAL(val) ((val & GENMASK(18, 16)) >> 16) #define SINGLE_CORE 1 @@ -1662,6 +1663,14 @@ static int clk_osm_resolve_crossover_corners(struct clk_osm *c, break; } } + + /* + * This assumes the OSM table uses corners + * 0 to MAX_VIRTUAL_CORNER - 1. + */ + if (!c->mem_acc_threshold_vc) + c->mem_acc_threshold_vc = + MAX_VIRTUAL_CORNER; } return 0; @@ -3232,9 +3241,10 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev) return rc; } - rc = clk_osm_resolve_crossover_corners(&pwrcl_clk, pdev, NULL); + rc = clk_osm_resolve_crossover_corners(&pwrcl_clk, pdev, + "qcom,pwrcl-apcs-mem-acc-threshold-voltage"); if (rc) - dev_info(&pdev->dev, "No APM crossover corner programmed\n"); + dev_info(&pdev->dev, "No MEM-ACC crossover corner programmed\n"); rc = clk_osm_resolve_crossover_corners(&perfcl_clk, pdev, "qcom,perfcl-apcs-mem-acc-threshold-voltage"); |