diff options
| author | Dhaval Patel <pdhaval@codeaurora.org> | 2015-06-15 11:34:38 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:43:16 -0700 |
| commit | 8244623d4780b943cd1dbf07b855e58867946b17 (patch) | |
| tree | 9b0ced48832a5e13e9a59bd9d89f7a84529e60f2 | |
| parent | 06dfea5c32d7e00ce57da54ccd6247741e92131e (diff) | |
Revert "msm: mdss: handle mmagic mdss axi clock for msm8996 target"
This reverts commit 832b482b621b ("msm: mdss: handle mmagic mdss
axi clock for msm8996 target"). SMMU driver adds the vote for
mmagic mdss axi clock vote which will take care of MDP and
DSI use cases. No need to put vote from individual module.
Change-Id: I858f28eb88deb34a612050d913459e62cc0955a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
[cip@codeaurora.org: Removed msm8996-mdss.dtsi changes]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss.h | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp.c | 4 |
2 files changed, 0 insertions, 5 deletions
diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h index 81c2d1f7f12c..f0ee85da196b 100644 --- a/drivers/video/fbdev/msm/mdss.h +++ b/drivers/video/fbdev/msm/mdss.h @@ -40,7 +40,6 @@ enum mdss_mdp_clk_type { MDSS_CLK_MDP_CORE, MDSS_CLK_MDP_LUT, MDSS_CLK_MDP_VSYNC, - MDSS_CLK_MMAGIC_AXI, MDSS_MAX_CLK }; diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c index 0dba8d9e2cc5..e1079b417de0 100644 --- a/drivers/video/fbdev/msm/mdss_mdp.c +++ b/drivers/video/fbdev/msm/mdss_mdp.c @@ -854,7 +854,6 @@ void mdss_mdp_clk_ctrl(int enable) mdss_mdp_clk_update(MDSS_CLK_AXI, enable); mdss_mdp_clk_update(MDSS_CLK_MDP_CORE, enable); mdss_mdp_clk_update(MDSS_CLK_MDP_LUT, enable); - mdss_mdp_clk_update(MDSS_CLK_MMAGIC_AXI, enable); if (mdata->vsync_ena) mdss_mdp_clk_update(MDSS_CLK_MDP_VSYNC, enable); @@ -994,9 +993,6 @@ static int mdss_mdp_irq_clk_setup(struct mdss_data_type *mdata) /* vsync_clk is optional for non-smart panels */ mdss_mdp_irq_clk_register(mdata, "vsync_clk", MDSS_CLK_MDP_VSYNC); - mdss_mdp_irq_clk_register(mdata, "mmagic_mdss_axi_clk", - MDSS_CLK_MMAGIC_AXI); - /* Setting the default clock rate to the max supported.*/ mdss_mdp_set_clk_rate(mdata->max_mdp_clk_rate); pr_debug("mdp clk rate=%ld\n", |