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authorAshay Jaiswal <ashayj@codeaurora.org>2016-10-28 15:00:14 +0530
committerGerrit - the friendly Code Review server <code-review@localhost>2016-11-03 05:28:52 -0700
commit81a1e629f83da726caaf4fce37527a546d2aa6ae (patch)
tree55ef58db3492bde77cccf192179e2a1db79fef4d
parent6c42ab0ecdf4d48437af477664bf993357907a30 (diff)
ARM: dts: msm: add PMFALCON/PM2FALCON devices for msmcobalt interposer
Add PMIC devices and remove reference of PMCOBALT/PMICOBALT from all client device nodes. CRs-Fixed: 1083528 Change-Id: Idc0f0de7f3196d5e456d62e871c8ccfcb576fb07 Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org> Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-interposer-pmfalcon.dtsi280
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-cdp.dts1
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-mtp.dts1
3 files changed, 282 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-interposer-pmfalcon.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-interposer-pmfalcon.dtsi
new file mode 100644
index 000000000000..454f71ba54be
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/msmcobalt-interposer-pmfalcon.dtsi
@@ -0,0 +1,280 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&clock_audio {
+ /delete-property/qcom,audio-ref-clk-gpio;
+};
+
+&slim_aud {
+ tasha_codec {
+ /delete-property/cdc-vdd-buck-supply;
+ /delete-property/cdc-buck-sido-supply;
+ /delete-property/cdc-vdd-tx-h-supply;
+ /delete-property/cdc-vdd-rx-h-supply;
+ /delete-property/cdc-vddpx-1-supply;
+ };
+
+ tavil_codec {
+ /delete-property/cdc-vdd-buck-supply;
+ /delete-property/cdc-buck-sido-supply;
+ /delete-property/cdc-vdd-tx-h-supply;
+ /delete-property/cdc-vdd-rx-h-supply;
+ /delete-property/cdc-vddpx-1-supply;
+ };
+};
+
+
+&led_flash0 {
+ /delete-property/qcom,flash-source;
+ /delete-property/qcom,torch-source;
+ /delete-property/qcom,switch-source;
+};
+
+&led_flash1 {
+ /delete-property/qcom,flash-source;
+ /delete-property/qcom,torch-source;
+ /delete-property/qcom,switch-source;
+};
+
+&eeprom0 {
+ /delete-property/cam_vio-supply;
+ /delete-property/cam_vana-supply;
+ /delete-property/cam_vdig-supply;
+ /delete-property/gpios;
+};
+
+&eeprom1 {
+ /delete-property/cam_vio-supply;
+ /delete-property/cam_vana-supply;
+ /delete-property/cam_vdig-supply;
+};
+
+&eeprom2 {
+ /delete-property/cam_vio-supply;
+ /delete-property/cam_vana-supply;
+ /delete-property/cam_vdig-supply;
+ /delete-property/gpios;
+};
+
+&cci {
+ /delete-node/qcom,camera@0;
+ /delete-node/qcom,camera@1;
+ /delete-node/qcom,camera@2;
+
+};
+
+&bluetooth {
+ /delete-property/qca,bt-vdd-io-supply;
+ /delete-property/qca,bt-vdd-xtal-supply;
+ /delete-property/qca,bt-vdd-core-supply;
+ /delete-property/qca,bt-vdd-pa-supply;
+ /delete-property/qca,bt-vdd-ldo-supply;
+ /delete-property/qca,bt-chip-pwd-supply;
+};
+
+&ufsphy1 {
+ /delete-property/vdda-phy-supply;
+ /delete-property/vdda-pll-supply;
+ /delete-property/vddp-ref-clk-supply;
+};
+
+&ufs1 {
+ /delete-property/vcc-supply;
+ /delete-property/vccq-supply;
+ /delete-property/vccq2-supply;
+};
+
+&sdhc_2 {
+ /delete-property/vdd-supply;
+ /delete-property/vdd-io-supply;
+};
+
+&i2c_5 {
+ /delete-node/synaptics@20;
+};
+
+&i2c_6 {
+ /delete-node/nq@28;
+};
+
+&i2c_7 {
+ /delete-node/qcom,smb138x@8;
+};
+
+&clock_gcc {
+ /delete-property/vdd_dig-supply;
+ /delete-property/vdd_dig_ao-supply;
+};
+
+&clock_mmss {
+ /delete-property/vdd_dig-supply;
+ /delete-property/vdd_mmsscc_mx-supply;
+};
+
+&clock_gpu {
+ /delete-property/vdd_dig-supply;
+};
+
+&clock_gfx {
+ /delete-property/vdd_mx-supply;
+ /delete-property/vdd_gpu_mx-supply;
+};
+
+&pcie0 {
+ /delete-property/vreg-1.8-supply;
+ /delete-property/vreg-0.9-supply;
+ /delete-property/vreg-cx-supply;
+};
+
+&qusb_phy0 {
+ /delete-property/vdd-supply;
+ /delete-property/vdda18-supply;
+ /delete-property/vdda33-supply;
+};
+
+&ssphy {
+ /delete-property/vdd-supply;
+ /delete-property/core-supply;
+};
+
+&usb3 {
+ /delete-property/extcon;
+};
+
+&mdss_dsi {
+ /delete-property/vdda-1p2-supply;
+ /delete-property/vdda-0p9-supply;
+};
+
+&mdss_dsi0 {
+ /delete-property/wqhd-vddio-supply;
+ /delete-property/lab-supply;
+ /delete-property/ibb-supply;
+};
+
+&mdss_dsi1 {
+ /delete-property/wqhd-vddio-supply;
+ /delete-property/lab-supply;
+ /delete-property/ibb-supply;
+};
+
+&mdss_dp_ctrl {
+ /delete-property/vdda-1p2-supply;
+ /delete-property/vdda-0p9-supply;
+ /delete-property/qcom,dp-usbpd-detection;
+};
+
+&mdss_hdmi_pll {
+ /delete-property/vdda-pll-supply;
+ /delete-property/vdda-phy-supply;
+};
+
+&apc0_cpr {
+ /* disable aging and closed-loop */
+ /delete-property/vdd-supply;
+ /delete-property/qcom,cpr-enable;
+ /delete-property/qcom,cpr-hw-closed-loop;
+ /delete-property/qcom,cpr-aging-ref-voltage;
+};
+
+&apc0_pwrcl_vreg {
+ /delete-property/qcom,cpr-aging-max-voltage-adjustment;
+ /delete-property/qcom,cpr-aging-ref-corner;
+ /delete-property/qcom,cpr-aging-ro-scaling-factor;
+ /delete-property/qcom,allow-aging-voltage-adjustment;
+ /delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
+};
+
+&apc1_cpr {
+ /* disable aging and closed-loop */
+ /delete-property/vdd-supply;
+ /delete-property/qcom,cpr-enable;
+ /delete-property/qcom,cpr-hw-closed-loop;
+ /delete-property/qcom,cpr-aging-ref-voltage;
+};
+
+&apc1_perfcl_vreg {
+ /delete-property/qcom,cpr-aging-max-voltage-adjustment;
+ /delete-property/qcom,cpr-aging-ref-corner;
+ /delete-property/qcom,cpr-aging-ro-scaling-factor;
+ /delete-property/qcom,allow-aging-voltage-adjustment;
+ /delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
+};
+
+&gfx_cpr {
+ reg = <0x05061000 0x4000>,
+ <0x00784000 0x1000>;
+ reg-names = "cpr_ctrl", "fuse_base";
+
+ /* disable aging and closed-loop */
+ /delete-property/vdd-supply;
+ /delete-property/qcom,cpr-enable;
+ /delete-property/qcom,cpr-aging-ref-voltage;
+ /delete-property/qcom,cpr-aging-allowed-reg-mask;
+ /delete-property/qcom,cpr-aging-allowed-reg-value;
+};
+
+&gfx_vreg {
+ /delete-property/qcom,cpr-aging-max-voltage-adjustment;
+ /delete-property/qcom,cpr-aging-ref-corner;
+ /delete-property/qcom,cpr-aging-ro-scaling-factor;
+ /delete-property/qcom,allow-aging-voltage-adjustment;
+ /delete-property/qcom,allow-aging-open-loop-voltage-adjustment;
+};
+
+&soc {
+ /delete-node/qcom,csid@ca30000;
+ /delete-node/qcom,csid@ca30400;
+ /delete-node/qcom,csid@ca30800;
+ /delete-node/qcom,csid@ca30c00;
+ /delete-node/gpio_keys;
+ /delete-node/qcom,lpass@17300000;
+ /delete-node/qcom,mss@4080000;
+ /delete-node/qcom,bcl;
+ /delete-node/qcom,msm-thermal;
+ /delete-node/qcom,ssc@5c00000;
+ /delete-node/qcom,spss@1d00000;
+ /delete-node/qcom,icnss@18800000;
+ /delete-node/qcom,wil6210;
+ /delete-node/qcom,rpm-smd;
+ /delete-node/qcom,spmi@800f000;
+
+ rpm_bus: qcom,rpm-smd {
+ compatible = "qcom,rpm-glink";
+ qcom,glink-edge = "rpm";
+ rpm-channel-name = "rpm_requests";
+ };
+
+ spmi_bus: qcom,spmi@800f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x800f000 0x1000>,
+ <0x8400000 0x1000000>,
+ <0x9400000 0x1000000>,
+ <0xa400000 0x220000>,
+ <0x800a000 0x3000>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupt-names = "periph_irq";
+ interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ cell-index = <0>;
+ };
+};
+
+#include "msm-pmfalcon.dtsi"
+#include "msm-pm2falcon.dtsi"
+#include "msmfalcon-regulator.dtsi"
+
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-cdp.dts b/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-cdp.dts
index 3ef9ca91934f..ac564d700cd8 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-cdp.dts
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-cdp.dts
@@ -15,6 +15,7 @@
#include "msmcobalt-v2.1-interposer-msmfalcon.dtsi"
#include "msmcobalt-interposer-msmfalcon-cdp.dtsi"
+#include "msmcobalt-interposer-pmfalcon.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM COBALT v2.1 MSM FALCON Interposer CDP";
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-mtp.dts b/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-mtp.dts
index af37b0f0da44..aaa56ea2f492 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-mtp.dts
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.1-interposer-msmfalcon-mtp.dts
@@ -15,6 +15,7 @@
#include "msmcobalt-v2.1-interposer-msmfalcon.dtsi"
#include "msmcobalt-interposer-msmfalcon-mtp.dtsi"
+#include "msmcobalt-interposer-pmfalcon.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM COBALT v2.1 MSM FALCON Interposer MTP";