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| author | Yan He <yanhe@codeaurora.org> | 2015-12-18 11:06:33 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 21:15:47 -0700 |
| commit | 804f2dca61eeb0d8e2c521ef28aca2c839c139da (patch) | |
| tree | 54a94d12ccd78092f014c6657035866a5cbdb056 | |
| parent | ec62d30ab9638255b6e3851b03af8c506cf3fc01 (diff) | |
msm: ep_pcie: enable BME IRQ
Configure PCIe debug register to enable IRQ for BME.
Change-Id: I497d86fcdbe862d770b9e7841dabd023cfe6d1f8
Signed-off-by: Yan He <yanhe@codeaurora.org>
| -rw-r--r-- | drivers/platform/msm/ep_pcie/ep_pcie_core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index d21461c9291e..f9f6a948a3ab 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -456,7 +456,7 @@ static void ep_pcie_core_init(struct ep_pcie_dev_t *dev) /* enable debug IRQ */ ep_pcie_write_mask(dev->parf + PCIE20_PARF_DEBUG_INT_EN, - 0, BIT(3) | BIT(1)); + 0, BIT(3) | BIT(2) | BIT(1)); /* Configure PCIe to endpoint mode */ ep_pcie_write_reg(dev->parf, PCIE20_PARF_DEVICE_TYPE, 0x0); |