diff options
| author | Gopikrishnaiah Anandan <agopik@codeaurora.org> | 2015-01-16 14:17:24 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:37:23 -0700 |
| commit | 7e3a174db3b4db364c674646998b2e26e9fe60c8 (patch) | |
| tree | 9d6224f5febf8451de72d55e9a7e3d6cb12eb765 | |
| parent | 816ebe30e008a1644c6ac693f29dc08d46f56142 (diff) | |
msm: mdss: Update IGC buffer length check
From thulium chipset onwards post processing driver has moved to
new framework and config payload based interface. To maintain backward
compatibility existing members of the pp structures have been left
untouched. For IGC feature driver was checking legacy fields for
thulium chipset. This change fixes the issue of incorrect field check.
Change-Id: If27d702d9fa189192ad32e2d8b081dc9e99e577d
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_pp.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c index 3f4684a6c800..cf3e14130548 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_pp.c +++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c @@ -3054,8 +3054,6 @@ int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config, (config->block >= MDP_BLOCK_MAX)) return -EINVAL; - if (config->len != IGC_LUT_ENTRIES) - return -EINVAL; if ((config->ops & MDSS_PP_SPLIT_MASK) == MDSS_PP_SPLIT_MASK) { pr_warn("Can't set both split bits\n"); @@ -3066,6 +3064,12 @@ int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config, disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0; if (config->ops & MDP_PP_OPS_READ) { + if (config->len != IGC_LUT_ENTRIES && + !pp_ops[IGC].pp_get_config) { + pr_err("invalid len for IGC table for read %d\n", + config->len); + return -EINVAL; + } ret = pp_get_dspp_num(disp_num, &dspp_num); if (ret) { pr_err("%s, no dspp connects to disp %d\n", @@ -3090,6 +3094,7 @@ int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config, pp_read_igc_lut_cached(&local_cfg); else { if (pp_ops[IGC].pp_get_config) { + config->block = dspp_num; pp_ops[IGC].pp_get_config(igc_addr, config, DSPP, disp_num); goto clock_off; @@ -3126,6 +3131,11 @@ clock_off: } else goto igc_set_dirty; } + if (config->len != IGC_LUT_ENTRIES) { + pr_err("invalid len for IGC table for write %d\n", + config->len); + return -EINVAL; + } if (copy_from_kernel) { memcpy(&mdss_pp_res->igc_lut_c0c1[disp_num][0], config->c0_c1_data, config->len * sizeof(u32)); |