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authorChinmay Sawarkar <chinmays@codeaurora.org>2016-08-10 18:19:44 -0700
committerChinmay Sawarkar <chinmays@codeaurora.org>2016-08-17 17:43:35 -0700
commit76ae186001435395bb8a4fb3319bb76c04ef49b4 (patch)
tree1554a66950a089220d466b78525ad7bde5960363
parent008f057bbab6dd6629b7e1a3b8c67b650a6b9ef1 (diff)
ARM: dts: msm: Update venus clock frequencies on msmcobalt v2
Aligns the frequencies to the FMAX values defined by clock driver for venus on msmcobalt v2 target. Also link these frequencies to appropriate load values and imem ab levels. CRs-Fixed: 1053136 Change-Id: I755d1ad62de97ded55f73148e1a56bc3afafc03b Signed-off-by: Chinmay Sawarkar <chinmays@codeaurora.org>
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
index c909c23774b5..9dea527274ae 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
@@ -368,3 +368,34 @@
0x00 0x240
0x19 0xb4>;
};
+
+&msm_vidc {
+ qcom,load-freq-tbl =
+ /* Encoders */
+ <1105920 533000000 0x55555555>, /* 4kx2304@30 */ /*TURBO*/
+ < 979200 444000000 0x55555555>, /* 1080p@120,1440p@60,
+ * UHD@30 */ /*NOMINAL*/
+ < 939700 355200000 0x55555555>, /* 4kx2304@24 */ /*SVSL1*/
+ < 489600 269330000 0x55555555>, /* 1080p@60, 2560x1440@30 */
+ /* SVS */
+ < 432000 200000000 0x55555555>, /* 720p@120, 1080p@30 */
+ /* SVS2 */
+
+ /* Decoders */
+ <2211840 533000000 0xffffffff>, /* 4kx2304@60, 1080p@240 */
+ /* TURBO */
+ <1728000 444000000 0xffffffff>, /* 2560x1440@120 */
+ /* NOMINAL */
+ <1675472 355200000 0xffffffff>, /* 4kx2304@44 */ /*SVSL1*/
+ <1105920 269330000 0xffffffff>, /* UHD/4k2304@30, 1080p@120 */
+ /* SVS */
+ < 864000 200000000 0xffffffff>; /* 720p@240, 1080p@60 */
+ /* SVS2 */
+
+ qcom,imem-ab-tbl =
+ <200000000 1752000>,
+ <269330000 1752000>,
+ <355200000 2500000>,
+ <444000000 6000000>,
+ <533000000 6000000>;
+};