diff options
| author | Ingrid Gallardo <ingridg@codeaurora.org> | 2014-08-27 12:32:41 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:34:07 -0700 |
| commit | 75f891685af10b654dc41efedaffa2c307d3b904 (patch) | |
| tree | 21770c8ce492e1bf433ef37ac5fe5475ec3281de | |
| parent | 5f96bd289b16ecbd4fd2110edf55d074e8ebc7d6 (diff) | |
msm: mdss: fix split display configuration
Split display configuration requires that lower
and upper control registers get programmed accordingly.
This change fixes a configuration bit which can cause
page faults if the timing engine gets flushed after enabled.
Change-Id: I5b5112f36ee3855a81632eab495c94d96893bdfa
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
| -rw-r--r-- | drivers/video/fbdev/msm/mdss_mdp_ctl.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/video/fbdev/msm/mdss_mdp_ctl.c b/drivers/video/fbdev/msm/mdss_mdp_ctl.c index 87d2af57673a..1cdf8e031f1f 100644 --- a/drivers/video/fbdev/msm/mdss_mdp_ctl.c +++ b/drivers/video/fbdev/msm/mdss_mdp_ctl.c @@ -2040,16 +2040,22 @@ static void mdss_mdp_ctl_split_display_enable(int enable, if (enable) { if (main_ctl->opmode & MDSS_MDP_CTL_OP_CMD_MODE) { - upper |= BIT(1); + /* interface controlling sw trigger (cmd mode) */ lower |= BIT(1); - } - /* interface controlling sw trigger (cmd & video mode)*/ - if (main_ctl->intf_num == MDSS_MDP_INTF2) { - lower |= BIT(4); - upper |= BIT(4); + if (main_ctl->intf_num == MDSS_MDP_INTF2) + lower |= BIT(4); + else + lower |= BIT(8); + upper = lower; } else { - lower |= BIT(8); - upper |= BIT(8); + /* interface controlling sw trigger (video mode) */ + if (main_ctl->intf_num == MDSS_MDP_INTF2) { + lower |= BIT(4); + upper |= BIT(8); + } else { + lower |= BIT(8); + upper |= BIT(4); + } } } writel_relaxed(upper, main_ctl->mdata->mdp_base + |
