Promotion of kernel.lnx.4.4-161026.

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1075375 1081701   Ie389e28ff890a805854f921e4cd491a296a32925   soc: qcom: Use a deferrable timer base for the msm watch
1081673   Ib75655d52e5d85d649ebfcb971caf3f5b0b6dc80   ASoC: wcd934x: Update CPR register defaults
1079363   I45847f446c91c80a5110d80b59a0ae4b8e2c40e5   smb-lib: update displaying battery overvoltage in health
1059495   Ibad70b1bb364b60439c4988e318105a733396db8   drivers: soc: Initialize return var to default value
1080799   I0c496a73feb83c640f9a135f98ec393d1096b205   USB: pd: Fix compilation issues for 32 bit support
1081725   I09b4bc37617811fd4acd86a7e4f5ef91630675df   coresight: tmc: skip tmc read if mem allocaiton failed
1022917   Ia02a1ffed911498dd6eb5df246e6da68a7802a92   ASoC: msmcobalt: Add independent clock support on codec
1081778   I9eebb4fb35aca2c8424bfb29ae9d833650dc5ad4   sched: Set curr/prev_window_cpu pointers to NULL in sche
1022917   Id5eee88e87e1e5d68ce34f43b4c85c6b48886b82   ARM: msm: dts: add second CPE session for msmcobalt
1081673   I92d0511b4e9912dfa346378784d811f6606df205   drivers: mfd: Mark CPR bank registers as volatile
1034169   I2e2b50aeb770ca523cf70e2c0768e38ee56e39eb   ASoC: wcd9335: Fix register sequence for CPE configurati
1073238   Ia537e776d0b322d56cd6003f95cdded5e695ceeb   soc: qcom: use interruptible wait_for_completion API
1080385   I346085ec722f491f96181ef1beb383710b441f4b   qpnp-fg-gen3: Fix storing nominal capacity to actual cap
1022917   I280057b17188757f586562f45f32ecf28595e045   ASoC: msmcobalt: Add CPE ECPP DAI instance for ECPP path
1081084   I44487bfcb4e21d76948cd836ad2dae18bc3d22f4   ARM: dts: msm: enable VDD_GFX CPR aging adjustments for
1081146   I63e8863efb91af891dbcbfc070dfdcd833ea3ad4   qpnp-fg-gen3: fix the error in showing battery temperatu

Change-Id: Ic0497abd3afc11946b2cc861a7a477836b713ad4
CRs-Fixed: 1081673, 1081146, 1073238, 1081778, 1080385, 1081725, 1059495, 1022917, 1075375, 1080799, 1034169, 1079363, 1081084, 1081701

15 files changed, 191 insertions, 28 deletions

diff --git a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi
index a1d80075abe0..3681f3d34b0c 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-audio.dtsi
@@ -85,14 +85,15 @@
 		asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
 				<&loopback>, <&compress>, <&hostless>,
 				<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
-				<&pcm_noirq>;
+				<&pcm_noirq>, <&cpe3>;
 		asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
 				"msm-pcm-dsp.2", "msm-voip-dsp",
 				"msm-pcm-voice", "msm-pcm-loopback",
 				"msm-compress-dsp", "msm-pcm-hostless",
 				"msm-pcm-afe", "msm-lsm-client",
 				"msm-pcm-routing", "msm-cpe-lsm",
-				"msm-compr-dsp", "msm-pcm-dsp-noirq";
+				"msm-compr-dsp", "msm-pcm-dsp-noirq",
+				"msm-cpe-lsm.3";
 		asoc-cpu = <&dai_hdmi>, <&dai_dp>,
 				<&dai_mi2s0>, <&dai_mi2s1>,
 				<&dai_mi2s2>, <&dai_mi2s3>,
@@ -244,6 +245,12 @@
 
 	cpe: qcom,msm-cpe-lsm {
 		compatible = "qcom,msm-cpe-lsm";
+		qcom,msm-cpe-lsm-id = <1>;
+	};
+
+	cpe3: qcom,msm-cpe-lsm@3 {
+		compatible = "qcom,msm-cpe-lsm";
+		qcom,msm-cpe-lsm-id = <3>;
 	};
 
 	qcom,wcd-dsp-mgr {
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
index 0134093d5053..8da491cea8dc 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-v2.dtsi
@@ -556,6 +556,7 @@
 
 &gfx_cpr {
 	compatible = "qcom,cpr4-msmcobalt-v2-mmss-regulator";
+	qcom,cpr-aging-ref-voltage = <1024000>;
 };
 
 &gfx_vreg {
@@ -624,11 +625,32 @@
 		    0    0 3487    0 3280 1896 1874    0>;
 
 	qcom,cpr-open-loop-voltage-fuse-adjustment =
-		<  100000        0        0        0>;
+		<  100000        0        0        0>,
+		<  100000        0        0        0>,
+		<   85000  (-15000) (-15000) (-15000)>,
+		<   85000  (-15000) (-15000) (-15000)>,
+		<   85000  (-15000) (-15000) (-15000)>,
+		<   85000  (-15000) (-15000) (-15000)>,
+		<   85000  (-15000) (-15000) (-15000)>,
+		<   85000  (-15000) (-15000) (-15000)>;
 
 	qcom,cpr-closed-loop-voltage-adjustment =
 		<   96000    18000     4000        0
-			0    13000     9000        0>;
+			0    13000     9000        0>,
+		<   96000    18000     4000        0
+			0    13000     9000        0>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>,
+		<   81000     3000  (-11000) (-15000)
+		  (-15000)  (-2000)  (-6000) (-15000)>;
 
 	qcom,cpr-floor-to-ceiling-max-range =
 	       <50000 50000 50000 50000 50000 50000 70000 70000>;
@@ -642,7 +664,7 @@
 	qcom,cpr-aging-max-voltage-adjustment = <15000>;
 	qcom,cpr-aging-ref-corner = <8>;
 	qcom,cpr-aging-ro-scaling-factor = <2950>;
-	qcom,allow-aging-voltage-adjustment = <0>;
+	qcom,allow-aging-voltage-adjustment = <0 0 1 1 1 1 1 1>;
 };
 
 &qusb_phy0 {
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 306465ededf9..766b052ade1d 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -1143,6 +1143,12 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata)
 		goto err;
 	}
 
+	if (drvdata->config_type == TMC_CONFIG_TYPE_ETR &&
+	    drvdata->vaddr == NULL) {
+		ret = -ENOMEM;
+		goto err;
+	}
+
 	if (!drvdata->enable)
 		goto out;
 
diff --git a/drivers/mfd/wcd934x-regmap.c b/drivers/mfd/wcd934x-regmap.c
index e07350a1e2ce..3ed3d125f430 100644
--- a/drivers/mfd/wcd934x-regmap.c
+++ b/drivers/mfd/wcd934x-regmap.c
@@ -1904,6 +1904,9 @@ static bool wcd934x_is_volatile_register(struct device *dev, unsigned int reg)
 	    (reg <= WCD934X_CDC_ANC1_FB_GAIN_CTL))
 		return true;
 
+	if ((reg >= WCD934X_CODEC_CPR_WR_DATA_0) &&
+	    (reg <= WCD934X_CODEC_CPR_RD_DATA_3))
+		return true;
 
 	/*
 	 * Need to mark volatile for registers that are writable but
diff --git a/drivers/power/qcom-charger/qpnp-fg-gen3.c b/drivers/power/qcom-charger/qpnp-fg-gen3.c
index 3d3f95c2376c..4ee94b990382 100644
--- a/drivers/power/qcom-charger/qpnp-fg-gen3.c
+++ b/drivers/power/qcom-charger/qpnp-fg-gen3.c
@@ -506,8 +506,7 @@ static int fg_get_cc_soc_sw(struct fg_chip *chip, int *val)
 #define BATT_TEMP_DENR		1
 static int fg_get_battery_temp(struct fg_chip *chip, int *val)
 {
-	int rc = 0;
-	u16 temp = 0;
+	int rc = 0, temp;
 	u8 buf[2];
 
 	rc = fg_read(chip, BATT_INFO_BATT_TEMP_LSB(chip), buf, 2);
@@ -925,10 +924,11 @@ static int fg_load_learned_cap_from_sram(struct fg_chip *chip)
 	}
 
 	chip->cl.learned_cc_uah = act_cap_mah * 1000;
-	if (chip->cl.learned_cc_uah == 0)
-		chip->cl.learned_cc_uah = chip->cl.nom_cap_uah;
 
 	if (chip->cl.learned_cc_uah != chip->cl.nom_cap_uah) {
+		if (chip->cl.learned_cc_uah == 0)
+			chip->cl.learned_cc_uah = chip->cl.nom_cap_uah;
+
 		delta_cc_uah = abs(chip->cl.learned_cc_uah -
 					chip->cl.nom_cap_uah);
 		pct_nom_cap_uah = div64_s64((int64_t)chip->cl.nom_cap_uah *
diff --git a/drivers/power/qcom-charger/smb-lib.c b/drivers/power/qcom-charger/smb-lib.c
index 5785e42e0140..de4391024970 100644
--- a/drivers/power/qcom-charger/smb-lib.c
+++ b/drivers/power/qcom-charger/smb-lib.c
@@ -1199,6 +1199,7 @@ int smblib_get_prop_batt_charge_type(struct smb_charger *chg,
 int smblib_get_prop_batt_health(struct smb_charger *chg,
 				union power_supply_propval *val)
 {
+	union power_supply_propval pval;
 	int rc;
 	u8 stat;
 
@@ -1212,9 +1213,19 @@ int smblib_get_prop_batt_health(struct smb_charger *chg,
 		   stat);
 
 	if (stat & CHARGER_ERROR_STATUS_BAT_OV_BIT) {
-		smblib_err(chg, "battery over-voltage\n");
-		val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
-		goto done;
+		rc = smblib_get_prop_batt_voltage_now(chg, &pval);
+		if (!rc) {
+			/*
+			 * If Vbatt is within 40mV above Vfloat, then don't
+			 * treat it as overvoltage.
+			 */
+			if (pval.intval >=
+				get_effective_result(chg->fv_votable) + 40000) {
+				val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
+				smblib_err(chg, "battery over-voltage\n");
+				goto done;
+			}
+		}
 	}
 
 	if (stat & BAT_TEMP_STATUS_TOO_COLD_BIT)
diff --git a/drivers/soc/qcom/qdsp6v2/apr_tal_glink.c b/drivers/soc/qcom/qdsp6v2/apr_tal_glink.c
index dfd6b448a65f..e8969a5e533b 100644
--- a/drivers/soc/qcom/qdsp6v2/apr_tal_glink.c
+++ b/drivers/soc/qcom/qdsp6v2/apr_tal_glink.c
@@ -324,6 +324,7 @@ struct apr_svc_ch_dev *apr_tal_open(uint32_t clnt, uint32_t dest, uint32_t dl,
 		pr_err("%s: glink_open failed %s\n", __func__,
 		       svc_names[dest][clnt]);
 		apr_ch->handle = NULL;
+		rc = -EINVAL;
 		goto unlock;
 	}
 
diff --git a/drivers/soc/qcom/watchdog_v2.c b/drivers/soc/qcom/watchdog_v2.c
index 8f58eaa537b1..470ecfdd9f5e 100644
--- a/drivers/soc/qcom/watchdog_v2.c
+++ b/drivers/soc/qcom/watchdog_v2.c
@@ -701,7 +701,7 @@ static void init_watchdog_data(struct msm_watchdog_data *wdog_dd)
 	wdog_dd->user_pet_complete = true;
 	wdog_dd->user_pet_enabled = false;
 	wake_up_process(wdog_dd->watchdog_task);
-	init_timer(&wdog_dd->pet_timer);
+	init_timer_deferrable(&wdog_dd->pet_timer);
 	wdog_dd->pet_timer.data = (unsigned long)wdog_dd;
 	wdog_dd->pet_timer.function = pet_task_wakeup;
 	wdog_dd->pet_timer.expires = jiffies + delay_time;
diff --git a/drivers/soc/qcom/wcd-dsp-glink.c b/drivers/soc/qcom/wcd-dsp-glink.c
index 92cdadef715d..97d922fa5724 100644
--- a/drivers/soc/qcom/wcd-dsp-glink.c
+++ b/drivers/soc/qcom/wcd-dsp-glink.c
@@ -216,9 +216,9 @@ static bool wdsp_glink_notify_rx_intent_req(void *handle, const void *priv,
 
 	mutex_lock(&ch->mutex);
 	rc = glink_queue_rx_intent(ch->handle, ch, req_size);
-	if (IS_ERR_VALUE(ret)) {
-		dev_err(wpriv->dev, "%s: Failed to queue rx intent\n",
-			__func__);
+	if (IS_ERR_VALUE(rc)) {
+		dev_err(wpriv->dev, "%s: Failed to queue rx intent, rc = %d\n",
+			__func__, rc);
 		mutex_unlock(&ch->mutex);
 		goto done;
 	}
@@ -659,10 +659,13 @@ static ssize_t wdsp_glink_read(struct file *file, char __user *buf,
 		count = WDSP_MAX_READ_SIZE;
 	}
 	/*
-	 * This is unblocked only from glink rx notification callback
-	 * or from flush API.
+	 * Complete signal has given from glink rx notification callback
+	 * or from flush API. Also use interruptible wait_for_completion API
+	 * to allow the system to go in suspend.
 	 */
-	wait_for_completion(&wpriv->rsp_complete);
+	ret = wait_for_completion_interruptible(&wpriv->rsp_complete);
+	if (ret)
+		goto done;
 
 	mutex_lock(&wpriv->rsp_mutex);
 	if (wpriv->rsp_cnt) {
diff --git a/drivers/usb/pd/policy_engine.c b/drivers/usb/pd/policy_engine.c
index a72c874f19a5..2bc70d1cf6fa 100644
--- a/drivers/usb/pd/policy_engine.c
+++ b/drivers/usb/pd/policy_engine.c
@@ -538,7 +538,7 @@ static void phy_msg_received(struct usbpd *pd, enum pd_msg_type type,
 	}
 
 	if (len < 2) {
-		usbpd_err(&pd->dev, "invalid message received, len=%ld\n", len);
+		usbpd_err(&pd->dev, "invalid message received, len=%zd\n", len);
 		return;
 	}
 
@@ -547,7 +547,7 @@ static void phy_msg_received(struct usbpd *pd, enum pd_msg_type type,
 	len -= sizeof(u16);
 
 	if (len % 4 != 0) {
-		usbpd_err(&pd->dev, "len=%ld not multiple of 4\n", len);
+		usbpd_err(&pd->dev, "len=%zd not multiple of 4\n", len);
 		return;
 	}
 
@@ -566,7 +566,7 @@ static void phy_msg_received(struct usbpd *pd, enum pd_msg_type type,
 
 	/* check header's count field to see if it matches len */
 	if (PD_MSG_HDR_COUNT(header) != (len / 4)) {
-		usbpd_err(&pd->dev, "header count (%d) mismatch, len=%ld\n",
+		usbpd_err(&pd->dev, "header count (%d) mismatch, len=%zd\n",
 				PD_MSG_HDR_COUNT(header), len);
 		return;
 	}
diff --git a/drivers/usb/pd/qpnp-pdphy.c b/drivers/usb/pd/qpnp-pdphy.c
index 5b5e6210a1bb..0b9b60c3ca45 100644
--- a/drivers/usb/pd/qpnp-pdphy.c
+++ b/drivers/usb/pd/qpnp-pdphy.c
@@ -23,6 +23,8 @@
 #include <linux/of_irq.h>
 #include <linux/debugfs.h>
 #include <linux/seq_file.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
 #include "usbpd.h"
 
 #define USB_PDPHY_MAX_DATA_OBJ_LEN	28
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 53f7b50b7541..c07d844c576e 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -2273,6 +2273,14 @@ void sched_exit(struct task_struct *p)
 	kfree(p->ravg.curr_window_cpu);
 	kfree(p->ravg.prev_window_cpu);
 
+	/*
+	 * update_task_ravg() can be called for exiting tasks. While the
+	 * function itself ensures correct behavior, the corresponding
+	 * trace event requires that these pointers be NULL.
+	 */
+	p->ravg.curr_window_cpu = NULL;
+	p->ravg.prev_window_cpu = NULL;
+
 	enqueue_task(rq, p, 0);
 	clear_ed_task(p, rq);
 	task_rq_unlock(rq, p, &flags);
diff --git a/sound/soc/codecs/wcd9335.c b/sound/soc/codecs/wcd9335.c
index b2d4e08a55cc..ed984496aec1 100644
--- a/sound/soc/codecs/wcd9335.c
+++ b/sound/soc/codecs/wcd9335.c
@@ -10265,14 +10265,14 @@ static int tasha_codec_ec_buf_mux_enable(struct snd_soc_dapm_widget *w,
 	switch (event) {
 	case SND_SOC_DAPM_POST_PMU:
 		snd_soc_write(codec, WCD9335_CPE_SS_EC_BUF_INT_PERIOD, 0x3B);
-		snd_soc_update_bits(codec, WCD9335_CPE_SS_CFG, 0x68, 0x28);
+		snd_soc_update_bits(codec, WCD9335_CPE_SS_CFG, 0x08, 0x08);
 		snd_soc_update_bits(codec, WCD9335_CDC_IF_ROUTER_TX_MUX_CFG0,
 				    0x08, 0x08);
 		break;
 	case SND_SOC_DAPM_POST_PMD:
 		snd_soc_update_bits(codec, WCD9335_CDC_IF_ROUTER_TX_MUX_CFG0,
 				    0x08, 0x00);
-		snd_soc_update_bits(codec, WCD9335_CPE_SS_CFG, 0x68, 0x40);
+		snd_soc_update_bits(codec, WCD9335_CPE_SS_CFG, 0x08, 0x00);
 		snd_soc_write(codec, WCD9335_CPE_SS_EC_BUF_INT_PERIOD, 0x00);
 		break;
 	}
diff --git a/sound/soc/codecs/wcd934x/wcd934x.c b/sound/soc/codecs/wcd934x/wcd934x.c
index a526e1afdd28..b8dcd264b5d2 100644
--- a/sound/soc/codecs/wcd934x/wcd934x.c
+++ b/sound/soc/codecs/wcd934x/wcd934x.c
@@ -260,6 +260,11 @@ static const struct intr_data wcd934x_intr_table[] = {
 	{WCD934X_IRQ_VBAT_RESTORE, false},
 };
 
+struct tavil_cpr_reg_defaults {
+	int wr_data;
+	int wr_addr;
+};
+
 struct interp_sample_rate {
 	int sample_rate;
 	int rate_val;
@@ -8035,6 +8040,25 @@ static const struct tavil_reg_mask_val tavil_codec_reg_init_1_1_val[] = {
 	{WCD934X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0xFF, 0x84},
 };
 
+static const struct tavil_cpr_reg_defaults cpr_defaults[] = {
+	{ 0x00000820, 0x00000094 },
+	{ 0x00000fC0, 0x00000048 },
+	{ 0x0000f000, 0x00000044 },
+	{ 0x0000bb80, 0xC0000178 },
+	{ 0x00000000, 0x00000160 },
+	{ 0x10854522, 0x00000060 },
+	{ 0x10854509, 0x00000064 },
+	{ 0x108544dd, 0x00000068 },
+	{ 0x108544ad, 0x0000006C },
+	{ 0x0000077E, 0x00000070 },
+	{ 0x000007da, 0x00000074 },
+	{ 0x00000000, 0x00000078 },
+	{ 0x00000000, 0x0000007C },
+	{ 0x00042029, 0x00000080 },
+	{ 0x4002002A, 0x00000090 },
+	{ 0x4002002B, 0x00000090 },
+};
+
 static const struct tavil_reg_mask_val tavil_codec_reg_init_common_val[] = {
 	{WCD934X_CDC_CLSH_K2_MSB, 0x0F, 0x00},
 	{WCD934X_CDC_CLSH_K2_LSB, 0xFF, 0x60},
@@ -8094,6 +8118,33 @@ static void tavil_update_reg_defaults(struct tavil_priv *tavil)
 				   tavil_codec_reg_defaults[i].val);
 }
 
+static void tavil_update_cpr_defaults(struct tavil_priv *tavil)
+{
+	int i;
+	struct wcd9xxx *wcd9xxx;
+
+	wcd9xxx = tavil->wcd9xxx;
+	if (!TAVIL_IS_1_1(wcd9xxx))
+		return;
+
+	__tavil_cdc_mclk_enable(tavil, true);
+
+	regmap_write(wcd9xxx->regmap, WCD934X_CODEC_CPR_SVS2_MIN_CX_VDD, 0x2C);
+	regmap_update_bits(wcd9xxx->regmap, WCD934X_CODEC_RPM_CLK_GATE,
+			   0x10, 0x00);
+
+	for (i = 0; i < ARRAY_SIZE(cpr_defaults); i++) {
+		regmap_bulk_write(wcd9xxx->regmap,
+				WCD934X_CODEC_CPR_WR_DATA_0,
+				(u8 *)&cpr_defaults[i].wr_data, 4);
+		regmap_bulk_write(wcd9xxx->regmap,
+				WCD934X_CODEC_CPR_WR_ADDR_0,
+				(u8 *)&cpr_defaults[i].wr_addr, 4);
+	}
+
+	__tavil_cdc_mclk_enable(tavil, false);
+}
+
 static void tavil_slim_interface_init_reg(struct snd_soc_codec *codec)
 {
 	int i;
@@ -9335,6 +9386,7 @@ static int tavil_probe(struct platform_device *pdev)
 	tavil_update_reg_defaults(tavil);
 	__tavil_enable_efuse_sensing(tavil);
 	___tavil_get_codec_fine_version(tavil);
+	tavil_update_cpr_defaults(tavil);
 
 	/* Register with soc framework */
 	ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tavil,
diff --git a/sound/soc/msm/msmcobalt.c b/sound/soc/msm/msmcobalt.c
index 524f737360d8..c82e0ad13db3 100644
--- a/sound/soc/msm/msmcobalt.c
+++ b/sound/soc/msm/msmcobalt.c
@@ -512,10 +512,10 @@ static struct wcd_mbhc_config wcd_mbhc_cfg = {
 };
 
 static struct snd_soc_dapm_route wcd_audio_paths[] = {
-	{"MIC BIAS1", NULL, "MCLK"},
-	{"MIC BIAS2", NULL, "MCLK"},
-	{"MIC BIAS3", NULL, "MCLK"},
-	{"MIC BIAS4", NULL, "MCLK"},
+	{"MIC BIAS1", NULL, "MCLK TX"},
+	{"MIC BIAS2", NULL, "MCLK TX"},
+	{"MIC BIAS3", NULL, "MCLK TX"},
+	{"MIC BIAS4", NULL, "MCLK TX"},
 };
 
 static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
@@ -2463,6 +2463,37 @@ static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
 	return ret;
 }
 
+static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
+					   int enable, bool dapm)
+{
+	int ret = 0;
+
+	if (!strcmp(dev_name(codec->dev), "tasha_codec"))
+		ret = tasha_cdc_mclk_tx_enable(codec, enable, dapm);
+	else {
+		dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
+			__func__);
+		ret = -EINVAL;
+	}
+	return ret;
+}
+
+static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
+				 struct snd_kcontrol *kcontrol, int event)
+{
+	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
+
+	pr_debug("%s: event = %d\n", __func__, event);
+
+	switch (event) {
+	case SND_SOC_DAPM_PRE_PMU:
+		return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
+	case SND_SOC_DAPM_POST_PMD:
+		return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
+	}
+	return 0;
+}
+
 static int msm_mclk_event(struct snd_soc_dapm_widget *w,
 				 struct snd_kcontrol *kcontrol, int event)
 {
@@ -2485,6 +2516,9 @@ static const struct snd_soc_dapm_widget msm_dapm_widgets[] = {
 			    msm_mclk_event,
 			    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 
+	SND_SOC_DAPM_SUPPLY("MCLK TX",  SND_SOC_NOPM, 0, 0,
+	msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
+
 	SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
 	SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
 	SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
@@ -4632,6 +4666,20 @@ static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
 		.codec_dai_name = "snd-soc-dummy-dai",
 		.codec_name = "snd-soc-dummy",
 	},
+	/* CPE LSM EC PP direct dai-link */
+	{
+		.name = "CPE Listen service ECPP",
+		.stream_name = "CPE Listen Audio Service ECPP",
+		.cpu_dai_name = "CPE_LSM_NOHOST",
+		.platform_name = "msm-cpe-lsm.3",
+		.trigger = {SND_SOC_DPCM_TRIGGER_POST,
+			    SND_SOC_DPCM_TRIGGER_POST},
+		.no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+		.ignore_suspend = 1,
+		.ignore_pmdown_time = 1,
+		.codec_dai_name = "tasha_cpe",
+		.codec_name = "tasha_codec",
+	},
 };
 
 static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {