diff options
| author | Kalyan Thota <kalyant@codeaurora.org> | 2017-01-24 16:14:45 +0530 |
|---|---|---|
| committer | Kalyan Thota <kalyant@codeaurora.org> | 2017-02-02 10:40:50 +0530 |
| commit | 741fc8ee90d3c1da6fd8b92c5d3e8857d145b4a2 (patch) | |
| tree | 2cec5cacb5c7d944201d78e57fe047deb6c2b872 | |
| parent | af883d4db0b398542bb561808a11019f0998d129 (diff) | |
ARM: dts: msm: remove rotator smmu nodes from sdm660
Remove rotator smmu nodes for sdm660 target as
rotator will share the same SID with MDP.
Change-Id: Ia875ae125605d7ba7f446963c3325750169f871d
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/sdm660-mdss.dtsi | 32 |
1 files changed, 1 insertions, 31 deletions
diff --git a/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi b/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi index 5257e79816a3..7abf0642bb13 100644 --- a/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/sdm660-mdss.dtsi @@ -517,7 +517,7 @@ "rot_vbif_phys"; qcom,mdss-rot-mode = <1>; - qcom,mdss-highest-bank-bit = <0x2>; + qcom,mdss-highest-bank-bit = <0x1>; /* Bus Scale Settings */ qcom,msm-bus,name = "mdss_rotator"; @@ -548,36 +548,6 @@ qcom,mdss-default-ot-rd-limit = <32>; qcom,mdss-default-ot-wr-limit = <40>; - - smmu_rot_unsec: qcom,smmu_rot_unsec_cb { - compatible = "qcom,smmu_sde_rot_unsec"; - iommus = <&mmss_bimc_smmu 0xe00>; - gdsc-mdss-supply = <&gdsc_bimc_smmu>; - - clocks = <&clock_rpmcc MMSSNOC_AXI_CLK>, - <&clock_mmss MMSS_MNOC_AHB_CLK>, - <&clock_mmss MMSS_BIMC_SMMU_AHB_CLK>, - <&clock_mmss MMSS_BIMC_SMMU_AXI_CLK>; - clock-names = "mmss_noc_axi_clk", - "mmss_noc_ahb_clk", - "mmss_smmu_ahb_clk", - "mmss_smmu_axi_clk"; - }; - - smmu_rot_sec: qcom,smmu_rot_sec_cb { - compatible = "qcom,smmu_sde_rot_sec"; - iommus = <&mmss_bimc_smmu 0xe01>; - gdsc-mdss-supply = <&gdsc_bimc_smmu>; - - clocks = <&clock_rpmcc MMSSNOC_AXI_CLK>, - <&clock_mmss MMSS_MNOC_AHB_CLK>, - <&clock_mmss MMSS_BIMC_SMMU_AHB_CLK>, - <&clock_mmss MMSS_BIMC_SMMU_AXI_CLK>; - clock-names = "mmss_noc_axi_clk", - "mmss_noc_ahb_clk", - "mmss_smmu_ahb_clk", - "mmss_smmu_axi_clk"; - }; }; }; |