diff options
| author | Houston Hoffman <hhoffman@codeaurora.org> | 2017-01-05 18:51:19 -0800 |
|---|---|---|
| committer | qcabuildsw <qcabuildsw@localhost> | 2017-01-23 14:22:46 -0800 |
| commit | 733466e325a1beacebeb08aced187b6e113edb94 (patch) | |
| tree | 677aa21ed274743638175bc195b7407b7c0d7de7 | |
| parent | c16be579da3bed1df063323b9179772ec4eb0cd3 (diff) | |
qcacmn: Don't flush irq_enable register write
The Common subsystem shutdown is allowed after the irq_enable
register is written. A race condition in host (multiple other
interrupts firing on the same core). Can delay the register read
and allow the common sub system to be shutdown before the read.
The read would then cause an SNOC error as the register is unclocked.
Change-Id: Icb90c185eabcbd63b28b02bdf5c1de2d06d3620e
CRs-Fixed: 1108494
| -rw-r--r-- | hif/src/snoc/hif_io32_snoc.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/hif/src/snoc/hif_io32_snoc.h b/hif/src/snoc/hif_io32_snoc.h index 1fe76f13042b..417e01eb2176 100644 --- a/hif/src/snoc/hif_io32_snoc.h +++ b/hif/src/snoc/hif_io32_snoc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2017 The Linux Foundation. All rights reserved. * * Previously licensed under the ISC license by Qualcomm Atheros, Inc. * @@ -47,7 +47,6 @@ static inline void ce_enable_irq_in_individual_register(struct hif_softc *scn, uint32_t offset; offset = HOST_IE_ADDRESS + CE_BASE_ADDRESS(ce_id); hif_write32_mb(scn->mem + offset, 1); - hif_read32_mb(scn->mem + offset); } static inline void ce_disable_irq_in_individual_register(struct hif_softc *scn, |