diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-05-06 14:43:50 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-05-24 11:56:30 -0700 |
| commit | 72ef1744e95f465722eef280a034922f2e3269c9 (patch) | |
| tree | a8e02dce7730b773b9041e6a9716ba27c0f83486 | |
| parent | 9a491407c3df7cef7275b64bc1212dda23e61d5d (diff) | |
clk: msm: clock: Support peripheral clocks on MSMCOBALT v2
Add support for controlling the peripheral clocks on
MSMCOBALT v2.
CRs-Fixed: 1015446
Change-Id: If69f3752c4295f4cc49cf41854edc03aa90dbbc5
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/msm/clock-controller.txt | 1 | ||||
| -rw-r--r-- | drivers/clk/msm/clock-gcc-cobalt.c | 17 |
2 files changed, 16 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/clock-controller.txt b/Documentation/devicetree/bindings/arm/msm/clock-controller.txt index 7e421d3153db..c6fcf937ec3f 100644 --- a/Documentation/devicetree/bindings/arm/msm/clock-controller.txt +++ b/Documentation/devicetree/bindings/arm/msm/clock-controller.txt @@ -64,6 +64,7 @@ Required properties: "qcom,gcc-mdm9607" "qcom,cc-debug-mdm9607" "qcom,gcc-cobalt" + "qcom,gcc-cobalt-v2" "qcom,gcc-hamster" "qcom,cc-debug-cobalt" "qcom,gpucc-cobalt" diff --git a/drivers/clk/msm/clock-gcc-cobalt.c b/drivers/clk/msm/clock-gcc-cobalt.c index e9af651e9deb..1718114c38a8 100644 --- a/drivers/clk/msm/clock-gcc-cobalt.c +++ b/drivers/clk/msm/clock-gcc-cobalt.c @@ -307,8 +307,8 @@ static struct clk_freq_tbl ftbl_blsp_qup_spi_apps_clk_src[] = { F( 960000, cxo_clk_src, 10, 1, 2), F( 4800000, cxo_clk_src, 4, 0, 0), F( 9600000, cxo_clk_src, 2, 0, 0), - F( 19200000, cxo_clk_src, 1, 0, 0), F( 15000000, gpll0_out_main, 10, 1, 4), + F( 19200000, cxo_clk_src, 1, 0, 0), F( 25000000, gpll0_out_main, 12, 1, 2), F( 50000000, gpll0_out_main, 12, 0, 0), F_END @@ -2722,12 +2722,19 @@ static void msm_gcc_cobalt_v1_fixup(void) gcc_qspi_ahb_clk.c.ops = &clk_ops_dummy; } +static void msm_gcc_cobalt_v2_fixup(void) +{ + qspi_ref_clk_src.c.ops = &clk_ops_dummy; + gcc_qspi_ref_clk.c.ops = &clk_ops_dummy; + gcc_qspi_ahb_clk.c.ops = &clk_ops_dummy; +} + static int msm_gcc_cobalt_probe(struct platform_device *pdev) { struct resource *res; u32 regval; int ret; - bool is_v1 = 0; + bool is_v1 = 0, is_v2 = 0; ret = vote_bimc(&bimc_clk, INT_MAX); if (ret < 0) @@ -2780,6 +2787,11 @@ static int msm_gcc_cobalt_probe(struct platform_device *pdev) if (is_v1) msm_gcc_cobalt_v1_fixup(); + is_v2 = of_device_is_compatible(pdev->dev.of_node, + "qcom,gcc-cobalt-v2"); + if (is_v2) + msm_gcc_cobalt_v2_fixup(); + ret = of_msm_clock_register(pdev->dev.of_node, msm_clocks_gcc_cobalt, ARRAY_SIZE(msm_clocks_gcc_cobalt)); if (ret) @@ -2808,6 +2820,7 @@ static int msm_gcc_cobalt_probe(struct platform_device *pdev) static struct of_device_id msm_clock_gcc_match_table[] = { { .compatible = "qcom,gcc-cobalt" }, + { .compatible = "qcom,gcc-cobalt-v2" }, { .compatible = "qcom,gcc-hamster" }, {} }; |