diff options
| author | Hardik Kantilal Patel <hkpatel@codeaurora.org> | 2016-10-06 16:05:18 +0530 |
|---|---|---|
| committer | Hardik Kantilal Patel <hkpatel@codeaurora.org> | 2016-10-07 16:13:15 +0530 |
| commit | 6fc3c57c8e9479d176c16e7b325c94cad887e64d (patch) | |
| tree | f76f55482c212f6f4a33900a3351e154283eed8f | |
| parent | 54391382b360f0bdd60fea57296e6c39e1d981d1 (diff) | |
ARM: dts: msm: Add icnss node for msmtriton
Add Adrestea base memory address and Copy Engine interrupt
mapping entry.
CRs-fixed: 1075000
Change-Id: I4eab7df3f64f0727afd7202c03ab0343f23ef84d
Signed-off-by: Hardik Kantilal Patel <hkpatel@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmtriton.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmtriton.dtsi b/arch/arm/boot/dts/qcom/msmtriton.dtsi index 3f0d4cc48696..0cc246d48db6 100644 --- a/arch/arm/boot/dts/qcom/msmtriton.dtsi +++ b/arch/arm/boot/dts/qcom/msmtriton.dtsi @@ -490,4 +490,25 @@ qcom,xprt-version = <1>; qcom,fragmented-data; }; + + qcom,icnss@18800000 { + status = "disabled"; + compatible = "qcom,icnss"; + reg = <0x18800000 0x800000>, + <0x10ac000 0x20>; + reg-names = "membase", "mpm_config"; + interrupts = <0 413 0>, /* CE0 */ + <0 414 0>, /* CE1 */ + <0 415 0>, /* CE2 */ + <0 416 0>, /* CE3 */ + <0 417 0>, /* CE4 */ + <0 418 0>, /* CE5 */ + <0 420 0>, /* CE6 */ + <0 421 0>, /* CE7 */ + <0 422 0>, /* CE8 */ + <0 423 0>, /* CE9 */ + <0 424 0>, /* CE10 */ + <0 425 0>; /* CE11 */ + qcom,wlan-msa-memory = <0x100000>; + }; }; |