diff options
| author | Devesh Jhunjhunwala <deveshj@codeaurora.org> | 2016-01-21 18:15:51 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 10:55:18 -0700 |
| commit | 6b0181c5edfb46f8913e61db79d33ff099cb1ea8 (patch) | |
| tree | 91d9e8d5d16ed688e7a08a53442ed3ad9943f4e5 | |
| parent | a4234c60dbf0fd5d8c53befbdffcedaa30d4ec13 (diff) | |
ARM: dts: msm: Enable the MSM GCC clock driver for MSM8996
Enable the GCC clock driver in the MSM8996 device tree and
update the uartblsp2dm1 serial node to use the correct clocks.
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index d55b68c687a5..8476a3df593e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -316,14 +316,13 @@ qcom,pipe-attr-ee; }; - uartblsp2dm1: serial@75b0000 { + uartblsp2dm1: serial@075b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, - <&clock_gcc clk_gcc_blsp1_ahb_clk>; - clock-names = "core_clk", "iface_clk"; - status = "okay"; + clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>, + <&clock_gcc clk_gcc_blsp2_ahb_clk>; + clock-names = "core", "iface"; }; uartblsp1dm1: serial@07570000 { @@ -767,7 +766,6 @@ reg-names = "cc_base"; vdd_dig-supply = <&pm8994_s1_corner>; #clock-cells = <1>; - status="disabled"; }; clock_mmss: qcom,mmsscc@8c0000 { |