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| author | Srinivas Ramana <sramana@codeaurora.org> | 2016-11-30 14:06:39 +0530 |
|---|---|---|
| committer | Srinivas Ramana <sramana@codeaurora.org> | 2016-12-02 14:13:20 +0530 |
| commit | 62520da5048759d56447c97720c6dcf00822c053 (patch) | |
| tree | 649a9531575e0a88ae503451d832412bff533c98 | |
| parent | f0ba75cf1f00993f02607aedcbdb3a0e9b9242c8 (diff) | |
ARM: dts: msm: Add ERP device definition on msmtriton
Add a device definition for the CPU Error Reporting
hardware on msmtriton, to allow hardware errors to be
reported to software.
Change-Id: I36561c446ade0ee36dfb266c6033ae7734af4df9
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msmtriton.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msmtriton.dtsi b/arch/arm/boot/dts/qcom/msmtriton.dtsi index 0eefb550d187..c82a84ae8c89 100644 --- a/arch/arm/boot/dts/qcom/msmtriton.dtsi +++ b/arch/arm/boot/dts/qcom/msmtriton.dtsi @@ -527,6 +527,21 @@ }; }; + arm64-cpu-erp { + compatible = "arm,arm64-cpu-erp"; + interrupts = <0 43 4>, + <0 44 4>, + <0 41 4>, + <0 42 4>; + + interrupt-names = "pri-dbe-irq", + "sec-dbe-irq", + "pri-ext-irq", + "sec-ext-irq"; + + poll-delay-ms = <5000>; + }; + clock_rpmcc: qcom,rpmcc { compatible = "qcom,rpmcc-msmfalcon", "qcom,rpmcc"; #clock-cells = <1>; |