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authorLinux Build Service Account <lnxbuild@localhost>2017-01-18 05:31:24 -0800
committerGerrit - the friendly Code Review server <code-review@localhost>2017-01-18 05:31:23 -0800
commit585e9f44577a5bb410e52dc8216c441e7e87ac3c (patch)
treea449429f6b1c54573eb07fabb66ab3e8edd68812
parente0e78795488be7ecb4d306e51450f616b62df544 (diff)
parent3f5e9fb490437100147e40574f1f8553967f008c (diff)
Merge "clk: qcom: Add support for multiple PLL software instances"
-rw-r--r--drivers/clk/qcom/clk-alpha-pll.c17
-rw-r--r--drivers/clk/qcom/clk-alpha-pll.h13
2 files changed, 26 insertions, 4 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index f685e7fe3a4d..375f1420f3bb 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -301,7 +301,12 @@ static int clk_alpha_pll_enable(struct clk_hw *hw)
ret = clk_enable_regmap(hw);
if (ret)
return ret;
- return wait_for_pll_enable(pll, PLL_ACTIVE_FLAG);
+ ret = wait_for_pll_enable(pll, PLL_ACTIVE_FLAG);
+ if (ret == 0) {
+ if (pll->flags & SUPPORTS_FSM_VOTE)
+ *pll->soft_vote |= (pll->soft_vote_mask);
+ return ret;
+ }
}
/* Skip if already enabled */
@@ -351,7 +356,13 @@ static void clk_alpha_pll_disable(struct clk_hw *hw)
/* If in FSM mode, just unvote it */
if (val & PLL_VOTE_FSM_ENA) {
- clk_disable_regmap(hw);
+ if (pll->flags & SUPPORTS_FSM_VOTE) {
+ *pll->soft_vote &= ~(pll->soft_vote_mask);
+ if (!*pll->soft_vote)
+ clk_disable_regmap(hw);
+ } else
+ clk_disable_regmap(hw);
+
return;
}
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index dd92bc340f8a..9644ee46f097 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -32,6 +32,8 @@ struct pll_vco {
/**
* struct clk_alpha_pll - phase locked loop (PLL)
* @offset: base address of registers
+ * @soft_vote: soft voting variable for multiple PLL software instances
+ * @soft_vote_mask: soft voting mask for multiple PLL software instances
* @vco_table: array of VCO settings
* @vco_data: array of VCO data settings like post div
* @clkr: regmap clock handle
@@ -40,6 +42,13 @@ struct clk_alpha_pll {
u32 offset;
struct pll_config *config;
+ u32 *soft_vote;
+ u32 soft_vote_mask;
+/* Soft voting values */
+#define PLL_SOFT_VOTE_PRIMARY BIT(0)
+#define PLL_SOFT_VOTE_CPU BIT(1)
+#define PLL_SOFT_VOTE_AUX BIT(2)
+
const struct pll_vco *vco_table;
size_t num_vco;
@@ -54,6 +63,8 @@ struct clk_alpha_pll {
*/
#define SUPPORTS_DYNAMIC_UPDATE BIT(1)
#define SUPPORTS_SLEW BIT(2)
+ /* associated with soft_vote for multiple PLL software instances */
+#define SUPPORTS_FSM_VOTE BIT(3)
struct clk_regmap clkr;
#define PLLOUT_MAIN BIT(0)