msm: mdss: Support split mode configuration

For destination split panels driver should allow the client to enable
the post processing features for entire screen or one of the slpit
sides. Change adds support in post processing driver to allow the
clients to configure feature in split mode panels.

Change-Id: I2c84aa488205aaa17b5abd3bc26b975361967bba
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>

3 files changed, 24 insertions, 14 deletions

diff --git a/drivers/video/fbdev/msm/mdss_mdp.h b/drivers/video/fbdev/msm/mdss_mdp.h
index ea1d3c8f5095..1a5bc6fde89b 100644
--- a/drivers/video/fbdev/msm/mdss_mdp.h
+++ b/drivers/video/fbdev/msm/mdss_mdp.h
@@ -462,6 +462,7 @@ struct pp_sts_type {
 	u32 gamut_sts;
 	u32 pgc_sts;
 	u32 sharp_sts;
+	u32 side_sts;
 };
 
 struct mdss_pipe_pp_res {
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp.c b/drivers/video/fbdev/msm/mdss_mdp_pp.c
index 20031a83bbfa..08f7e4d7ccc1 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_pp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_pp.c
@@ -1671,6 +1671,7 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
 	struct mdss_mdp_ctl *ctl;
 	u32 mixer_cnt;
 	u32 mixer_id[MDSS_MDP_INTF_MAX_LAYERMIXER];
+	int side;
 
 	if (!mixer || !mixer->ctl || !mixer->ctl->mdata)
 		return -EINVAL;
@@ -1685,6 +1686,12 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
 	if (IS_ERR(base))
 		return -EINVAL;
 
+	side = pp_num_to_side(ctl, dspp_num);
+	if (side < 0) {
+		pr_err("invalid side information for dspp_num %d", dspp_num);
+		return -EINVAL;
+	}
+
 	mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON);
 
 	ret = pp_hist_setup(&opmode, MDSS_PP_DSPP_CFG | dspp_num, mixer);
@@ -1711,6 +1718,7 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
 		goto dspp_exit;
 
 	pp_sts = &mdss_pp_res->pp_disp_sts[disp_num];
+	pp_sts->side_sts = side;
 
 	if (flags & PP_FLAGS_DIRTY_PA) {
 		if (!pp_ops[PA].pp_set_config) {
@@ -1733,7 +1741,6 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer)
 					DSPP);
 		}
 	}
-
 	if (flags & PP_FLAGS_DIRTY_PCC) {
 		if (!pp_ops[PCC].pp_set_config)
 			pp_pcc_config(flags, base + MDSS_MDP_REG_DSPP_PCC_BASE,
diff --git a/drivers/video/fbdev/msm/mdss_mdp_pp_v1_7.c b/drivers/video/fbdev/msm/mdss_mdp_pp_v1_7.c
index 1836240bf57c..6ddc7ddebf9e 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_pp_v1_7.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_pp_v1_7.c
@@ -894,20 +894,23 @@ static int pp_gamut_set_config(char __iomem *base_addr,
 bail_out:
 	if (!ret) {
 		val = 0;
+		pp_sts_set_split_bits(&pp_sts->gamut_sts,
+				gamut_cfg_data->flags);
 		if (gamut_cfg_data->flags & MDP_PP_OPS_DISABLE) {
 			pp_sts->gamut_sts &= ~PP_STS_ENABLE;
 			writel_relaxed(val, base_addr + GAMUT_OP_MODE_OFF);
 		} else if (gamut_cfg_data->flags & MDP_PP_OPS_ENABLE) {
-			if (gamut_data->mode == mdp_gamut_coarse_mode)
-				val |= GAMUT_COARSE_EN;
-			if (gamut_data->map_en)
-				val |= GAMUT_MAP_EN;
-			val |= GAMUT_ENABLE;
-			writel_relaxed(val, base_addr + GAMUT_OP_MODE_OFF);
 			pp_sts->gamut_sts |= PP_STS_ENABLE;
+			if (pp_sts_is_enabled(pp_sts->gamut_sts,
+					      pp_sts->side_sts)) {
+				if (gamut_data->mode == mdp_gamut_coarse_mode)
+					val |= GAMUT_COARSE_EN;
+				if (gamut_data->map_en)
+					val |= GAMUT_MAP_EN;
+				val |= GAMUT_ENABLE;
+			}
+			writel_relaxed(val, base_addr + GAMUT_OP_MODE_OFF);
 		}
-		pp_sts_set_split_bits(&pp_sts->gamut_sts,
-				      gamut_cfg_data->flags);
 	}
 	return ret;
 }
@@ -985,15 +988,16 @@ static int pp_pcc_set_config(char __iomem *base_addr,
 	writel_relaxed(pcc_data->b.rgb & PCC_COEFF_MASK, addr + 8);
 
 bail_out:
+	pp_sts_set_split_bits(&pp_sts->pcc_sts, pcc_cfg_data->ops);
 	if (pcc_cfg_data->ops & MDP_PP_OPS_DISABLE) {
 		writel_relaxed(opmode, base_addr + PCC_OP_MODE_OFF);
 		pp_sts->pcc_sts &= ~PP_STS_ENABLE;
 	} else if (pcc_cfg_data->ops & MDP_PP_OPS_ENABLE) {
-		opmode |= PCC_ENABLE;
-		writel_relaxed(opmode, base_addr + PCC_OP_MODE_OFF);
 		pp_sts->pcc_sts |= PP_STS_ENABLE;
+		if (pp_sts_is_enabled(pp_sts->pcc_sts, pp_sts->side_sts))
+			opmode |= PCC_ENABLE;
+		writel_relaxed(opmode, base_addr + PCC_OP_MODE_OFF);
 	}
-	pp_sts_set_split_bits(&pp_sts->pcc_sts, pcc_cfg_data->ops);
 
 	return 0;
 }
@@ -1253,8 +1257,6 @@ static void pp_pa_set_sts(struct pp_sts_type *pp_sts,
 	/* Disable takes priority over all flags */
 	if (enable_flag & MDP_PP_OPS_DISABLE) {
 		pp_sts->pa_sts &= ~PP_STS_ENABLE;
-		if (block_type == DSPP)
-			pp_sts_set_split_bits(&pp_sts->pa_sts, enable_flag);
 		return;
 	}