diff options
| author | Odelu Kukatla <okukatla@codeaurora.org> | 2016-10-19 16:43:53 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-03-30 22:59:21 -0700 |
| commit | 52f2626ac9b7787cf41caedbf57127774044833e (patch) | |
| tree | 7cfe76c9207225c748d450dec99502a7dca4b1ce | |
| parent | a674e321fb7ec4c5be90ef45708ff61ce8aa41b7 (diff) | |
ARM: dts: msm: Add support for speed bin 2 for MSM8996Pro
Add speed-bin 2 to support the fmax of 1.9GHz and 1.59GHz
for perf and power clusters respectively.
Also add speed-bin 2 to support the fmax of 510MHz for GPU clock.
Change-Id: I085d816474fff3a6d76db1fdb969b6a762867df7
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom/msm8996pro.dtsi | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/msm8996pro.dtsi b/arch/arm/boot/dts/qcom/msm8996pro.dtsi index a88fd74e3822..a3782ceef807 100644 --- a/arch/arm/boot/dts/qcom/msm8996pro.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996pro.dtsi @@ -680,6 +680,26 @@ < 1516800000 17 >, < 1593600000 18 >, < 1996800000 20 >; + qcom,pwrcl-speedbin2-v0 = + < 0 0 >, + < 307200000 1 >, + < 384000000 2 >, + < 460800000 3 >, + < 537600000 4 >, + < 614400000 5 >, + < 691200000 6 >, + < 768000000 7 >, + < 844800000 8 >, + < 902400000 9 >, + < 979200000 10 >, + < 1056000000 11 >, + < 1132800000 12 >, + < 1209600000 13 >, + < 1286400000 14 >, + < 1363200000 15 >, + < 1440000000 16 >, + < 1516800000 17 >, + < 1593600000 18 >; qcom,perfcl-speedbin0-v0 = < 0 0 >, < 307200000 1 >, @@ -736,6 +756,30 @@ < 1977600000 23 >, < 2054400000 24 >, < 2150400000 25 >; + qcom,perfcl-speedbin2-v0 = + < 0 0 >, + < 307200000 1 >, + < 384000000 2 >, + < 460800000 3 >, + < 537600000 4 >, + < 614400000 5 >, + < 691200000 6 >, + < 748800000 7 >, + < 825600000 8 >, + < 902400000 9 >, + < 979200000 10 >, + < 1056000000 11 >, + < 1132800000 12 >, + < 1209600000 13 >, + < 1286400000 14 >, + < 1363200000 15 >, + < 1440000000 16 >, + < 1516800000 17 >, + < 1593600000 18 >, + < 1670400000 19 >, + < 1747200000 20 >, + < 1824000000 21 >, + < 1900800000 22 >; qcom,cbf-speedbin0-v0 = < 0 0 >, < 192000000 1 >, @@ -778,6 +822,27 @@ < 1440000000 17 >, < 1516800000 18 >, < 1593600000 19 >; + qcom,cbf-speedbin2-v0 = + < 0 0 >, + < 192000000 1 >, + < 307200000 2 >, + < 384000000 3 >, + < 441600000 4 >, + < 537600000 5 >, + < 614400000 6 >, + < 691200000 7 >, + < 768000000 8 >, + < 844800000 9 >, + < 902400000 10 >, + < 979200000 11 >, + < 1056000000 12 >, + < 1132800000 13 >, + < 1190400000 14 >, + < 1286400000 15 >, + < 1363200000 16 >, + < 1440000000 17 >, + < 1516800000 18 >, + < 1593600000 19 >; }; &clock_mmss { @@ -828,6 +893,20 @@ < 510000000 5 >, < 560000000 7 >, < 624000000 7 >; + qcom,gfxfreq-speedbin2 = + < 0 0 0 >, + < 133000000 2 4 >, + < 214000000 3 4 >, + < 315000000 4 4 >, + < 401800000 5 5 >, + < 510000000 6 5 >; + qcom,gfxfreq-mx-speedbin2 = + < 0 0 >, + < 133000000 4 >, + < 214000000 4 >, + < 315000000 4 >, + < 401800000 5 >, + < 510000000 5 >; }; &msm_cpufreq { |