diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-03-11 11:59:17 -0800 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-25 16:03:41 -0700 |
| commit | 51541ccdcce08bd79673594734e6259a3fa6ca3d (patch) | |
| tree | e857c66b7c7630770f882d2d2977a1f99e2a22eb | |
| parent | cc6097238cd99aabaa2e2531338074e876653809 (diff) | |
clk: msm: clock: Remove support for the gcc_mmss_qm_ahb_clk clock
The gcc_mmss_qm_ahb_ahb_clk is controlled by XBL on MSMCOBALT.
There is no need to control it separately from the linux clock
driver. Remove support for it.
CRs-Fixed: 988972
Change-Id: I23b4114096758342403e07058ef4df9b18f6622c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
| -rw-r--r-- | drivers/clk/msm/clock-gcc-cobalt.c | 12 | ||||
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-cobalt.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-hwio-cobalt.h | 2 |
3 files changed, 0 insertions, 16 deletions
diff --git a/drivers/clk/msm/clock-gcc-cobalt.c b/drivers/clk/msm/clock-gcc-cobalt.c index 24e7c048d1e7..70198d93787f 100644 --- a/drivers/clk/msm/clock-gcc-cobalt.c +++ b/drivers/clk/msm/clock-gcc-cobalt.c @@ -1777,17 +1777,6 @@ static struct branch_clk gcc_mmss_noc_cfg_ahb_clk = { }, }; -static struct branch_clk gcc_mmss_qm_ahb_clk = { - .cbcr_reg = GCC_MMSS_QM_AHB_CBCR, - .has_sibling = 1, - .base = &virt_base, - .c = { - .dbg_name = "gcc_mmss_qm_ahb_clk", - .ops = &clk_ops_branch, - CLK_INIT(gcc_mmss_qm_ahb_clk.c), - }, -}; - static struct branch_clk gcc_mmss_sys_noc_axi_clk = { .cbcr_reg = GCC_MMSS_SYS_NOC_AXI_CBCR, .has_sibling = 1, @@ -2612,7 +2601,6 @@ static struct clk_lookup msm_clocks_gcc_cobalt[] = { CLK_LIST(gcc_hmss_dvm_bus_clk), CLK_LIST(gcc_hmss_rbcpr_clk), CLK_LIST(gcc_mmss_noc_cfg_ahb_clk), - CLK_LIST(gcc_mmss_qm_ahb_clk), CLK_LIST(gcc_mmss_sys_noc_axi_clk), CLK_LIST(gcc_pcie_0_aux_clk), CLK_LIST(gcc_pcie_0_cfg_ahb_clk), diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h index 220e2d1f6e68..48d41bc9ef30 100644 --- a/include/dt-bindings/clock/msm-clocks-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-cobalt.h @@ -208,8 +208,6 @@ #define clk_gcc_hmss_rbcpr_clk 0x699183be #define clk_hmss_gpll0_clk_src 0x17eb05d0 #define clk_hmss_gpll4_clk_src 0x20456cae -#define clk_gcc_mmss_qm_ahb_clk 0xc759178c -#define clk_gcc_mmss_qm_core_clk 0xa3412619 #define clk_gcc_mmss_sys_noc_axi_clk 0x4467b15b #define clk_gcc_mss_at_clk 0x1692c5aa #define clk_nav_gcc_dbg_clk 0x2221c544 diff --git a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h index 9ace94d09dee..d2dbf5ffa44c 100644 --- a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h @@ -175,8 +175,6 @@ #define GCC_HMSS_RBCPR_CBCR 0x48008 #define GCC_MMSS_SYS_NOC_AXI_CBCR 0x09000 #define GCC_MMSS_NOC_CFG_AHB_CBCR 0x09004 -#define GCC_MMSS_QM_AHB_CBCR 0x09030 -#define GCC_MMSS_QM_CORE_CBCR 0x0900C #define GCC_PCIE_0_SLV_AXI_CBCR 0x6B008 #define GCC_PCIE_0_MSTR_AXI_CBCR 0x6B00C #define GCC_PCIE_0_CFG_AHB_CBCR 0x6B010 |