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authorGeorge Shen <sqiao@codeaurora.org>2016-08-25 10:48:48 -0700
committerGeorge Shen <sqiao@codeaurora.org>2016-08-25 11:58:29 -0700
commit4b478ca85157144f3bfa66ff80a68c263f5d51c7 (patch)
treeb8ce78068ba5063a42ddde26dca69f9432f691c9
parentbac30ab032e46a5c4fe3604865d657fe3992f776 (diff)
msm: kgsl: remove un-used GPU power states
DEEP-NAP and SLEEP states are not used in targets of previous two generations. They are neither saving GPU power, nor saving system power. Remove to reduce maintenance overhead. CRs-Fixed: 1053516 Change-Id: If2fc2701548f90bb7ea9559a87752e13a7b0f736 Signed-off-by: George Shen <sqiao@codeaurora.org>
-rw-r--r--Documentation/devicetree/bindings/gpu/adreno.txt3
-rw-r--r--arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi6
-rw-r--r--drivers/gpu/msm/adreno.c3
-rw-r--r--drivers/gpu/msm/kgsl_device.h2
-rw-r--r--drivers/gpu/msm/kgsl_pwrctrl.c158
-rw-r--r--drivers/gpu/msm/kgsl_pwrctrl.h7
6 files changed, 8 insertions, 171 deletions
diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt
index 4733251ecacd..fffb8cc39d0f 100644
--- a/Documentation/devicetree/bindings/gpu/adreno.txt
+++ b/Documentation/devicetree/bindings/gpu/adreno.txt
@@ -89,13 +89,10 @@ Optional Properties:
- qcom,gpubw-dev: a phandle to a device representing bus bandwidth requirements
(see devdw.txt)
- qcom,idle-timeout: This property represents the time in milliseconds for idle timeout.
-- qcom,deep-nap-timeout: This property represents the time in milliseconds for entering deeper
- power state.
- qcom,no-nap: If it exists software clockgating will be disabled at boot time.
- qcom,chipid: If it exists this property is used to replace
the chip identification read from the GPU hardware.
This is used to override faulty hardware readings.
-- qcom,strtstp-sleepwake: Boolean. Enables use of GPU SLUMBER instead of SLEEP for power savings
- qcom,disable-busy-time-burst:
Boolean. Disables the busy time burst to avoid switching
of power level for large frames based on the busy time limit.
diff --git a/arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi
index d273d757dba5..617e7ddd9730 100644
--- a/arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi
+++ b/arch/arm/boot/dts/qcom/msmcobalt-gpu.dtsi
@@ -68,12 +68,6 @@
qcom,idle-timeout = <80>; //<HZ/12>
qcom,no-nap;
- /*
- * Timeout to enter deeper power saving state
- * from NAP.
- */
- qcom,deep-nap-timeout = <200>;
- qcom,strtstp-sleepwake;
qcom,highest-bank-bit = <15>;
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index cbeb1a924cc9..18fdd400ac7a 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -874,9 +874,6 @@ static int adreno_of_get_power(struct adreno_device *adreno_dev,
device->pwrctrl.interval_timeout = msecs_to_jiffies(timeout);
- device->pwrctrl.strtstp_sleepwake =
- of_property_read_bool(node, "qcom,strtstp-sleepwake");
-
device->pwrctrl.bus_control = of_property_read_bool(node,
"qcom,bus-control");
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index f55b795b1d2b..f42d822b451b 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -43,11 +43,9 @@
#define KGSL_STATE_INIT 0x00000001
#define KGSL_STATE_ACTIVE 0x00000002
#define KGSL_STATE_NAP 0x00000004
-#define KGSL_STATE_SLEEP 0x00000008
#define KGSL_STATE_SUSPEND 0x00000010
#define KGSL_STATE_AWARE 0x00000020
#define KGSL_STATE_SLUMBER 0x00000080
-#define KGSL_STATE_DEEP_NAP 0x00000100
/**
* enum kgsl_event_results - result codes passed to an event callback when the
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 450c10692b54..ea760d9198ee 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -813,8 +813,6 @@ static ssize_t __timer_store(struct device *dev, struct device_attribute *attr,
/* Let the timeout be requested in ms, but convert to jiffies. */
if (timer == KGSL_PWR_IDLE_TIMER)
device->pwrctrl.interval_timeout = msecs_to_jiffies(val);
- else if (timer == KGSL_PWR_DEEP_NAP_TIMER)
- device->pwrctrl.deep_nap_timeout = msecs_to_jiffies(val);
mutex_unlock(&device->mutex);
@@ -840,27 +838,6 @@ static ssize_t kgsl_pwrctrl_idle_timer_show(struct device *dev,
jiffies_to_msecs(device->pwrctrl.interval_timeout));
}
-static ssize_t kgsl_pwrctrl_deep_nap_timer_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
-
- return __timer_store(dev, attr, buf, count, KGSL_PWR_DEEP_NAP_TIMER);
-}
-
-static ssize_t kgsl_pwrctrl_deep_nap_timer_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct kgsl_device *device = kgsl_device_from_dev(dev);
-
- if (device == NULL)
- return 0;
- /* Show the idle_timeout converted to msec */
- return snprintf(buf, PAGE_SIZE, "%u\n",
- jiffies_to_msecs(device->pwrctrl.deep_nap_timeout));
-}
-
static ssize_t kgsl_pwrctrl_pmqos_active_latency_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
@@ -1200,8 +1177,6 @@ static DEVICE_ATTR(max_gpuclk, 0644, kgsl_pwrctrl_max_gpuclk_show,
kgsl_pwrctrl_max_gpuclk_store);
static DEVICE_ATTR(idle_timer, 0644, kgsl_pwrctrl_idle_timer_show,
kgsl_pwrctrl_idle_timer_store);
-static DEVICE_ATTR(deep_nap_timer, 0644, kgsl_pwrctrl_deep_nap_timer_show,
- kgsl_pwrctrl_deep_nap_timer_store);
static DEVICE_ATTR(gpubusy, 0444, kgsl_pwrctrl_gpubusy_show,
NULL);
static DEVICE_ATTR(gpu_available_frequencies, 0444,
@@ -1252,7 +1227,6 @@ static const struct device_attribute *pwrctrl_attr_list[] = {
&dev_attr_gpuclk,
&dev_attr_max_gpuclk,
&dev_attr_idle_timer,
- &dev_attr_deep_nap_timer,
&dev_attr_gpubusy,
&dev_attr_gpu_available_frequencies,
&dev_attr_gpu_clock_stats,
@@ -1328,9 +1302,7 @@ static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
clk_disable(pwr->grp_clks[i]);
/* High latency clock maintenance. */
if ((pwr->pwrlevels[0].gpu_freq > 0) &&
- (requested_state != KGSL_STATE_NAP) &&
- (requested_state !=
- KGSL_STATE_DEEP_NAP)) {
+ (requested_state != KGSL_STATE_NAP)) {
for (i = KGSL_MAX_CLKS - 1; i > 0; i--)
clk_unprepare(pwr->grp_clks[i]);
clk_set_rate(pwr->grp_clks[0],
@@ -1342,7 +1314,7 @@ static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
/* Turn off the IOMMU clocks */
kgsl_mmu_disable_clk(&device->mmu);
- } else if (requested_state == KGSL_STATE_SLEEP) {
+ } else if (requested_state == KGSL_STATE_SLUMBER) {
/* High latency clock maintenance. */
for (i = KGSL_MAX_CLKS - 1; i > 0; i--)
clk_unprepare(pwr->grp_clks[i]);
@@ -1360,8 +1332,7 @@ static void kgsl_pwrctrl_clk(struct kgsl_device *device, int state,
trace_kgsl_clk(device, state,
kgsl_pwrctrl_active_freq(pwr));
/* High latency clock maintenance. */
- if ((device->state != KGSL_STATE_NAP) &&
- (device->state != KGSL_STATE_DEEP_NAP)) {
+ if (device->state != KGSL_STATE_NAP) {
if (pwr->pwrlevels[0].gpu_freq > 0) {
clk_set_rate(pwr->grp_clks[0],
pwr->pwrlevels
@@ -1585,16 +1556,6 @@ static void kgsl_thermal_timer(unsigned long data)
kgsl_schedule_work(&device->pwrctrl.thermal_cycle_ws);
}
-void kgsl_deep_nap_timer(unsigned long data)
-{
- struct kgsl_device *device = (struct kgsl_device *) data;
-
- if (device->state == KGSL_STATE_NAP) {
- kgsl_pwrctrl_request_state(device, KGSL_STATE_DEEP_NAP);
- kgsl_schedule_work(&device->idle_check_ws);
- }
-}
-
#ifdef CONFIG_DEVFREQ_GOV_QCOM_GPUBW_MON
static int kgsl_pwrctrl_vbif_init(void)
{
@@ -1742,12 +1703,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
if (pwr->grp_clks[0] == NULL)
pwr->grp_clks[0] = pwr->grp_clks[1];
- if (of_property_read_u32(pdev->dev.of_node, "qcom,deep-nap-timeout",
- &result))
- result = 20;
-
- pwr->deep_nap_timeout = msecs_to_jiffies(result);
-
/* Getting gfx-bimc-interface-clk frequency */
if (!of_property_read_u32(pdev->dev.of_node,
"qcom,gpu-bimc-interface-clk-freq",
@@ -1901,9 +1856,6 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
kgsl_pwrctrl_vbif_init();
- setup_timer(&pwr->deep_nap_timer, kgsl_deep_nap_timer,
- (unsigned long) device);
-
return result;
}
@@ -1964,8 +1916,7 @@ void kgsl_idle_check(struct work_struct *work)
mutex_lock(&device->mutex);
if (device->state == KGSL_STATE_ACTIVE
- || device->state == KGSL_STATE_NAP
- || device->state == KGSL_STATE_DEEP_NAP) {
+ || device->state == KGSL_STATE_NAP) {
if (!atomic_read(&device->active_cnt))
kgsl_pwrctrl_change_state(device,
@@ -1977,8 +1928,7 @@ void kgsl_idle_check(struct work_struct *work)
jiffies +
device->pwrctrl.interval_timeout);
}
- if (device->state != KGSL_STATE_DEEP_NAP)
- kgsl_pwrscale_update(device);
+ kgsl_pwrscale_update(device);
mutex_unlock(&device->mutex);
}
EXPORT_SYMBOL(kgsl_idle_check);
@@ -1989,10 +1939,7 @@ void kgsl_timer(unsigned long data)
KGSL_PWR_INFO(device, "idle timer expired device %d\n", device->id);
if (device->requested_state != KGSL_STATE_SUSPEND) {
- if (device->pwrctrl.strtstp_sleepwake)
- kgsl_pwrctrl_request_state(device, KGSL_STATE_SLUMBER);
- else
- kgsl_pwrctrl_request_state(device, KGSL_STATE_SLEEP);
+ kgsl_pwrctrl_request_state(device, KGSL_STATE_SLUMBER);
/* Have work run in a non-interrupt context. */
kgsl_schedule_work(&device->idle_check_ws);
}
@@ -2054,7 +2001,7 @@ static void kgsl_pwrctrl_disable(struct kgsl_device *device)
/* Order pwrrail/clk sequence based upon platform */
device->ftbl->regulator_disable(device);
kgsl_pwrctrl_axi(device, KGSL_PWRFLAGS_OFF);
- kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF, KGSL_STATE_SLEEP);
+ kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF, KGSL_STATE_SLUMBER);
kgsl_pwrctrl_pwrrail(device, KGSL_PWRFLAGS_OFF);
}
@@ -2066,12 +2013,7 @@ static int _init(struct kgsl_device *device)
{
int status = 0;
switch (device->state) {
- case KGSL_STATE_DEEP_NAP:
- pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
- device->pwrctrl.pm_qos_active_latency);
- /* fall through */
case KGSL_STATE_NAP:
- case KGSL_STATE_SLEEP:
/* Force power on to do the stop */
status = kgsl_pwrctrl_enable(device);
case KGSL_STATE_ACTIVE:
@@ -2091,7 +2033,7 @@ static int _init(struct kgsl_device *device)
}
/**
- * _wake() - Power up the GPU from a slumber/sleep state
+ * _wake() - Power up the GPU from a slumber state
* @device - Pointer to the kgsl_device struct
*
* Resume the GPU from a lower power state to ACTIVE.
@@ -2117,16 +2059,10 @@ static int _wake(struct kgsl_device *device)
KGSL_DRV_ERR(device, "start failed %d\n", status);
break;
}
- /* fall through */
- case KGSL_STATE_SLEEP:
kgsl_pwrctrl_axi(device, KGSL_PWRFLAGS_ON);
kgsl_pwrscale_wake(device);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
/* fall through */
- case KGSL_STATE_DEEP_NAP:
- pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
- device->pwrctrl.pm_qos_active_latency);
- /* fall through */
case KGSL_STATE_NAP:
/* Turn on the core clocks */
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_ON, KGSL_STATE_ACTIVE);
@@ -2148,8 +2084,6 @@ static int _wake(struct kgsl_device *device)
pwr->previous_pwrlevel = pwr->active_pwrlevel;
mod_timer(&device->idle_timer, jiffies +
device->pwrctrl.interval_timeout);
- del_timer_sync(&device->pwrctrl.deep_nap_timer);
-
break;
case KGSL_STATE_AWARE:
/* Enable state before turning on irq */
@@ -2157,7 +2091,6 @@ static int _wake(struct kgsl_device *device)
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_ON);
mod_timer(&device->idle_timer, jiffies +
device->pwrctrl.interval_timeout);
- del_timer_sync(&device->pwrctrl.deep_nap_timer);
break;
default:
KGSL_PWR_WARN(device, "unhandled state %s\n",
@@ -2188,9 +2121,7 @@ _aware(struct kgsl_device *device)
status = kgsl_pwrctrl_enable(device);
break;
/* The following 3 cases shouldn't occur, but don't panic. */
- case KGSL_STATE_DEEP_NAP:
case KGSL_STATE_NAP:
- case KGSL_STATE_SLEEP:
status = _wake(device);
case KGSL_STATE_ACTIVE:
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
@@ -2228,12 +2159,8 @@ _nap(struct kgsl_device *device)
*/
kgsl_pwrscale_update_stats(device);
- mod_timer(&device->pwrctrl.deep_nap_timer, jiffies +
- device->pwrctrl.deep_nap_timeout);
-
kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF, KGSL_STATE_NAP);
kgsl_pwrctrl_set_state(device, KGSL_STATE_NAP);
- case KGSL_STATE_SLEEP:
case KGSL_STATE_SLUMBER:
break;
case KGSL_STATE_AWARE:
@@ -2247,62 +2174,6 @@ _nap(struct kgsl_device *device)
}
static int
-_deep_nap(struct kgsl_device *device)
-{
- switch (device->state) {
- /*
- * Device is expected to be clock gated to move to
- * a deeper low power state. No other transition is permitted
- */
- case KGSL_STATE_NAP:
- pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
- PM_QOS_DEFAULT_VALUE);
- kgsl_pwrctrl_set_state(device, KGSL_STATE_DEEP_NAP);
- break;
- default:
- kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
- break;
- }
- return 0;
-}
-
-static int
-_sleep(struct kgsl_device *device)
-{
- switch (device->state) {
- case KGSL_STATE_ACTIVE:
- if (!device->ftbl->is_hw_collapsible(device)) {
- kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
- return -EBUSY;
- }
- /* fall through */
- case KGSL_STATE_NAP:
- kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
- kgsl_pwrctrl_axi(device, KGSL_PWRFLAGS_OFF);
- kgsl_pwrscale_sleep(device);
- kgsl_pwrctrl_clk(device, KGSL_PWRFLAGS_OFF, KGSL_STATE_SLEEP);
- kgsl_pwrctrl_set_state(device, KGSL_STATE_SLEEP);
- pm_qos_update_request(&device->pwrctrl.pm_qos_req_dma,
- PM_QOS_DEFAULT_VALUE);
- if (device->pwrctrl.l2pc_cpus_mask)
- pm_qos_update_request(
- &device->pwrctrl.l2pc_cpus_qos,
- PM_QOS_DEFAULT_VALUE);
- break;
- case KGSL_STATE_SLUMBER:
- break;
- case KGSL_STATE_AWARE:
- KGSL_PWR_WARN(device,
- "transition AWARE -> SLEEP is not permitted\n");
- default:
- kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
- break;
- }
-
- return 0;
-}
-
-static int
_slumber(struct kgsl_device *device)
{
int status = 0;
@@ -2314,14 +2185,11 @@ _slumber(struct kgsl_device *device)
}
/* fall through */
case KGSL_STATE_NAP:
- case KGSL_STATE_SLEEP:
- case KGSL_STATE_DEEP_NAP:
del_timer_sync(&device->idle_timer);
if (device->pwrctrl.thermal_cycle == CYCLE_ACTIVE) {
device->pwrctrl.thermal_cycle = CYCLE_ENABLE;
del_timer_sync(&device->pwrctrl.thermal_timer);
}
- del_timer_sync(&device->pwrctrl.deep_nap_timer);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
/* make sure power is on to stop the device*/
status = kgsl_pwrctrl_enable(device);
@@ -2427,18 +2295,12 @@ int kgsl_pwrctrl_change_state(struct kgsl_device *device, int state)
case KGSL_STATE_NAP:
status = _nap(device);
break;
- case KGSL_STATE_SLEEP:
- status = _sleep(device);
- break;
case KGSL_STATE_SLUMBER:
status = _slumber(device);
break;
case KGSL_STATE_SUSPEND:
status = _suspend(device);
break;
- case KGSL_STATE_DEEP_NAP:
- status = _deep_nap(device);
- break;
default:
KGSL_PWR_INFO(device, "bad state request 0x%x\n", state);
kgsl_pwrctrl_request_state(device, KGSL_STATE_NONE);
@@ -2484,10 +2346,6 @@ const char *kgsl_pwrstate_to_str(unsigned int state)
return "ACTIVE";
case KGSL_STATE_NAP:
return "NAP";
- case KGSL_STATE_DEEP_NAP:
- return "DEEP_NAP";
- case KGSL_STATE_SLEEP:
- return "SLEEP";
case KGSL_STATE_SUSPEND:
return "SUSPEND";
case KGSL_STATE_SLUMBER:
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.h b/drivers/gpu/msm/kgsl_pwrctrl.h
index c8bae0875c0b..ae21a274fada 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.h
+++ b/drivers/gpu/msm/kgsl_pwrctrl.h
@@ -52,7 +52,6 @@
enum kgsl_pwrctrl_timer_type {
KGSL_PWR_IDLE_TIMER,
- KGSL_PWR_DEEP_NAP_TIMER,
};
/*
@@ -122,7 +121,6 @@ struct kgsl_regulator {
* @num_pwrlevels - number of available power levels
* @interval_timeout - timeout in jiffies to be idle before a power event
* @clock_times - Each GPU frequency's accumulated active time in us
- * @strtstp_sleepwake - true if the device supports low latency GPU start/stop
* @regulators - array of pointers to kgsl_regulator structs
* @pcl - bus scale identifier
* @ocmem - ocmem bus scale identifier
@@ -152,8 +150,6 @@ struct kgsl_regulator {
* @limits - list head for limits
* @limits_lock - spin lock to protect limits list
* @sysfs_pwr_limit - pointer to the sysfs limits node
- * @deep_nap_timer - Timer struct for entering deep nap
- * @deep_nap_timeout - Timeout for entering deep nap
* isense_clk_indx - index of isense clock, 0 if no isense
* isense_clk_on_level - isense clock rate is XO rate below this level.
*/
@@ -177,7 +173,6 @@ struct kgsl_pwrctrl {
unsigned int num_pwrlevels;
unsigned long interval_timeout;
u64 clock_times[KGSL_MAX_PWRLEVELS];
- bool strtstp_sleepwake;
struct kgsl_regulator regulators[KGSL_MAX_REGULATORS];
uint32_t pcl;
uint32_t ocmem_pcl;
@@ -207,8 +202,6 @@ struct kgsl_pwrctrl {
struct list_head limits;
spinlock_t limits_lock;
struct kgsl_pwr_limit *sysfs_pwr_limit;
- struct timer_list deep_nap_timer;
- uint32_t deep_nap_timeout;
unsigned int gpu_bimc_int_clk_freq;
bool gpu_bimc_interface_enabled;
};