diff options
| author | Sameer Thalappil <sameert@qca.qualcomm.com> | 2014-05-21 09:23:15 -0700 |
|---|---|---|
| committer | Pitani Venkata Rajesh Kumar <c_vpitan@qti.qualcomm.com> | 2014-06-15 00:39:53 +0530 |
| commit | 466240e7b902ab200bf9cbda77a3cb00e1f08fee (patch) | |
| tree | 1fbc58a443a433e310e4c18394be5d1559aacaee | |
| parent | 964085ee7876f8eb83d30e70fabc2141d40bbbbd (diff) | |
qcacld: Enable clock gating in L1 state
Clock gating in L1 state will help to save more power
for QCA6174.
CRs-Fixed: 668812
Change-Id: Icbc516170df4eb929903dab02a8df98e0cd58c6c
| -rw-r--r-- | CORE/SERVICES/COMMON/hif.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/CORE/SERVICES/COMMON/hif.h b/CORE/SERVICES/COMMON/hif.h index eddbbb4a9f1d..3a2c01bcf60a 100644 --- a/CORE/SERVICES/COMMON/hif.h +++ b/CORE/SERVICES/COMMON/hif.h @@ -617,7 +617,7 @@ inline int HIFDiagWriteMem(HIF_DEVICE *hif_device, A_UINT32 address, A_UINT8 *da * To enable clock gating in L1 state, set this to 1. (less power, slightly more wakeup latency) * To disable clock gating in L1 state, set this to 0. (slighly more power) */ -#define CONFIG_PCIE_ENABLE_L1_CLOCK_GATE 0 +#define CONFIG_PCIE_ENABLE_L1_CLOCK_GATE 1 /* * When CONFIG_ATH_PCIE_MAX_PERF is 0: |