diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-03-09 17:37:22 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-04-06 01:22:15 -0700 |
| commit | 407df637372ef2dd6b4537ab3e178cbaaa12a042 (patch) | |
| tree | 2b0da12a9d10980b856610366a23fe138fb84592 | |
| parent | 57dcf47eb5a8216724608495cc3c26c3727ae0ea (diff) | |
clk: msm: clock: Avoid turning off hmss_ahb_clk during certain LPM states
The clock driver sets the sleep_ena bit to allow the hmss_ahb_clk
to be disabled by hardware during certain low power modes. The
PCIe controller however might need to access some registers that
need this hmss_ahb_clk to be on. Remove the additional settings
in the clock driver to resolve the issue.
CRs-Fixed: 994609
Change-Id: Ib486a27f2e1c2d2231f8bedcb4ee8b39381cbd25
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
| -rw-r--r-- | drivers/clk/msm/clock-gcc-8996.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/clk/msm/clock-gcc-8996.c b/drivers/clk/msm/clock-gcc-8996.c index e93e9c494023..6dd2cf879c49 100644 --- a/drivers/clk/msm/clock-gcc-8996.c +++ b/drivers/clk/msm/clock-gcc-8996.c @@ -3670,14 +3670,6 @@ static int msm_gcc_8996_probe(struct platform_device *pdev) regval |= BIT(21); writel_relaxed(regval, virt_base + GCC_APCS_CLOCK_BRANCH_ENA_VOTE); - /* - * Set the HMSS_AHB_CLK_SLEEP_ENA bit to allow the hmss_ahb_clk to be - * turned off by hardware during certain apps low power modes. - */ - regval = readl_relaxed(virt_base + GCC_APCS_CLOCK_SLEEP_ENA_VOTE); - regval |= BIT(21); - writel_relaxed(regval, virt_base + GCC_APCS_CLOCK_SLEEP_ENA_VOTE); - vdd_dig.vdd_uv[1] = RPM_REGULATOR_CORNER_SVS_KRAIT; vdd_dig.regulator[0] = devm_regulator_get(&pdev->dev, "vdd_dig"); if (IS_ERR(vdd_dig.regulator[0])) { |